Hi Vikas,
On 18.06.2015 20:05, Vikas MANOCHA wrote:
>> $ make -s -j10
>> Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable
>> to parse input tree
>> Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable
>> to parse input tree
>> make[2]: *** [arch/arm
On Thu, Jun 18, 2015 at 4:17 PM, Bin Meng wrote:
> Implement write_mp_table() to create a minimal working MP table.
> This includes an MP floating table, a configuration table header
> and all of the 5 base configuration table entries. The I/O interrupt
> assignment table entry is created based on
Hi Tom,
On Thu, Jun 18, 2015 at 9:07 PM, Beaman, Thomas wrote:
> Hi Bin,
>
> After adding CONFIG_SFI=y to the kernel config, I was able to see both CPUs
> in the kernel boot, but now the kernel hangs at boot time. It did not hang
> when CONFIG_SFI was not set. and if I boot the CONFIG_SFI=y ke
On Wed, Jun 17, 2015 at 04:58:32PM +0100, Peter Robinson wrote:
> defconfig and sandbox fails to build due to a with with the following error:
>
> error: expected '}' before
> 'BOOT_TARGET_DEVICES_references_HOST_without_CONFIG_SANDBOX'
> CONFIG_EXTRA_ENV_SETTINGS
>
> Based on the responaes b
On Thu, Jun 11, 2015 at 12:31:54PM +0200, Hannes Petermaier wrote:
> since we have now various processor-speeds it isn't useful anymore to
> preinitialize kernels-delay loop.
>
> Rather we want the kernel to calibrate it on every boot.
> This wastes around 80ms boottime but is compatible to all C
On Thu, Jun 11, 2015 at 12:25:43PM +0200, Hannes Petermaier wrote:
> in future we support yet another b&r am335x based board, where Timer 5 is
> wired to backlight-driver.
>
> So we introduce a new driver-type '2' to setup timer5 instead timer6.
>
> Signed-off-by: Hannes Schmelzer
> Reviewed-by
On Wed, Jun 17, 2015 at 12:49:23PM +0200, Łukasz Majewski wrote:
> This fix is necessary to avoid booting the default ITB configuration.
>
> Signed-off-by: Lukasz Majewski
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
_
On Thu, Jun 11, 2015 at 08:53:31PM -0400, Tom Rini wrote:
> We want to see if the requested start or total block count are
> unaligned. We discard the whole numbers and only care about the
> remainder. Update the code to use div_u64_rem here and add a comment.
>
> Cc: Hans de Goede
> Cc: Pante
On Wed, Jun 10, 2015 at 08:54:02AM -0500, Cooper Jr., Franklin wrote:
> Currently there is no default value for NETARGS if CONFIG_CMD_NET=y isn't set.
> This results in build errors which was first discovered when trying to run
> make env.
>
> By defining a blank NETARGS these errors can be avoid
On Wed, Jun 03, 2015 at 06:48:51PM +0200, Paul Kocialkowski wrote:
> This switches some printf calls to puts and avoids a test repetition.
>
> Signed-off-by: Paul Kocialkowski
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
_
On Tue, Jun 02, 2015 at 11:12:20AM -0400, Tom Rini wrote:
> With the change to make sure that CONFIG_CMD_NET is enabled this board
> no longer fits into the linker script:
>
> powerpc-linux-ld.bfd: section .resetvec loaded at [fffc,]
> overlaps section .u_boot_list loaded at [ff5
On Mon, Jun 08, 2015 at 11:05:09PM +0200, Paul Kocialkowski wrote:
> This allows using only one of either raw or fs mode for SPL mmc boot, without
> the need to have provisions for the other. In particular, a device may have
> U-Boot installed on a file system on the mmc, without ever needing to r
On Sat, May 30, 2015 at 10:11:25AM +0200, Jeroen Hofstee wrote:
> Since the tam3517 base board has a 16bit wide nand connected to
> the gpmc, enable the prefetch mode, since that is now supported.
>
> Cc: Scott Wood
> Cc: Tom Rini
> Cc: pekon gupta
> Cc: Nishanth Menon
> Cc: Daniel Mack
> Cc
On Sat, May 30, 2015 at 10:11:24AM +0200, Jeroen Hofstee wrote:
> commit c316f57 "mtd: OMAP: Enable GPMC prefetch mode" only enabled
> prefetch mode for 8 bit nand access, this adds 16 bit as well.
>
> Cc: Scott Wood
> Cc: Tom Rini
> Cc: Daniel Mack
>
> Signed-off-by: Jeroen Hofstee
> Review
On Thu, Jun 18, 2015 at 12:01:58PM +0200, Hans de Goede wrote:
> Hi Tom,
>
> Please pull u-boot-sunxi/master into master for a few small fixes.
>
> The following changes since commit 0d3f732fd2ba679b4498541f075d1b1bdbea3935:
>
> Merge git://git.denx.de/u-boot-usb (2015-06-15 20:45:50 -0400)
>
On Sat, May 30, 2015 at 10:11:23AM +0200, Jeroen Hofstee wrote:
> The prefech mode is a feature of the gpmc, not the ELM. An am3517
> does not have an elm, but can do prefeches, so move the code out
> of the CONFIG_NAND_OMAP_ELM ifdef.
>
> Cc: Scott Wood
> Cc: Tom Rini
> Cc: Daniel Mack
>
> S
Hello,
any news on this one?
Thanks,
Tomeu
On 30 April 2015 at 09:23, Sjoerd Simons wrote:
> +Albert, +Marek,
>
> On Tue, 2015-04-28 at 14:21 +0200, Tomeu Vizoso wrote:
>> This could happen if we are being chainloaded by Coreboot with LPAE
>> enabled, as is the case on the Tegra-based Chromebo
Without this we loose every other interrupt packet. We never noticed this
because with keyboards the packets which we were loosing would normally
be key release packets.
But now that we do keyrepeat in software instead of relying on the hid
idle functionality, missing a release will result in key
Hi Marek,
While working on enabling the musb device-model support on more sunxi boards,
I noticed a problem with usb-keyboards when plugged into an usb-2 hub and
thus connected via the ehci code.
In the scenario of a usb-kbd connected to an ehci controller, combined
with using CONFIG_SYS_USB_EVEN
When we're polling and thus handling key-repeat in software, make sure
to disable idle reports, some keyboards may have these enabled by default
messing up our software keyrepeat.
Signed-off-by: Hans de Goede
---
common/usb_kbd.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --g
Thanks Stefan,
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Thursday, June 18, 2015 5:02 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com; jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi:
On Mon, Jun 15, 2015 at 12:42:49PM -0400, Vitaly Andrianov wrote:
>
>
> On 06/15/2015 10:17 AM, Tom Rini wrote:
> >On Mon, Jun 15, 2015 at 08:48:01AM -0400, Vitaly Andrianov wrote:
> >
> >>KS2 u-boot detects the ddr3a size installed to EVM. The detected size can
> >>be used instead of environment
Hi Jagan,
On 18 June 2015 at 00:54, Jagan Teki wrote:
> On 18 June 2015 at 07:50, Wang Haikun wrote:
>> On 6/17/2015 8:30 PM, Simon Glass wrote:
>>> Hi,
>>>
>>> On 17 June 2015 at 03:36, Bin Meng wrote:
Hi Haikun,
On Mon, May 18, 2015 at 9:25 PM, Haikun Wang
wrote:
> F
Hi,
On 18 June 2015 at 01:19, Tomeu Vizoso wrote:
>
> Hello,
>
> any news on this one?
>
> Thanks,
>
> Tomeu
>
> On 30 April 2015 at 09:23, Sjoerd Simons
> wrote:
> > +Albert, +Marek,
> >
> > On Tue, 2015-04-28 at 14:21 +0200, Tomeu Vizoso wrote:
> >> This could happen if we are being chainload
Hi Bin,
After adding CONFIG_SFI=y to the kernel config, I was able to see both CPUs in
the kernel boot, but now the kernel hangs at boot time. It did not hang when
CONFIG_SFI was not set. and if I boot the CONFIG_SFI=y kernel using EFI BIOS
it does not hang either. I have repeated the test a
On Thu, 18 Jun 2015 14:35:27 +0200, Marek Vasut wrote:
> On Wednesday, June 17, 2015 at 06:13:03 PM, Jakub Kiciński wrote:
> > On Wed, 17 Jun 2015 12:44:15 +0200, Marek Vasut wrote:
> > > On Tuesday, June 16, 2015 at 05:44:06 AM, Stephen Warren wrote:
> > > > On 05/04/2015 02:54 PM, Marek Vasut wro
On Wednesday, June 17, 2015 at 06:13:03 PM, Jakub Kiciński wrote:
> On Wed, 17 Jun 2015 12:44:15 +0200, Marek Vasut wrote:
> > On Tuesday, June 16, 2015 at 05:44:06 AM, Stephen Warren wrote:
> > > On 05/04/2015 02:54 PM, Marek Vasut wrote:
> > > > The get_timer_us() function is something which is n
On Wednesday, June 17, 2015 at 03:44:41 PM, Jeroen Hofstee wrote:
> Hello Marek,
>
> -while (get_timer(bcm_host->last_write) < bcm_host->twoticks_delay)
> +while (timer_get_us() < bcm_host->last_write +
> bcm_host->twoticks_delay)
> ;
>
> Can this counter / the right side of the
On Thu, Jun 18, 2015 at 12:51 PM, Tom Rini wrote:
> On Thu, Jun 18, 2015 at 11:04:59AM +0900, Masahiro Yamada wrote:
>
>> Hi Peter,
>>
>>
>> The subject "Fix default env includes to fix sandbox build" sounds
>> confusing to me.
>>
>> I can currently build sandbox because tools/env is not built by
Hi Vikas,
I finally got to testing your latest patchset. And have
some comments / problems:
On 17.06.2015 04:14, Vikas Manocha wrote:
> This patchset:
> - removes sram polling while reading/writing from flash.
> - fixes trigger base & transfer start address register programming. This fix
> supers
On Thu, Jun 18, 2015 at 11:04:59AM +0900, Masahiro Yamada wrote:
> Hi Peter,
>
>
> The subject "Fix default env includes to fix sandbox build" sounds
> confusing to me.
>
> I can currently build sandbox because tools/env is not built by default.
>
> We hit this problem when we do "make env" or
From: Wang Dongsheng
Bootrom will put cpus into WFE state when boot cpu release cpus, so
target cpu cannot correctly go to spin state.
Add 'sev' to wakeup non-boot cpu that hold on bootrom space, let target
cpu can fall into u-boot spin table.
Signed-off-by: Wang Dongsheng
diff --git a/arch/a
Hi Tom,
Please pull u-boot-sunxi/master into master for a few small fixes.
The following changes since commit 0d3f732fd2ba679b4498541f075d1b1bdbea3935:
Merge git://git.denx.de/u-boot-usb (2015-06-15 20:45:50 -0400)
are available in the git repository at:
http://git.denx.de/u-boot-sunxi.gi
Enable writing MP table for Intel Crown Bay board.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v2: None
configs/crownbay_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index abf5e3c..e4edad0 100644
--- a/
So far interrupt routing works pretty well for any on-chip devices
on Intel Crown Bay. When inserting any PCIe card to any PCIe slot,
Linux kernel is smart enough to do interrupt swizzling and figure
out device's irq using its parent bridge's interrupt routing info
all the way up to its root port.
Document U-Boot multi-processor support as well as configuration
tables like SFI and MP tables for SMP OS kernel.
Signed-off-by: Bin Meng
---
Changes in v2:
- New patch to update README.x86 for SMP support
doc/README.x86 | 13 +
1 file changed, 13 insertions(+)
diff --git a/doc/R
Implement write_mp_table() to create a minimal working MP table.
This includes an MP floating table, a configuration table header
and all of the 5 base configuration table entries. The I/O interrupt
assignment table entry is created based on the same information used
in the creation of PIRQ routing
The MP table provides a way for the operating system to support
for symmetric multiprocessing as well as symmetric I/O interrupt
handling with the local APIC and I/O APIC. We provide a bunch of
APIs for U-Boot to write the floating table, configuration table
header as well as base and extended tabl
I/O APIC registers are addressed indirectly. Add io_apic_read() and
io_apic_write() routines to help register access. Two macros for I/O
APIC ID and version register offset are also added.
Signed-off-by: Bin Meng
---
Changes in v2:
- Do not use inline for register access
arch/x86/cpu/Makefile
Remove inline for lapic access routines and expose lapic_read()
& lapic_write() as APIs to read/write lapic registers. Also move
stop_this_cpu() to mp_init.c as it has nothing to do with lapic.
Signed-off-by: Bin Meng
---
Changes in v2:
- New patch to remove inline for lapic access routines
a
There is no need to populate multiple irq info entries with the same
bus number and device number, but with different interrupt pin. We
can use the same entry to store all the 4 interrupt pin (INT A/B/C/D)
routing information to reduce the whole PIRQ routing table size.
Signed-off-by: Bin Meng
Ac
We should write correct bus number to the PIRQ routing table for the
irq router from device tree, instead of hard-coded zero.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/c
Remove all the dead/unused macros from asm/ioapic.h.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/ioapic.h | 26 +++---
1 file changed, 3 insertions(+), 23 deletions(-)
diff --git a/arch/x86/include/asm/ioapic.h b/arch/x86/inc
Currently CONFIG_DM_I2C is used in cmd_date.c for driver model,
but it should be actually CONFIG_DM_RTC.
Signed-off-by: Bin Meng
---
Changes in v2:
- New patch to change to use CONFIG_DM_RTC instead of CONFIG_DM_I2C
common/cmd_date.c | 12 ++--
1 file changed, 6 insertions(+), 6 delet
Add a RTC node in the device tree to enable DM RTC support.
Signed-off-by: Bin Meng
---
Changes in v2:
- New patch to enable DM RTC support for Crown Bay
arch/x86/dts/crownbay.dts | 1 +
arch/x86/dts/rtc.dtsi | 6 ++
configs/crownbay_defconfig | 1 +
3 files changed, 8 insertions(+)
In fill_irq_info() pci device's function number is written into
the table, however this is not really necessary. The function
number can be anything as OS doesn't care about this field,
neither does the PIRQ routing specification. Change to always
writing 0 as the function number.
Signed-off-by: B
Add driver model support to the mc146818 rtc driver. Also clean up
the driver a little bit for coding convention issues.
Signed-off-by: Bin Meng
---
Changes in v2:
- New patch to support mc146818 driver in driver model
drivers/rtc/mc146818.c | 312 -
There are 4 usb ports on the Intel Crown Bay board, 2 of which are
connected to Topcliff usb host 0 and the other 2 connected to usb
host 1. USB devices inserted in the ports connected to usb host 1
cannot get detected due to wrong IRQ assigned to the controller.
Actually we need apply the PCI inte
48 matches
Mail list logo
