Hi Simon,
On Mon, 19 Jan 2015 17:33:08 -0700
Simon Glass wrote:
> Hi Anatolij,
>
> On 1 January 2015 at 16:17, Simon Glass wrote:
> > Some machines are very slow to scroll their displays. To cope with this,
> > support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows
> > the di
On Thu, 1 Jan 2015 16:17:57 -0700
Simon Glass wrote:
> Some machines are very slow to scroll their displays. To cope with this,
> support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows
> the display to operate at an acceptable speed by scrolling 5 lines at
> a time.
>
> This s
Hello Anton,
Am 19.01.2015 14:48, schrieb Anton Habegger:
During mount_ubifs the ubifs_replay_journal was disabled. This patch
enables it again and fix some unrecoverable UBIFS volumes.
The following patch enables the error handling for ubifs_replay_journal as well.
Please see discussion "Unrea
Hello Anton,
Am 19.01.2015 12:29, schrieb Anton Habegger:
Hello Heiko
I was able to enable the uibfs_replay_journal, and so far this solved my issue.
Great to hear!
Below the patch. I'm not sure about the U-Boot replacement for
atomic_long_read? I assume U-Boot has no concurrency, then mayb
This patch add DT support for mxc gpio driver.
Include a bank_index entry in platdata. This can avoid using
`plat - mxc_plat` to calculate bank number. Also this can simplify code.
There are two places still using CONFIG_OF_CONTROL macro, just to
shrink code size if only support DM but not suppor
Hello Hans,
On Mon, 19 Jan 2015 20:04:58 +0100, Hans de Goede
wrote:
> Hi,
>
> On 17-01-15 23:51, Ian Campbell wrote:
> > On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
> >> According to the "Cortex-A7 MPCore Technical Reference Manual":
> >>
> >> "You must ensure this bit is set to 1 b
Hello Alexey,
On Mon, 19 Jan 2015 20:55:03 +0300, Alexey Brodkin
wrote:
> In case of CONFIG_SYS_MALLOC_F_LEN "malloc_base" is used for early
> start-up code and is set very early, typically in "start.S" or "crt1.S".
There is no "crt1.S" in U-Boot. Did you mean "crt0.S"?
> In current implementat
Hello Bill,
On Mon, 19 Jan 2015 10:40:07 -0500, Bill Pringlemeir
wrote:
>
> > On Mon, 19 Jan 2015 11:11:34 +0100, Luca Ellero
>
> >> As far as I can see the mechanism to relocate vectors is implemented
> >> only on iMX25/27 and involves high vectors address (0x).
>
> On 19 Jan 2015, a
Hello Ayoub,
On Mon, 19 Jan 2015 13:33:30 +0100, Ayoub Zaki
wrote:
> I set TEXT_BASE to :
>
> #define CONFIG_SYS_TEXT_BASE0x8060
>
> Now u-boot.img can be up to 4MB sized and it solved my problem :)
>
> Thank you very much for your help.
No problem. :)
Amicalement,
--
Albert
Hi Marek,
And this one.
On 12/19/2014 12:39 PM, Peng Fan wrote:
If ecc chunk data size is 512 and oobsize is bigger than 512, there is
a chance that block_mark_bit_offset conflicts with bch ecc area.
The following graph is modified from kernel gpmi-nand.c driver with each data
block 512 bytes.
Hi Marek,
Since you are familiar with this driver, would you please help review
this patch?
On 12/19/2014 12:39 PM, Peng Fan wrote:
Calculate ecc strength according oobsize, but not hardcoded
which is not aligned with kernel driver
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
drivers
Hello Simon,
Am 20.01.2015 04:12, schrieb Simon Glass:
Rather than assuming that the chip offset length is 1, allow it to be
provided. This allows chips that don't use the default offset length to
be used (at present they are only supported by the command line 'i2c'
command which sets the offset
In standalone applications, it seems that the execution of printf
function in U-Boot is dependent on the value of register R9, which is
setup in app_startup. But r9 can be used by your program at the
decision of gcc compilation which is not aware of this dependence.
This is especially the case if +
On Tue, Jan 20, 2015 at 1:16 PM, Simon Glass wrote:
> Add a hook to ensure that this information is saved.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Add misc_init_r() call for link now that it is shared with chromebook_link
>
> Changes in v2: None
>
> arch/x86/cpu/coreboot/core
Enable an environment area.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
include/configs/chromebook_link.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index 6e
This is now stored in the device tree.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/cpu/ivybridge/Kconfig | 28
1 file changed, 28 deletions(-)
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index af
All memory to be reserved for use after relocation by adding a new call
to perform this reservation.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
common/board_f.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/board_f.c b/common/board_f.c
index 3a4b
On x86 we use CMOS RAM to read and write some settings. Add basic support
for this, including access to registers 128-255.
Signed-off-by: Simon Glass
---
Changes in v3:
- Adjust functions to remain compatible with other RTC drivers
Changes in v2:
- Adjust the mc146818 driver instead of adding a
As a temporary measure before the ICH driver moves over to driver model,
add device tree support to the driver.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
drivers/spi/ich.c| 7 +++
include/configs/x86-common.h | 1 +
2 files changed, 8 insertions(+)
Drop the old checksum functions in favour of the new ones.
Signed-off-by: Simon Glass
---
Changes in v3:
- Adjust net/ code to use the new checksum functions
Changes in v2: None
include/net.h | 4
net/net.c | 25 ++---
net/ping.c| 10 --
3 files chang
Add a hook to ensure that this information is saved.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add misc_init_r() call for link now that it is shared with chromebook_link
Changes in v2: None
arch/x86/cpu/coreboot/coreboot.c | 5 +
include/configs/chromebook_link.h | 1 +
2 files cha
The existing IP checksum function is only accessible to the 'coreboot' cpu.
Drop it in favour of the new code in the network subsystem.
Signed-off-by: Simon Glass
---
Changes in v3:
- Use checksum code that is now in net/checksum.c
Changes in v2:
- Refactor IP checksum patches
arch/x86/cpu/co
Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.
Signed-off-by: Simon Glass
---
Changes in v3:
- Drop accidental creation of link.dts due to bad rebase
Changes in v2:
- Make chan
The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.
Add an implementation of this, storing the training data in CMOS RAM and
SPI fl
Since the memory reference code is so slow on x86, add a feature to bypass
this, storing the previous parameters in SPI flash. This saves around 500ms
on each boot.
Also enable a SPI flash environment.
Changes in v3:
- Add new patch to move checksum to its own file in net/
- Adjust net/ code to u
Add this to the enum so that we can use the various fdtdec functions. A
later commit will move this driver to driver model.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Use intel,ich-spi as the compatible string
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files cha
Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to move checksum to its own file in net
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng
---
arch/x
CPUID (EAX 01H) returns MTRR support flag in EDX bit 12. Probe this
flag in x86_cpu_init_f() and save it in global data.
Signed-off-by: Bin Meng
---
arch/x86/cpu/cpu.c | 7 +++
arch/x86/include/asm/global_data.h | 3 ++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff
arch/x86/cpu/mtrr.c has access to the U-Boot global data thus
DECLARE_GLOBAL_DATA_PTR is needed.
Signed-off-by: Bin Meng
---
arch/x86/cpu/mtrr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index d5a825d..ac8765f 100644
--- a/arch/x86/cpu/mtrr.
Hi Simon, Alexey,
On Thu, 15 Jan 2015 12:44:16 -0700
Simon Glass wrote:
>>> Frankly I don't like this approach with post-processing steps. It will
>>> inevitably end-up with messed up configs.
>>>
>>> Why don't we just use default values in Kconfig for ARCH/SOC/Board?
>>> It's pretty obvious tha
Hi Hans,
On 19 January 2015 at 13:10, Hans de Goede wrote:
> Hi,
>
>
> On 19-01-15 20:46, Simon Glass wrote:
>>
>> Hi Hans,
>>
>> On 19 January 2015 at 12:06, Hans de Goede wrote:
>>>
>>> Hi,
>>>
>>>
>>> On 18-01-15 04:12, Simon Glass wrote:
Hi Hans,
On 13 January 2015 a
Various minor code format issues are fixed in start16.S:
- U-boot -> U-Boot
- 32bit -> 32-bit
- Use TAB instead of SPACE to indent
- Move the indention location of the GDT comment block
Signed-off-by: Bin Meng
---
arch/x86/cpu/start16.S | 20 ++--
1 file changed, 10 insertions(+
It is painful to specify the full path to the device tree with the -d
option. It is normally kept in the same directory as U-Boot, so provide
an option to use this by default.
Signed-off-by: Simon Glass
---
arch/sandbox/cpu/start.c | 20
1 file changed, 20 insertions(+)
di
The other boards got updated to the standard binding. Update sandbox as
well.
Signed-off-by: Simon Glass
---
arch/sandbox/dts/sandbox.dts | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 4c63e4f..9ce31bf
At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
I2C is now deprecated on ARM platforms and there are no devices that use it
with the v3 protocol. We can't require v3 support if we want to support I2C.
Adjust the error handling to suit.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
We don't want to bind devices which should never be used.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
drivers/core/root.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/core/root.c b/drivers/core/root.c
index a5b0a
Allow parent drivers to be called when a new child is bound to them. This
allows a bus to set up information it needs for that child.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/core/device.c | 12
include/dm/device.h | 2 ++
test/dm/bus.c | 35 ++
For buses, after a child is bound, allow the uclass to perform some
processing. This can be used to figure out the address of the child (e.g.
the chip select for SPI slaves) so that it is ready to be probed.
This avoids bus drivers having to repeat the same process, which really
should be done by
Use a single exit point when we have an error and add debugging there.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/spi/sandbox.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 3024b98..10
In commit a62e84d the old functionality of obtaining a PCI address from the
'reg' property was lost. Add it back, so we can support both a compatible
string list and a 'reg' property.
This patch fixes PCIe ethernet on Tegra boards.
Signed-off-by: Simon Glass
---
lib/fdtdec.c | 10 --
1
Hi Przemyslaw,
On 9 January 2015 at 01:57, Przemyslaw Marczak wrote:
> Hello Heiko Schocher,
>
>
> On 01/09/2015 07:31 AM, Heiko Schocher wrote:
>>
>> Hello Przemyslaw Marczak,
>>
>> just some nitpick ...
>>
[snip]
> Thank you for the review, I will fix this in the next patchset version.
I'd l
Now that we have new bus features, update README.txt and the SPI docs to
explain these.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop RFC prefix since this series has been properly tested now
- Update commit message to describe immuatable platform data
- Update the spi-howto docs
doc/dri
Some buses need to set up their devices before they can be used. This setup
may well be common to all buses in a particular uclass. Support a common
pre-probe method for the uclass, called before any bus devices are probed.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/core/device
At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.
However, now that we can suppo
Update the driver model support, and remove the old code. Change snow to
use this new support.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
drivers/misc/cros_ec_i2c.c | 107 +
include/confi
At present we use struct spi_slave as our device pointer in a lot of places
to avoid changing the old SPI API. At some point this will go away.
But for now, it is better if the SPI uclass sets up this pointer, rather
than relying on passing it into the device when it is probed. We can use the
new
This has moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/fdtdec.h | 1 -
lib/fdtdec.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 094a8e3..4cc69de 100644
--- a/include/f
At present we go through various contortions to store the I2C's chip
address in its private data. This only exists when the chip is active so
must be set up when it is probed. Until the device is probed we don't
actually record what address it will appear on.
However, now that we can support per-c
These have moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/fdtdec.h | 6 --
lib/fdtdec.c | 6 --
2 files changed, 12 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index f0d2412..094a8e3 100644
--
This is no-longer needed since all platforms use SPI for cros_ec.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
drivers/misc/cros_ec_spi.c | 51 ++
1 file changed, 2 insertions(+), 49 deleti
The root device corresponds to the root device tree node, so set this up.
Also add a few notes to the documentation.
Signed-off-by: Simon Glass
---
Changes in v2: None
doc/driver-model/README.txt | 4
drivers/core/root.c | 3 +++
2 files changed, 7 insertions(+)
diff --git a/doc/
For buses it is common for parents to need to know the address of the child
on the bus, the bus speed to use for that child, and other information. This
can be provided in platform data attached to each child.
Add driver model support for this, including auto-allocation which can be
requested usin
Rather than assuming that the chip offset length is 1, allow it to be
provided. This allows chips that don't use the default offset length to
be used (at present they are only supported by the command line 'i2c'
command which sets the offset length explicitly).
Signed-off-by: Simon Glass
---
Cha
When using allocated platform data, allocate it when we bind the device.
This makes it possible to fill in this information before the device is
probed.
This fits with the platform data model (when not using device tree),
since platform data exists at bind-time.
Signed-off-by: Simon Glass
---
C
This is common to all SPI drivers and specifies a structure used by the
uclass. It makes more sense to define it in the uclass.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/spi/cadence_qspi.c | 1 -
drivers/spi/designware_spi.c | 1 -
drivers/spi/exynos_spi.c | 1 -
drivers
Make the error handling more standard to make it easier to build on top of
it. Also correct a bug in the error path where there is no parent.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/core/device.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff
In many cases the per-child private data for a device's children is defined
by the uclass rather than the individual driver. For example, a SPI bus
needs to store information about each of its children, but all SPI drivers
store the same information. It makes sense to allow the uclass to define
thi
Mention that the devices are probed ready for use.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/dm/uclass.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index f6ec6d7..2577ae6 100644
--- a/include/dm/uclass.h
+++ b/include/dm/u
There is no point in running the tests if U-Boot cannot be built. Abort in
this case.
Signed-off-by: Simon Glass
---
Changes in v2: None
test/dm/test-dm.sh | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/test/dm/test-dm.sh b/test/dm/test-dm.sh
index bb99677..8ebc39
This is useful to check which uclass a device is in.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/core/device.c | 5 +
include/dm/device.h | 8
test/dm/core.c| 11 +++
3 files changed, 24 insertions(+)
diff --git a/drivers/core/device.c b/drivers
In many cases the child platform data for a device's children is defined by
the uclass rather than the individual devices. For example, a SPI bus needs
to know the chip select and speed for each of its children. It makes sense
to allow this information to be defined the SPI uclass rather than each
The current bus implementation is simple but leaves some things to drivers
which are better handled in the uclass.
At present uclasses cannot provide a common way of dealing with children
(i.e. devices on the bus), so we have duplication in the drivers. The same
code is repeated in each driver whe
On 14 January 2015 at 21:37, Simon Glass wrote:
> Add code to the generic pci_rom file to access the VGA ROM in PCI space
> when needed.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Use 0xfffe instead of ~-2
>
> drivers/pci/pci_auto.c | 28 +++-
> drive
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of saving it in raw sector of MMC card.
This make us easier to manage the environment file.
Signed-off-by: Josh Wu
Acked-by: Bo Shen
---
Changes in v3: None
Changes in v2:
- refined commit messages
- fix a c
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of in raw sector of MMC card.
This make us easier to manage the environment file.
Signed-off-by: Josh Wu
Acked-by: Bo Shen
---
Changes in v3:
- move CONFIG_FAT_WRITE macro to share with USB and MMC
Changes
I sent these patches days ago with other patches which refactor SAMA5
common configuration files, see URL:
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/203128/focus=203182
Since the patches which refactor SAMA5 common configuration files is
rejected. So this time I only send the patches
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of saving it in raw sector of MMC card.
This make us easier to manage the environment file.
Signed-off-by: Josh Wu
Acked-by: Bo Shen
---
Changes in v3:
- move CONFIG_FAT_WRITE macro to share with USB and MMC
Hi Simon,
On 1/20/2015 3:45 AM, Simon Glass wrote:
Hi Peng.
On 18 January 2015 at 23:11, Peng Fan wrote:
This patch supports getting gpios' configuration from dtb.
CONFIG_OF_CONTROL is used to indicated which part is for device tree,
and which is not.
This patch is already tested on mx6sxsab
On Thu, 2015-01-15 at 14:04 +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> low power boot means u-boot will put non-boot cpus into a low power
> status. Non-boot cpus don't need any more spin wait. e500, e500v2 will
> going to DOZE status. e500mc, e5500, e6500rev1 will going to PW10 stat
Hi Anatolij,
On 1 January 2015 at 16:17, Simon Glass wrote:
> Some machines are very slow to scroll their displays. To cope with this,
> support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows
> the display to operate at an acceptable speed by scrolling 5 lines at
> a time.
>
> T
Hi Andreas,
On 19 January 2015 at 16:41, Andreas Bießmann
wrote:
> Hi Simon,
>
> On 20.01.15 00:34, Simon Glass wrote:
>> Hi Andreas,
>>
>> On 19 January 2015 at 16:29, Andreas Bießmann
>> wrote:
>>> This is required for architectures still need manual relocation like avr32,
>>> mk68
>>> and ot
Hi Simon,
On 20.01.15 00:34, Simon Glass wrote:
> Hi Andreas,
>
> On 19 January 2015 at 16:29, Andreas Bießmann
> wrote:
>> This is required for architectures still need manual relocation like avr32,
>> mk68
>> and others.
>>
>> Signed-off-by: Andreas Bießmann
>> ---
>>
>> common/board_r.c |
From: Stephen Warren
Modify $bootcmd_dhcp to read the downloaded script filename from an
environment variable rather than hard-coding it. This allows the user
(or another script) to select a different script name if they want,
without editing the whole value of $bootcmd_dhcp.
Signed-off-by: Step
Hi Andreas,
On 19 January 2015 at 16:29, Andreas Bießmann
wrote:
> This is required for architectures still need manual relocation like avr32,
> mk68
> and others.
>
> Signed-off-by: Andreas Bießmann
> ---
>
> common/board_r.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --
Signed-off-by: Andreas Bießmann
---
include/configs/grasshopper.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h
index 83f0ed2..54eb977 100644
--- a/include/configs/grasshopper.h
+++ b/include/configs/grasshopper.h
@@ -62,
This is required for architectures still need manual relocation like avr32, mk68
and others.
Signed-off-by: Andreas Bießmann
---
common/board_r.c | 12
1 file changed, 12 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index a301cc2..e712902 100644
--- a/common/bo
Signed-off-by: Andreas Bießmann
---
arch/avr32/cpu/cpu.c|2 +-
arch/avr32/include/asm/u-boot.h |2 ++
arch/avr32/lib/board.c |2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
index cef630e..cd226a6 1
Signed-off-by: Andreas Bießmann
---
arch/avr32/include/asm/dma-mapping.h |7 -
arch/avr32/lib/board.c | 51 --
include/configs/atngw100.h |1 -
include/configs/atngw100mkii.h |1 -
include/configs/atstk1002.h
From: Stephen Warren
All boards need CONFIG_BOARD_EARLY_INIT_F, and many actively need
CONFIG_BOARD_LATE_INIT. Move both of these into tegra-common.h so that
board config headers don't need to repeatedly define them.
Later commits will add new code in board_late_init() which applies to
all board
From: Stephen Warren
When the CPU is in non-secure (NS) mode (when running U-Boot under a
secure monitor), certain actions cannot be taken, since they would need
to write to secure-only registers. One example is configuring the ARM
architectural timer's CNTFRQ register.
We could support this in
On 12/23/2014 10:34 AM, Stephen Warren wrote:
From: Stephen Warren
Some systems have so much RAM that the end of RAM is beyond 4GB. An
example would be a Tegra124 system (where RAM starts at 2GB physical)
that has more than 2GB of RAM.
In this case, we can gd->ram_size to represent the actual
Hi Waldemar,
On 19.01.15 21:24, Waldemar Brodkorb wrote:
> Hi Andreas,
> Andreas Bießmann wrote,
>>> But unfortunately the device is dead after the erase command.
>>
>> Damn, this damn old code run completely from NOR. Current u-boot
>> versions relocate itself to ram after the very first bootstra
Gemei G9 is an A10 based tablet, with 1G RAM, 16G NAND, 1024x768
IPS LCD display, stereo speakers, 1.3MP front camera and 5 MP
rear camera, 8000mAh battery, GT901 2+1 touchscreen, Bosch BMA250
accelerometer and RTL8188CUS USB wifi. It also has MicroSD slot,
miniHDMI, 1 x MicroUSB OTG port and 1 x M
Hi Andreas,
Andreas Bießmann wrote,
> > But unfortunately the device is dead after the erase command.
>
> Damn, this damn old code run completely from NOR. Current u-boot
> versions relocate itself to ram after the very first bootstrap. Sorry, I
> did not know that these old versions do not reloca
Hi Albert,
On 18 January 2015 at 23:54, Albert ARIBAUD wrote:
> Hello Simon,
>
> On Sun, 18 Jan 2015 11:55:36 -0700, Simon Glass
> wrote:
>> At present SPL uses a single stack, either CONFIG_SPL_STACK or
>> CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and
>> environment) require
Hi,
On 18 January 2015 at 23:46, Heiko Schocher wrote:
> Hello Simon,
>
> added Bo Shen to cc, as he currently try to set BSS (and stack) into
> SDRAM for at91 based boards ... Bo, could you try this aproach?
>
> Am 18.01.2015 19:55, schrieb Simon Glass:
>
>> At present SPL uses a single stack, e
This patch add support for Marsboard A10 board.
The Marsboard A10 is a A10 based development board with 1G RAM, 1G NAND,
micro SD card slot, SATA 2.0 socket, 10/100 ethernet, mini HDMI port,
1 USB OTG port and 2 USB 2.0 ports. Board does not use the AXP209 pmic,
it does not have a pmic at all.
Boa
Hi,
On 19-01-15 20:46, Simon Glass wrote:
Hi Hans,
On 19 January 2015 at 12:06, Hans de Goede wrote:
Hi,
On 18-01-15 04:12, Simon Glass wrote:
Hi Hans,
On 13 January 2015 at 04:33, Hans de Goede wrote:
While running some tests with an Olinuxino-A13-Micro + a 7" Olimex LCD
module
I not
Hi,
On 19-01-15 12:46, Aleksei Mamlin wrote:
This patch add support for Marsboard A10 board.
The Marsboard A10 is a A10 based development board with 1G RAM, 1G NAND,
micro SD card slot, SATA 2.0 socket, 10/100 ethernet, mini HDMI port,
1 USB OTG port and 2 USB 2.0 ports. Board does not use the
Hi,
On 19-01-15 04:23, Siarhei Siamashka wrote:
This is the v2 of
http://lists.denx.de/pipermail/u-boot/2015-January/200807.html
It addresses the review comments.
One other change is the introduction of CONFIG_VIDEO_LCD_SSD2828_TX_CLK
option. The Allwinner A20 reference tablet schematics
Hi,
On 18-01-15 17:34, Ian Campbell wrote:
On Sun, 2015-01-18 at 13:23 +0100, Hans de Goede wrote:
The mk802 is the "classic" Allwinner A10 based hdmi tv-stick, it features
512M or 1G RAM, 4G nand, a mini-hdmi female connector, USB-A receptacle,
mini-usb receptacle (OTG) and USB-wifi. Somewhat
Hi Hans,
On 19 January 2015 at 12:06, Hans de Goede wrote:
> Hi,
>
>
> On 18-01-15 04:12, Simon Glass wrote:
>>
>> Hi Hans,
>>
>> On 13 January 2015 at 04:33, Hans de Goede wrote:
>>>
>>> While running some tests with an Olinuxino-A13-Micro + a 7" Olimex LCD
>>> module
>>> I noticed that the scr
Hi,
On 17-01-15 23:59, Ian Campbell wrote:
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Add initial sun9i (A80) support, only uart + mmc are supported for now.
Signed-off-by: Hans de Goede
Acked-by: Ian Campbell
+#define CONFIG_SYS_PROMPT "sun9i# "
Should we make all th
Hi Peng.
On 18 January 2015 at 23:11, Peng Fan wrote:
> This patch supports getting gpios' configuration from dtb.
> CONFIG_OF_CONTROL is used to indicated which part is for device tree,
> and which is not.
>
> This patch is already tested on mx6sxsabresd board. Since device tree
> has not been u
Hi,
On 17-01-15 23:56, Ian Campbell wrote:
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
The clocks on the A80 are hooked up slightly different, add support for this.
Signed-off-by: Hans de Goede
Acked-by: Ian Campbell
Couple of minor comments:
---
arch/arm/include/asm/arch-
Hi Heiko,
On 18 January 2015 at 23:15, Heiko Schocher wrote:
> Hello Bo,
>
> added Simon to cc ...
>
> Am 19.01.2015 02:41, schrieb Bo Shen:
>
>> Hi Andreas,
>>
>> On 01/16/2015 06:16 PM, Andreas Bießmann wrote:
>>>
>>> Hi Bo,
>>>
>>> On 01/16/2015 10:30 AM, Bo Shen wrote:
On 01/16/2015
On 01/14/15 10:42, Nikita Kiryanov wrote:
> Move board/compulab/common/splash.c code to
> common/splash_source.c to make it available for everybody. This move
> renames cl_splash_screen_prepare() to splash_source_load(), and
> the compilation of this code is conditional on CONFIG_SPLASH_SOURCE.
>
On 01/14/15 10:42, Nikita Kiryanov wrote:
> Define a generic way for boards to define splash image locations:
> - introduce struct splash_location
> - introduce enum splash_storage
> - update cl_splash_screen_prepare() to take an array of above struct
> and select the appropriate one based on th
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