Hi Tom
On 06/24/2014 01:34 PM, Tom Rini wrote:
On Tue, Jun 24, 2014 at 01:13:06AM -0400, Sinan Akman wrote:
Hi Masahiro
Masahiro Yamada wrote:
Hi Sinan,
[...]
+Orphan powerpc mpc83xx- freescale
mpc837xerdb MPC837XERDB
I have this board and I would
Signed-off-by: Sinan Akman
Cc: kim.phill...@freescale.com
---
include/configs/MPC837XERDB.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 8ed0f7c..88d5be0 100644
--- a/include/configs/MPC837XERDB.h
++
Hello Luca,
On Mon, 29 Dec 2014 16:10:53 +0100, Luca Ellero
wrote:
> After relocation, exception vectors still point to the old code (not
> relocated).
> This patch fixes them.
>
> Signed-off-by: Luca Ellero
> ---
> arch/arm/lib/relocate.S | 15 +++
> 1 file changed, 15 insertio
Hi Simon ,Jagan
This patch is based on git://git.denx.de/u-boot-spi.git master branch,
since some fsl_qspi's new feature is still in this git repo and have
not been merged to mainline.
I saw Simon sent out a new patch that remove the per_child_auto_alloc_size
from the platforms' driver code and mo
iles/20150114-spl-stackgraph/spl-stackgraph-v2015.01-cubieboard2-fel.png
and the newer indirect calls aware version:
http://people.freedesktop.org/~siamashka/files/20150116-spl-stackgraph/spl-stackgraph-v2015.01-cubieboard2-fel.png
On the first picture, the serial and i2c functions are in their ow
Some buses need to set up their devices before they can be used. This setup
may well be common to all buses in a particular uclass. Support a common
pre-probe method for the uclass, called before any bus devices are probed.
Signed-off-by: Simon Glass
---
drivers/core/device.c| 4
In many cases the per-child private data for a device's children is defined
by the uclass rather than the individual driver. For example, a SPI bus
needs to store information about each of its children, but all SPI drivers
store the same information. It makes sense to allow the uclass to define
thi
Use a single exit point when we have an error and add debugging there.
Signed-off-by: Simon Glass
---
drivers/mtd/spi/sandbox.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 3024b98..106dda9 100644
--- a/dr
This is common to all SPI drivers and specifies a structure used by the
uclass. It makes more sense to define it in the uclass.
Signed-off-by: Simon Glass
---
drivers/spi/cadence_qspi.c | 1 -
drivers/spi/designware_spi.c | 1 -
drivers/spi/exynos_spi.c | 1 -
drivers/spi/sandbox_spi.c
At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.
However, now that we can suppo
This has moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass
---
include/fdtdec.h | 1 -
lib/fdtdec.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 094a8e3..4cc69de 100644
--- a/include/fdtdec.h
+++ b/include
At present we go through various contortions to store the I2C's chip
address in its private data. This only exists when the chip is active so
must be set up when it is probed. Until the device is probed we don't
actually record what address it will appear on.
However, now that we can support per-c
At present we use struct spi_slave as our device pointer in a lot of places
to avoid changing the old SPI API. At some point this will go away.
But for now, it is better if the SPI uclass sets up this pointer, rather
than relying on passing it into the device when it is probed. We can use the
new
For buses it is common for parents to need to know the address of the child
on the bus, the bus speed to use for that child, and other information. This
can be provided in platform data attached to each child.
Add driver model support for this, including auto-allocation which can be
requested usin
For buses, after a child is bound, allow the uclass to perform some
processing. This can be used to figure out the address of the child (e.g.
the chip select for SPI slaves) so that it is ready to be probed.
This avoids bus drivers having to repeat the same process, which really
should be done by
These have moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass
---
include/fdtdec.h | 6 --
lib/fdtdec.c | 6 --
2 files changed, 12 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index f0d2412..094a8e3 100644
--- a/include/fdtdec.h
When using allocated platform data, allocate it when we bind the device.
This makes it possible to fill in this information before the device is
probed.
This fits with the platform data model (when not using device tree),
since platform data exists at bind-time.
Signed-off-by: Simon Glass
---
Now that we have new bus features, update README.txt to explain these.
Signed-off-by: Simon Glass
---
doc/driver-model/README.txt | 36 ++--
1 file changed, 26 insertions(+), 10 deletions(-)
diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt
i
Mention that the devices are probed ready for use.
Signed-off-by: Simon Glass
---
include/dm/uclass.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index f6ec6d7..2577ae6 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -141,6 +14
At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
There is no point in running the tests if U-Boot cannot be built. Abort in
this case.
Signed-off-by: Simon Glass
---
test/dm/test-dm.sh | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/test/dm/test-dm.sh b/test/dm/test-dm.sh
index bb99677..8ebc392 100755
--- a/test/d
Allow parent drivers to be called when a new child is bound to them. This
allows a bus to set up information it needs for that child.
Signed-off-by: Simon Glass
---
drivers/core/device.c | 12
include/dm/device.h | 2 ++
test/dm/bus.c | 35 +++
This is useful to check which uclass a device is in.
Signed-off-by: Simon Glass
---
drivers/core/device.c | 5 +
include/dm/device.h | 8
test/dm/core.c| 11 +++
3 files changed, 24 insertions(+)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index
In many cases the child platform data for a device's children is defined by
the uclass rather than the individual devices. For example, a SPI bus needs
to know the chip select and speed for each of its children. It makes sense
to allow this information to be defined the SPI uclass rather than each
The root device corresponds to the root device tree node, so set this up.
Also add a few notes to the documentation.
Signed-off-by: Simon Glass
---
doc/driver-model/README.txt | 4
drivers/core/root.c | 3 +++
2 files changed, 7 insertions(+)
diff --git a/doc/driver-model/README.t
Make the error handling more standard to make it easier to build on top of
it. Also correct a bug in the error path where there is no parent.
Signed-off-by: Simon Glass
---
drivers/core/device.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/core
On Thu 2015-01-15 01:04:30, Marek Vasut wrote:
> On Wednesday, January 14, 2015 at 05:41:01 PM, dingu...@opensource.altera.com
> wrote:
> > From: Dinh Nguyen
> >
> > Signed-off-by: Dinh Nguyen
> > ---
> > arch/arm/cpu/armv7/socfpga/spl.c | 8
> > 1 file changed, 8 insertions(+)
> >
>
On Wed 2015-01-14 10:40:57, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Signed-off-by: Dinh Nguyen
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
On Tue 2015-01-13 17:10:24, Alexey Brodkin wrote:
> If for some reason DMA module fails to reset user oserves only this:
> --->---
> # dhcp
> Trying dwmac.e0018000
> FAIL
> --->---
>
> This message makes not much sense.
> With proposed change error message will be more helpful:
> --->---
> # dhcp
On Fri, Jan 16, 2015 at 10:11:43AM -0800, Simon Glass wrote:
> On 16 January 2015 at 10:14, Tom Rini wrote:
> > On Tue, Jan 13, 2015 at 06:38:51PM -0800, Simon Glass wrote:
> >
> >> Hi Tom,
> >>
> >> Do you think we can apply the ARM SPL patch early in this merge
> >> window? There is your series
On Wed 2015-01-14 10:40:46, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> These functions will be needed for use by the SPL for enabling the
> console and sdram initialization.
>
> Signed-off-by: Dinh Nguyen
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pav
On Wed 2015-01-14 10:40:45, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Update SPL linker file to use SRAM.
>
> Signed-off-by: Dinh Nguyen
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/
Hi!
> > +void wait_di_buffer(void)
> > +{
> > + if (debug_data->di_report.cur_samples == NUM_DI_SAMPLE) {
> > + debug_data->di_report.flags |= DI_REPORT_FLAGS_READY;
> > + while (debug_data->di_report.cur_samples != 0)
> > + ;
>
> Please get rid of such end
Hi!
> > > -#define CONFIG_ENV_IS_NOWHERE
> > >
> > > #define CONFIG_ENV_SIZE 4096
> > >
> > > +#define CONFIG_ENV_IS_IN_MMC
> > > +#define CONFIG_SYS_MMC_ENV_DEV 0/* device 0 */
> > > +#define CONFIG_ENV_OFFSET512/* just after the MBR */
> > > +
> >
>
On 16 January 2015 at 10:14, Tom Rini wrote:
> On Tue, Jan 13, 2015 at 06:38:51PM -0800, Simon Glass wrote:
>
>> Hi Tom,
>>
>> Do you think we can apply the ARM SPL patch early in this merge
>> window? There is your series for TI, then mine which sits on top. It
>> is possible that something may b
Hi Tom,
On 9 December 2014 at 08:04, Simon Glass wrote:
> On 8 December 2014 at 00:23, Martin Dorwig wrote:
>> this is an atempt to make the export of functions typesafe.
>> I replaced the jumptable void ** by a struct (jt_funcs) with function
>> pointers.
>> The EXPORT_FUNC macro now has 3 fix
On Fri, Jan 16, 2015 at 4:42 PM, Bill Pringlemeir
wrote:
> On 16 Jan 2015, anton.habeg...@delta-es.com wrote:
>
>> What does a "dangling branch" and "dangling match" mean? Are those
>> situations handled differently under U-Boot?
>
> ... I don't know about this. However, it is easy to think that
Yuantian,
On 01/15/2015 06:23 PM, Tang Yuantian-B29983 wrote:
> Hi York,
>
> Yes, I did it on purpose. T102XQDS is not supported in SDK1.7 anymore.
> So I don't want to put more efforts to add SPI/NAND/SD boot deep sleep
> support.
That's not a good reason. Regardless if Freescale SDK supports
Hi Albert,
On 16 January 2015 at 01:09, Albert ARIBAUD (3ADEV)
wrote:
> Signed-off-by: Albert ARIBAUD (3ADEV)
> ---
>
> arch/arm/cpu/armv7/omap3/Kconfig | 5 +
> board/quipos/cairo/Kconfig | 12 ++
> board/quipos/cairo/Makefile | 8 +
> board/quipos/cairo/cairo.c | 90 +++
Hi Albert,
On 16 January 2015 at 00:19, Albert ARIBAUD (3ADEV)
wrote:
> Signed-off-by: Albert ARIBAUD (3ADEV)
> ---
>
> arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 ++
> drivers/gpio/Makefile| 1 +
> drivers/gpio/lpc32xx_gpio.c | 223
>
On Tue, Jan 13, 2015 at 06:38:51PM -0800, Simon Glass wrote:
> Hi Tom,
>
> Do you think we can apply the ARM SPL patch early in this merge
> window? There is your series for TI, then mine which sits on top. It
> is possible that something may break, but if we do it now then there
> is plenty of t
Hi David,
> It looks like the entry point is 0x4. Why does the tutorial state
> that the example needs to be run from a 4 byte offset? In this case
> this
> will result in a failure to create a stack frame for hello_world.
For PowerPC the entry point used to be non-deterministic, but was
g
Hi Alexey,
On 15 January 2015 at 13:49, Alexey Brodkin wrote:
> Hi Simon, Masahiro-san,
>
> On Thu, 2015-01-15 at 12:44 -0700, Simon Glass wrote:
>> Hi Masahiro,
>> > Honestly, I do not like baseline options in board-Kconfig very much.
>> > The advantage is that it works without any change.
>> >
On Fri, Jan 16, 2015 at 1:19 AM, Albert ARIBAUD (3ADEV) <
albert.arib...@3adev.fr> wrote:
>
> Signed-off-by: Albert ARIBAUD (3ADEV)
Looks reasonable.
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/l
On Fri, 2015-01-16 at 17:03 +0100, Thierry Reding wrote:
> On Fri, Jan 16, 2015 at 10:24:03AM +, Ian Campbell wrote:
> > On Fri, 2015-01-16 at 11:05 +0100, Thierry Reding wrote:
> > > On Fri, Jan 16, 2015 at 09:43:22AM +, Ian Campbell wrote:
> > > > On Thu, 2015-01-15 at 15:55 +0100, Thierr
This patch is to implement pmic_mode_init function, and add prototype
in header file.
This function is to set switching mode for pmic buck regulators to
improve system efficiency.
Mode:
OFF: The regulator is switched off and the output voltage is discharged.
PFM: In this mode, the regulator is al
Add more pfuze register offset.
And switch mode definition.
Signed-off-by: Peng Fan
---
Changes v4:
none
Changes v3:
none
Changes v2:
none
include/power/pfuze100_pmic.h | 53 +++
1 file changed, 53 insertions(+)
diff --git a/include/power/pfuze100_
To normal mode, use APS switching mode.
To standy mode, use PFM switching mode.
Signed-off-by: Peng Fan
---
Changes v4:
none
Changes v3:
Following Fabio's comments, correct return value
Changes v2:
none
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 6 ++
board/freescale/mx6sabresd/m
Hi, Przemyslaw
There is a few return value comments that from Fabio, I correct them and
send out v4 version. Others are same to the v1 version patch set. If
this patch set is fine, please give you Acked-by. Sorry for the troubles.
This patch set is to support buck regulator can
working in differe
On Fri, Jan 16, 2015 at 10:24:03AM +, Ian Campbell wrote:
> On Fri, 2015-01-16 at 11:05 +0100, Thierry Reding wrote:
> > On Fri, Jan 16, 2015 at 09:43:22AM +, Ian Campbell wrote:
> > > On Thu, 2015-01-15 at 15:55 +0100, Thierry Reding wrote:
> > > > On Wed, Jan 14, 2015 at 08:58:41AM +,
On Mon, Jul 14, 2014 at 04:37:36PM -0400, Tom Rini wrote:
> On Sat, Jul 12, 2014 at 06:42:31PM +0530, Jagan Teki wrote:
> > On Sat, Jul 12, 2014 at 2:23 AM, Tom Rini wrote:
> > > From: Vinothkumar Rajendran
> > >
> > > By default QSPI data through-put in memory mapped mode is ~2.4MB/sec @
> > > 4
On Thu, Jan 15, 2015 at 05:13:24PM +0900, Masahiro Yamada wrote:
> All the 74xx_7xx boards are still non-generic boards:
> P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2
>
> Signed-off-by: Masahiro Yamada
> Cc: Wolfgang Denk
> Cc: Nye Liu
> Cc: Roy Zang
Applied to u-boot/master, thanks!
--
Tom
On Tue, Jan 13, 2015 at 04:51:47PM -0500, Tom Rini wrote:
> Just talkin' to myself here,
>
> The following changes since commit 92fa7f53f1f3f03296f8ffb14bdf1baefab83368:
>
> Prepare v2015.01 (2015-01-12 09:39:08 -0500)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boo
On Thu, Jan 15, 2015 at 05:12:19PM +0900, Masahiro Yamada wrote:
> Now TQM8xx is the only remaining board family of mpc8xx.
> It uses its own linker script, board/tqc/tqm8xx/u-boot.lds.
>
> arch/powerpc/cpu/mpc8xx/u-boot.lds is not used by any boards.
>
> Signed-off-by: Masahiro Yamada
> Cc: Wo
On Wed, Jan 14, 2015 at 10:20:06PM -0700, Simon Glass wrote:
> Hi Tom,
>
> Can we please try that again? I think I did something wrong. The
> branch name is 'buildman'. I am still getting errors about not pushing
> the code there, for non-master branches.
>
>
> The following changes since commi
On Thu, Jan 15, 2015 at 05:10:56PM +0900, Masahiro Yamada wrote:
> Since commit 843125daebd7 (ppc4xx: remove HH405 board), CONFIG_HH405
> is not defined.
>
> Since commit d52633047913 (ppc4xx: remove PMC405), CONFIG_PMC405
> is not defined.
>
> Signed-off-by: Masahiro Yamada
> Cc: Matthias Fuch
On 16 Jan 2015, anton.habeg...@delta-es.com wrote:
> What does a "dangling branch" and "dangling match" mean? Are those
> situations handled differently under U-Boot?
... I don't know about this. However, it is easy to think that the
issue is with the UbiFs layer as it doesn't mount. However, i
I'm definitely not a friend of Outlook,
here the third trial with my personal account.
We have a PPC MPC5125 device with 64MB NOR flash. The U-boot has to load
the kernel and initramfs from a UBIFS partition.
Recently we made an upgrade from U-Boot version V2010.12 to version
Signed-off-by: Albert ARIBAUD (3ADEV)
---
arch/arm/include/asm/arch-omap3/mem.h | 43 +++
1 file changed, 43 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/mem.h
b/arch/arm/include/asm/arch-omap3/mem.h
index 0b78c1c..3ce270c 100644
--- a/arch/arm/inc
Hello list,
I'm using u-boot-2014.10 and trying to build it with LCD support for the
Beaglebone black to include a Boot logo image.
It seems that spl hangs while fat loading a 2.8MB sized u-boot.img !
I reduced the the logo header file and rebuild u-boot, that worked for a
1.6MB sized u-boot.img
Signed-off-by: Albert ARIBAUD (3ADEV)
---
arch/arm/include/asm/arch-omap3/mux.h | 51 +--
1 file changed, 49 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/mux.h
b/arch/arm/include/asm/arch-omap3/mux.h
index eba4a5c..3277b40 100644
--
Signed-off-by: Albert ARIBAUD (3ADEV)
---
arch/arm/include/asm/arch-omap3/mmc_host_def.h | 1 +
drivers/mmc/omap_hsmmc.c | 4
2 files changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h
b/arch/arm/include/asm/arch-omap3/mmc_host_def.h
Signed-off-by: Albert ARIBAUD (3ADEV)
---
arch/arm/cpu/armv7/omap3/Kconfig | 5 +
board/quipos/cairo/Kconfig | 12 ++
board/quipos/cairo/Makefile | 8 +
board/quipos/cairo/cairo.c | 90
board/quipos/cairo/cairo.h | 321
configs/c
introduces the AM3703-based Quipos Cairo board.
NOTES:
Two checkpatch diagnostics are left uncorrected:
1. "warning: arch/arm/cpu/armv7/omap3/Kconfig,94: please write a paragraph
that describes the config symbol fully"
No other symbol of the same nature has such a paragraph, so I left it
These are needed for the upcoming Cairo board support.
Signed-off-by: Albert ARIBAUD (3ADEV)
---
arch/arm/cpu/armv7/omap3/clock.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index 529ad9a..006969e 100644
--- a/
Signed-off-by: Albert ARIBAUD (3ADEV)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 6 +-
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 7a29131..4f15
On Fri, Jan 16, 2015 at 1:25 PM, Peng Fan wrote:
> +int pfuze_mode_init(struct pmic *p, u32 mode)
> +{
> + unsigned char offset, i, switch_num;
> + u32 id, ret;
> +
> + pmic_reg_read(p, PFUZE100_DEVICEID, &id);
> + id = id & 0xf;
> +
> + if (id == 0) {
> +
To normal mode, use APS switching mode.
To standy mode, use PFM switching mode.
Signed-off-by: Peng Fan
---
Changes v3:
Following Fabio's comments, correct return value
Changes v2:
none
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 6 ++
board/freescale/mx6sabresd/mx6sabresd.c |
Add more pfuze register offset.
And switch mode definition.
Signed-off-by: Peng Fan
---
Changes v3:
none
Changes v2:
none
include/power/pfuze100_pmic.h | 53 +++
1 file changed, 53 insertions(+)
diff --git a/include/power/pfuze100_pmic.h b/include/po
This patch is to implement pmic_mode_init function, and add prototype
in header file.
This function is to set switching mode for pmic buck regulators to
improve system efficiency.
Mode:
OFF: The regulator is switched off and the output voltage is discharged.
PFM: In this mode, the regulator is al
Hi, Przemyslaw
There is a return value comments that from Fabio, I correct it and send
out v3 version. Others are same to the v1 version patch set. If this
patch set is fine, please give you Acked-by. Sorry for the troubles.
This patch set is to support buck regulator can
working in different swi
Sorry, there is something wrong with my mail client.
Here again the same with hopefully better line endings.
We have a PPC MPC5125 device with 64MB NOR flash. The U-boot has to load
the kernel and initramfs from a UBIFS partition.
Recently we made an upgrade from U-Boot vers
Hello Heiko
We have a PPC MPC5125 device with 64MB NOR flash. The U-boot has to load
the kernel and initramfs from a UBIFS partition.
Recently we made an upgrade from U-Boot version V2010.12 to version
V2014.10. Now after some regression tests with power cuts, we got an
On Fri, Jan 16, 2015 at 2:10 AM, Scott Wood wrote:
> On Wed, 2015-01-14 at 19:16 +0530, Bhupesh Sharma wrote:
> > This patch adds basic constructs in the ARMv8 u-boot code
> > to handle and apply Cortex-A57 specific erratas.
> >
> > As and example, the framework showcases how erratas 833069, 8269
On Friday, January 16, 2015 at 08:19:19 AM, Albert ARIBAUD (3ADEV) wrote:
> Signed-off-by: Albert ARIBAUD (3ADEV)
> ---
>
> Makefile | 3 +
> scripts/Makefile.spl | 11
> tools/.gitignore | 1 +
> tools/Makefile| 2 +
> tools/mklpc32xxboot.c | 169
> +++
Hello Bo
Am 16.01.2015 03:53, schrieb Bo Shen:
Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.
As the boot from SD/MMC card with FAT file system, the BSS
segment is too big to fit into SRAM, so, use the lds to put
it into S
Hi all,
I have compiled the hello_world standalone API example documented at
http://www.denx.de/wiki/view/DULG/UBootStandalone for the Freescale
P4080DS development board.
For the standalone api example hello_world, the tutorial (linked above)
states that the entry point of the application *
On Thu, Jan 15, 2015 at 8:18 AM, Peng Fan wrote:
> @@ -515,11 +516,16 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
> int power_init_board(void)
> {
> struct pmic *p;
> + unsigned int ret;
>
> p = pfuze_common_init(I2C_PMIC);
> if (!p)
> retur
Hello,
I kindly want to inquire about the following:
- The serial console for UART host based debugging is initialized and
prepared by u-boot, is it necessary for the kernel (or any other baremetal
code) to reinitialize the UART? what minimum code needs to be added to the
software layer (that u-
On Fri, 2015-01-16 at 11:05 +0100, Thierry Reding wrote:
> On Fri, Jan 16, 2015 at 09:43:22AM +, Ian Campbell wrote:
> > On Thu, 2015-01-15 at 15:55 +0100, Thierry Reding wrote:
> > > On Wed, Jan 14, 2015 at 08:58:41AM +, Ian Campbell wrote:
> > > > On Wed, 2015-01-14 at 08:57 +0100, Thierr
Hi Bo,
On 01/16/2015 10:30 AM, Bo Shen wrote:
> On 01/16/2015 05:10 PM, Andreas Bießmann wrote:
>> On 01/16/2015 03:53 AM, Bo Shen wrote:
>>> --- a/arch/arm/cpu/arm926ejs/at91/Makefile
>>> +++ b/arch/arm/cpu/arm926ejs/at91/Makefile
>>> @@ -25,5 +25,9 @@ obj-y+= reset.o
>>> obj-y+= timer
On Fri, Jan 16, 2015 at 09:43:22AM +, Ian Campbell wrote:
> On Thu, 2015-01-15 at 15:55 +0100, Thierry Reding wrote:
> > On Wed, Jan 14, 2015 at 08:58:41AM +, Ian Campbell wrote:
> > > On Wed, 2015-01-14 at 08:57 +0100, Thierry Reding wrote:
> > > > > I also pushed my tree to gitorious:
> >
On Thu, 2015-01-15 at 15:55 +0100, Thierry Reding wrote:
> On Wed, Jan 14, 2015 at 08:58:41AM +, Ian Campbell wrote:
> > On Wed, 2015-01-14 at 08:57 +0100, Thierry Reding wrote:
> > > > I also pushed my tree to gitorious:
> > > > https://gitorious.org/ijc/u-boot jetson-psci-v1
> > > >
On Fri, 2015-01-16 at 09:52 +0100, Thierry Reding wrote:
> On Thu, Jan 15, 2015 at 04:59:12PM -0700, Stephen Warren wrote:
> > On 01/13/2015 12:45 PM, Ian Campbell wrote:
> > >The secure world code is relocated to the MB just below the top of 4G, we
> > >reserve it in the FDT (by setting CONFIG_ARM
York,
> On 01/08/2015 09:13 PM, Alison Wang wrote:
> > There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id for
> > using the same SMMU3 on LS1021A.
> >
> > Signed-off-by: Xiubo Li
> > Signed-off-by: Alison Wang
> > ---
> > arch/arm/include/asm/arch-ls102xa/config.h | 1 +
On Thu, 2015-01-15 at 16:49 -0700, Stephen Warren wrote:
> On 01/13/2015 12:45 PM, Ian Campbell wrote:
> > In this case the secure code lives in RAM, and hence needs to be reserved,
> > but
> > it has been relocated, so the reservation of __secure_start does not apply.
> >
> > Add support for sett
On Thu, 2015-01-15 at 16:37 -0700, Stephen Warren wrote:
> On 01/13/2015 12:45 PM, Ian Campbell wrote:
> > I will need mc_security_cfg0/1 in a future patch and I added the rest while
> > debugging, so thought I might as well commit them.
>
> > diff --git a/arch/arm/include/asm/arch-tegra124/mc.h
Hi Andreas,
On 01/16/2015 05:10 PM, Andreas Bießmann wrote:
Hi Bo,
just a short review, more will follow this weekend.
On 01/16/2015 03:53 AM, Bo Shen wrote:
Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.
As the boot fr
This patch is to define default values for some CCSR macros
to make header files cleaner.
Signed-off-by: Alison Wang
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.
There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id
for using the same SMMU3 on LS1021A.
Signed-off-by: Xiubo Li
Signed-off-by: Alison Wang
---
Changes in v2:
- Move changing CCSR macros to a separated patch.
arch/arm/include/asm/arch-ls102xa/config.h | 1 +
.../include
York,
> On 01/15/2015 01:29 AM, Alison Wang wrote:
> > CAAM is connected to CCI-400 S0 slave interface. Disable snooping for
> > S0 will cause CAAM self test failure. This patch is to enable
> snooping
> > for S0 slave interface. These CCI-400 operations are moved to
> > board_early_init_f() to be
On Thu, Jan 15, 2015 at 07:19:37PM +, Mark Rutland wrote:
> On Wed, Jan 14, 2015 at 07:57:25AM +, Thierry Reding wrote:
> > On Tue, Jan 13, 2015 at 07:44:50PM +, Ian Campbell wrote:
> > > Hi Thierry,
> > >
> > > I needed to boot my Jetson in NS mode (in order to boot Xen) and was
> > >
Hi Bo,
just a short review, more will follow this weekend.
On 01/16/2015 03:53 AM, Bo Shen wrote:
> Supports boot up from NAND flash with software ECC eanbled.
> And supports boot up from SD/MMC card with FAT file system.
>
> As the boot from SD/MMC card with FAT file system, the BSS
> segment i
On Thu, Jan 15, 2015 at 04:59:12PM -0700, Stephen Warren wrote:
> On 01/13/2015 12:45 PM, Ian Campbell wrote:
> >The secure world code is relocated to the MB just below the top of 4G, we
> >reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
> >not protected in h/w. See ne
Hi, Andreas
On 1/16/2015 4:24 PM, Andreas Bießmann wrote:
Hi Bo, Josh,
On 01/16/2015 07:50 AM, Josh Wu wrote:
Hi, Bo
On 1/16/2015 1:27 PM, Bo Shen wrote:
Hi Josh,
On 01/16/2015 11:54 AM, Josh Wu wrote:
As the PMECC hardware has different version. In SAMA5D4 chip, the
PMECC ip
can generate
To align with other mx6 boards, change ENV offset from 384KB to
512KB position to fit a larger u-boot image.
Signed-off-by: Ye.Li
---
include/configs/mx6slevk.h |2 +-
include/configs/mx6sxsabresd.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs
On 01/16/2015 03:55 AM, Bo Shen wrote:
> As the at91cap9adk board is removed by commit: b5508344
> (ARM: remove broken "at91cap9adk" board), so the at91cap9
> code is not used anymore, and also the document for
> at91cap9 can not be found on www.atmel.com, so remove the
> at91cap9 related code.
>
Hi Bo, Josh,
On 01/16/2015 07:50 AM, Josh Wu wrote:
> Hi, Bo
>
> On 1/16/2015 1:27 PM, Bo Shen wrote:
>> Hi Josh,
>>
>> On 01/16/2015 11:54 AM, Josh Wu wrote:
>>> As the PMECC hardware has different version. In SAMA5D4 chip, the
>>> PMECC ip
>>> can generate 0xff pmecc ECC value for all 0xff sect
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