We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2: No
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4:
- Minor update per review comments from Pavel Machek
Changes in v3: None
Changes in v2:
- Remove the 'make menuconfig' in the crownbay build instructions
- Indicate all the binary blobs should be put in the board directory
doc/
There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
support so that we can use them.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use ARRAY_SIZE(mmc_
This is the follow-on patch to clean up the FSP support codes:
- Remove the _t suffix on the structures defines
- Use __packed for structure defines
- Use U-Boot's assert()
- Use standard bool true/false
- Remove read_unaligned64()
- Use memcmp() in the compare_guid()
- Remove the cast in the mems
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- New patch to rename coreboot-serial to x86-serial
arch/x86/dts/coreboot.dtsi | 2 +-
drivers/serial/Makefile| 2 +-
drivers/serial/{
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fix several typos in queensbay/Kconfig
- Change FSP_FILE and CMC_FILE description to indicate the file is
in the board directory
- Add help for FSP_TEMP_RAM_ADDR
- Add more help for CMC_
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could supp
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
configs/crownbay_defconfig | 6 ++
include/configs/crownbay.h | 52 ++
2 files changed, 58 insertions(+)
create mode 100644 configs/cr
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- New patch to use consistent name XXX_ADDR for binary blobs
Makefile | 2 +-
arch/x86/cpu/ivybridge/sdram.c | 2 +-
arch/x86/cpu/queensbay/Kconfig
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3:
- Add a commit message for the SPI
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/x86/cpu/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 7f09db5..5033d2b 100644
--- a/arch/x86/cpu/Makefile
+++ b/
Implement minimum required functions for the basic support to
queensbay platform and crownbay board.
Currently the implementation is to call fsp_init() in the car_init().
We may move that call to cpu_init_f() in the future.
Signed-off-by: Bin Meng
---
Changes in v4: None
Changes in v3:
- Updat
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Update ifdtool flags to indicate FSP and CMC files are in
the board directory
- Use consistent XXX_FILE name for binary blob file
Makefile | 10 +-
inc
From: Simon Glass
To avoid having two microcode formats, adjust the build system to support
obtaining the microcode from the device tree, even in the case where it
must be made available before the device tree can be accessed.
Signed-off-by: Simon Glass
---
Changes in v4:
- Squash the microco
This patch series add the Intel Queensbay platform support. The Queensbay
platform includes an Atom E6xx processor (codename Tunnel Creek) and a
Platform Controller Hub EG20T (codename Topcliff). The support depends
on Intel Firmware Support Package (FSP) to initialize the processor and
chipset inc
Integrate the processor microcode version 1.05 for Tunnel Creek,
CPUID device 20661h.
Signed-off-by: Bin Meng
---
Changes in v4:
- Switch to use dtsi format microcode
Changes in v3: None
Changes in v2: None
arch/x86/dts/microcode/m0220661105_cv.dtsi | 368 +
1 fil
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Besides, added SPI/SD/NAND boot deep sleep support.
Signed-off-by: Tang Yuantian
---
board/freescale/t102xrdb/ddr.c | 19 +++
board/freescale/t102xrdb/spl.c |
Add serdes protocol 0x40 and 0x5f.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/cpu/mpc85xx/t1024_serdes.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
index 7dc8385..30c4ecd 100644
--- a/arch/powerpc/cp
Hi Daniel,
I'm looking for a bit of feedback on my query below. Unless there is a
major problem I'll start to organise an implementation for review.
Thanks,
Matthew
> -Original Message-
> From: Matthew Fortune
> Sent: 08 December 2014 12:43
> To: 'u-boot@lists.denx.de'
> Subject: Implem
Signed-off-by: David Buechi
---
include/configs/cm5200.h |5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
index 7c693d6..9393864 100644
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@@ -8,6 +8,11 @@
#ifndef __CONFIG
On Wed, Dec 17, 2014 at 11:21 AM, Simon Glass wrote:
> Intel delivers microcode updates in a microcode.dat file which must be
> split up into individual files for each CPU. Add a tool which performs
> this task. It can list available microcode updates for each model and
> produce a new microcode u
Defining variable gic_dist_addr as a globe one prevents some
functions, which use it, from being used before relocation
which is the case in the deep sleep resume process on Freescale
SoC platforms.
Besides, we can always get the GIC base address by calling
get_gicd_base_address() without referring
Add deep sleep support on Freescale LS1021QDS platform.
Signed-off-by: Tang Yuantian
---
based on: u-boot-fsl-qoriq master.
depends on patch: http://patchwork.ozlabs.org/patch/420999/
which is applied to u-boot-mpc85xx master, awaiting upstream.
v2:
- added sd boot deep sleep support
ar
Hi Masahiro,
On 15 December 2014 at 21:39, Masahiro Yamada wrote:
> Hi Simon,
>
>
> On Mon, 15 Dec 2014 07:19:53 -0700
> Simon Glass wrote:
>
>> +#ifdef CONFIG_DEBUG_UART_NS16550
>> +void debug_uart_init(void)
>> +{
>> + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
>>
Hi Masahiro,
On 15 December 2014 at 21:38, Masahiro Yamada wrote:
> Hi Simon,
>
>
>
> On Mon, 15 Dec 2014 07:19:52 -0700
> Simon Glass wrote:
>
>> This came up in a discussion on the mailing list here:
>>
>> https://patchwork.ozlabs.org/patch/384613/
>>
>> My concerns at the time were:
>> - it d
Hi Masahiro,
On 15 December 2014 at 18:47, Masahiro YAMADA wrote:
> Simon,
>
>
> 2014-12-02 5:06 GMT+09:00 Simon Glass :
>> Hi Masahiro,
>>
>> On 26 November 2014 at 00:45, Masahiro Yamada
>> wrote:
>>> Hi Tom, Simon, other developers,
>>>
>>>
>>>
>>> Since commit 0d296cc2d3b8 (Provide option t
Hi Masahiro,
On 15 December 2014 at 18:38, Masahiro YAMADA wrote:
>
> Hi Simon,
>
>
> 2014-12-16 3:38 GMT+09:00 Simon Glass :
> > Hi Masahiro,
> >
> > On 15 December 2014 at 09:55, Masahiro YAMADA
> > wrote:
> >> Hi Simon,
> >>
> >>
> >> 2014-10-15 19:38 GMT+09:00 Simon Glass :
> >>> Unfortunat
Hi Bin,
On 16 December 2014 at 20:30, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Dec 17, 2014 at 11:23 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 16 December 2014 at 20:12, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Tue, Dec 16, 2014 at 1:18 PM, Simon Glass wrote:
Hi Bin,
On 15 Decem
Hi Simon,
On Wed, Dec 17, 2014 at 11:23 AM, Simon Glass wrote:
> Hi Bin,
>
> On 16 December 2014 at 20:12, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Dec 16, 2014 at 1:18 PM, Simon Glass wrote:
>>> Hi Bin,
>>>
>>> On 15 December 2014 at 08:03, Bin Meng wrote:
This is the follow-on patch t
Hi Bin,
On 16 December 2014 at 20:12, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Dec 16, 2014 at 1:18 PM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 15 December 2014 at 08:03, Bin Meng wrote:
>>> This is the follow-on patch to clean up the FSP support codes:
>>>
>>> - Remove the _t suffix on the struc
As part of the effort to support Atom processors it became apparent the
they can only support microcode updates before RAM is available. In this
early environment the device tree is not available.
This series solves this problem by updating ifdtool to provide very early
microcode access on these p
Intel delivers microcode updates in a microcode.dat file which must be
split up into individual files for each CPU. Add a tool which performs
this task. It can list available microcode updates for each model and
produce a new microcode update in U-Boot's .dtsi format.
Signed-off-by: Simon Glass
-
Hi Simon,
On Tue, Dec 16, 2014 at 1:18 PM, Simon Glass wrote:
> Hi Bin,
>
> On 15 December 2014 at 08:03, Bin Meng wrote:
>> This is the follow-on patch to clean up the FSP support codes:
>>
>> - Remove the _t suffix on the structures defines
>> - Use U-Boot's assert()
>> - Use standard bool tru
Hi Bin,
On 16 December 2014 at 03:01, Bin Meng wrote:
> On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass wrote:
>> To avoid having two microcode formats, adjust the build system to support
>> obtaining the microcode from the device tree, even in the case where it
>> must be made available before the
On Wed, Dec 17, 2014 at 4:31 AM, Hans de Goede wrote:
> The axp223 appears to be the same as the axp221, except that it uses the
> rsb to communicate rather then the p2wi. At least all the registers we use
> are 100% the same.
>
> Signed-off-by: Hans de Goede
> ---
> arch/arm/cpu/armv7/sunxi/cpu
Hi,
On Wed, Dec 17, 2014 at 4:31 AM, Hans de Goede wrote:
> sun8i (A23) introduces a new bus for communicating with the pmic, the rsb,
> the rsb is also used to communicate with the pmic on the A80, and is
> documented in the A80 user manual.
>
> This commit adds support for this based on the rsb
On 16 December 2014 at 09:31, Simon Glass wrote:
> Hi Bin,
>
> On 16 December 2014 at 02:41, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass wrote:
>>> There are several problems in the code. The device tree decode is incorrect
>>> in ways that are masked due to a
On 15 December 2014 at 22:02, Simon Glass wrote:
> There are new microcode revisions available. Update them. Also change
> the format so that the first 48 bytes are not omitted from the device tree
> data.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Update microcode with output fr
On 16 December 2014 at 02:34, Bin Meng wrote:
> On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass wrote:
>> We might end up with a few of these, so put them in their own directory.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/dts/link.dts
On 16 December 2014 at 02:33, Bin Meng wrote:
> On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass wrote:
>> Some Intel CPUs use an 'FSP' binary blob which provides an inflexible
>> means of starting up the CPU. One result is that microcode updates can only
>> be done before RAM is available and theref
Hi Nikita,
On 15 December 2014 at 05:02, Nikita Kiryanov wrote:
> Gentle ping.
>
>
> On 12/08/2014 05:14 PM, Nikita Kiryanov wrote:
>>
>> This series is a first step towards an end goal of merging all CONFIG_LCD
>> related functionality into CONFIG_VIDEO code. My plan is to start by
>> refactorin
Hi Tom,
On 9 December 2014 at 22:25, Simon Glass wrote:
> From: Thierry Reding
>
> (Commit message updated by Simon Glass who is sending
> this series originally created by Thierry)
>
> This series adds PCIe support for Tegra20, Tegra30 and Tegra124. The size is
> mostly due to the large number
Add defines to use CONFIG_SYS_GENERIC_BOARD and CONFIG_OF_LIBFDT.
Semi-separate to this: the size of the image for the da850evm has
increased to the point that the size in da850evm.h and the offset for
the environment in SPI flash no longer work. They are modified to
account for the larger image s
On Wednesday, December 17, 2014 at 12:56:46 AM, Tom Rini wrote:
> On Tue, Dec 16, 2014 at 02:56:44PM -0600, mgerlach wrote:
> > Hello Masahiro Yamada,
> >
> > Even the with this patch, we encountered a false error of generic board
> > support. The problem was very interrmittent for us, but we wer
On Tue, Dec 16, 2014 at 09:24:20AM -0800, York Sun wrote:
> Tom,
>
> The following changes since commit fc9b0b80435cda721fbdbe507c9e4f388b0ea62b:
>
> Merge branch 'master' of git://git.denx.de/u-boot-usb (2014-12-11 18:40:49
> -0500)
>
> are available in the git repository at:
>
>
> git:
On Tue, Dec 16, 2014 at 03:34:18PM +0100, Marek Vasut wrote:
> The following changes since commit 97cdf64026c7d749dd7a5c0dbaba7a60a7292ac9:
>
> Merge branch 'sandbox' of git://git.denx.de/u-boot-x86 (2014-12-04 09:24:05
> -0500)
>
> are available in the git repository at:
>
> git://git.den
This adds driver model support with this driver. This was tested by Koelsch
board and Gose board.
Signed-off-by: Nobuhiro Iwamatsu
---
V3: Add function of checking -EAGAIN without DM.
V2: Fix loop for tx fifo and tx fifo.
Fix write return code writing with DM.
drivers/serial/serial_sh.c
On Tue, Dec 16, 2014 at 02:56:44PM -0600, mgerlach wrote:
> Hello Masahiro Yamada,
>
> Even the with this patch, we encountered a false error of generic board
> support. The problem was very interrmittent for us, but we were able
> to debug the problem to performing builds on EXT3 file systems
On 16 December 2014 at 16:21, Peter Howard wrote:
> On Tue, 2014-12-16 at 17:27 +1100, Peter Howard wrote:
>> On Wed, 2014-12-10 at 19:10 -0700, Simon Glass wrote:
>> > Hi Peter,
>> >
>> > On 10 December 2014 at 18:37, Simon Glass wrote:
>> > > Hi Peter,
>> > >
>> > > On Dec 10, 2014 6:23 PM, "Pe
Hi,
2014-12-12 11:53 GMT+09:00 Simon Glass :
> On 11 December 2014 at 19:04, Nobuhiro Iwamatsu
> wrote:
>> This adds driver model support with this driver. This was tested by Koelsch
>> board and Gose board.
>>
>> Signed-off-by: Nobuhiro Iwamatsu
>> ---
>> V2: Fix loop for tx fifo and tx fifo.
On Tue, 2014-12-16 at 17:27 +1100, Peter Howard wrote:
> On Wed, 2014-12-10 at 19:10 -0700, Simon Glass wrote:
> > Hi Peter,
> >
> > On 10 December 2014 at 18:37, Simon Glass wrote:
> > > Hi Peter,
> > >
> > > On Dec 10, 2014 6:23 PM, "Peter Howard"
> > > wrote:
> > >>
> > >> On Wed, 2014-12-10
This adds Renesas rmobile ARM SoC's SD/MMC host support.
This drivers tested with Gose board and Koelsch board.
Signed-off-by: Nobuhiro Iwamatsu
---
v2: - Remove global variable, and move to sh_sdhi_host.
- Remove define for each SoCs, use instead of quirks.
- Add timeout control for l
Hi guys,
When booting a fresh imx6 board via USB-OTG, the SPL is kinda useless
for bootstrapping my board when the SPI NOR is empty and u-boot.img
payload is not available.
I currently use a non-SPL U-Boot to prepare my boards after
manufacturing (write fuses & SPI NOR), but do you see a better
On 15 December 2014 at 13:07, Kevin Hilman wrote:
> From: Kevin Hilman
>
> When CONFIG_TRACE is disabled, linking fails with:
>
> common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to
> `trace_early_init'
>
> To fix, wrap trace init calls with #ifdef CONFIG_TRACE.
>
> While at it
Hi Nikolay,
On 16 December 2014 at 15:29, Nikolay Dimitrov wrote:
> Hi Simon,
>
> I omitted one clarification, which I think it's important.
>
>
> On 12/17/2014 12:25 AM, Nikolay Dimitrov wrote:
>>
>> Hi Simon,
>>
>> On 12/17/2014 12:02 AM, Simon Glass wrote:
>>>
>>> Hi Nikolay,
>>>
>>> On 12 Dec
Hi Simon,
I omitted one clarification, which I think it's important.
On 12/17/2014 12:25 AM, Nikolay Dimitrov wrote:
Hi Simon,
On 12/17/2014 12:02 AM, Simon Glass wrote:
Hi Nikolay,
On 12 December 2014 at 11:01, wrote:
From: Nikolay Dimitrov
Fix issue in parse_verify_sum() which swaps h
Hi Przemyslaw,
On 12 December 2014 at 08:30, Przemyslaw Marczak wrote:
> Hello,
>
>
> On 12/12/2014 01:32 AM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 11 December 2014 at 05:01, Przemyslaw Marczak
>> wrote:
>>>
>>>
>>> The present fat implementation ignores FAT16 long name
>>> directory
Hi Simon,
On 12/17/2014 12:02 AM, Simon Glass wrote:
Hi Nikolay,
On 12 December 2014 at 11:01, wrote:
From: Nikolay Dimitrov
Fix issue in parse_verify_sum() which swaps handling of env-var and *address.
Move hash_command() argc check earlier.
Cosmetic change on do_hash() variable declarati
Hi Nikolay,
On 12 December 2014 at 11:01, wrote:
> From: Nikolay Dimitrov
>
> Fix issue in parse_verify_sum() which swaps handling of env-var and *address.
> Move hash_command() argc check earlier.
> Cosmetic change on do_hash() variable declaration.
> Improved help message for "hash" command.
Hello Masahiro Yamada,
Even the with this patch, we encountered a false error of generic board
support. The problem was very interrmittent for us, but we were able
to debug the problem to performing builds on EXT3 file systems which
have a time stamp resolution of one second. To reproduce the
On Tue, Dec 16, 2014 at 11:43 AM, Guillaume Gardet
wrote:
>
> Le 16/12/2014 18:16, Robert Nelson a écrit :
>
>> On Tue, Dec 16, 2014 at 5:00 AM, Guillaume GARDET
>> wrote:
>>>
>>> As reported by Robert Nelson, commit
>>> 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
>>> may break MMC RAW boot mode.
>>
Hi Przemyslaw,
On 12 December 2014 at 08:54, Przemyslaw Marczak wrote:
>
> Hello,
>
>
> On 12/12/2014 04:52 PM, Przemyslaw Marczak wrote:
>>
>> -
>> mktest_files: script for generating random size long name files
>> -
We need separate defconfigs for the v5 and v1.2 versions of this board, as
they use different DRAM parameters.
Note they also use different dtb files, as the wifi is different too.
Signed-off-by: Hans de Goede
---
configs/Ippo_q8h_v1.2_defconfig | 15 +++
1 file changed, 15 insertio
Based on the register / dram_para headers from the Allwinner u-boot / linux
sources + the init sequences from boot0.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/board.c | 3 +-
arch/arm/cpu/armv7/sunxi/dram_sun8i
The sun8i boot0 code fills the DRAM with a "random" pattern before comparing
it at different offsets to do columns, etc. detection. The sun6i boot0 code
does not do it, but it seems like a good idea to do this regardless.
The new mctl_mem_fill function this introduces is added as an inline helper
Use memcmp for mctl_mem_matches instead of DIY.
Signed-off-by: Hans de Goede
---
arch/arm/include/asm/arch-sunxi/dram.h | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h
b/arch/arm/include/asm/arch-sunxi/dram.h
index 0bf718c.
The sun8i dram code sometimes wants to enable sigma delta mode,
add a parameter to allow this.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 9 +++--
arch/arm/cpu/armv7/sunxi/dram_sun6i.c | 2 +-
arch/arm/include/asm/arch-sunxi/clock.h | 1 -
The await_completion helper is already copy pasted between the sun4i and sun6i
dram code, and we need it for sun8i too, so lets make it an inline helper in
dram.h, rather then adding yet another copy.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/dram_sun4i.c | 17 ++---
The A23 (sun8i) requires different values for these then sun6i, so make them
function parameters.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 4 +---
arch/arm/cpu/armv7/sunxi/dram_sun6i.c | 2 +-
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 2 +-
3
The dcdc1 voltage is typically used as generic 3.3V IO voltage for things like
GPIO-s, sdcard interfaces, etc. On most boards this is undervolted to 3.0V to
safe battery, but not on all, make it configurable so that we can use the
same settings as the original firmware on all boards.
Signed-off-by
Explicitly turn off unused voltages, rather then leaving them as is. Likewise
explictly enabled the dcdc convertors, rather then assuming they are already
enabled at boot.
Signed-off-by: Hans de Goede
---
board/sunxi/board.c| 10 -
drivers/power/Kconfig | 16
drivers/power/ax
dcdc4 is not used on sun8i, disable it.
While at it also add comments to the other fixed voltages to document what
they are used for.
Signed-off-by: Hans de Goede
---
board/sunxi/board.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/board/sunxi/board.c b/board
Some of the ldo-s of the axp221 are used in the same way on most boards, add
comments to the Kconfig help text to reflect this, and give them defaults
matching their typical usage.
Signed-off-by: Hans de Goede
---
configs/CSQ_CS908_defconfig | 3 ---
configs/Colombus_defconfig| 3
sun8i (A23) introduces a new bus for communicating with the pmic, the rsb,
the rsb is also used to communicate with the pmic on the A80, and is
documented in the A80 user manual.
This commit adds support for this based on the rsb driver from the allwinner
u-boot sources.
Note: Not yet ready for u
The axp223 appears to be the same as the axp221, except that it uses the
rsb to communicate rather then the p2wi. At least all the registers we use
are 100% the same.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 +-
drivers/power/Kconfig | 8 ++--
driv
The p2wi interface is only available on sun6i, adjust the gpio pinmux defines
for it to reflect this.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/p2wi.c| 4 ++--
arch/arm/include/asm/arch-sunxi/gpio.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/
Hello Marek,
On 16-12-14 14:07, Marek Vasut wrote:
Add separate image type for the Wittenstein OpenRTOS .
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
---
common/bootm_os.c | 29 +
common/image.c| 4
include/image.h | 1 +
3 files chan
On Thursday, December 04, 2014 at 11:08:32 PM, mgerlach wrote:
> On Wed, 3 Dec 2014, Pavel Machek wrote:
> > Hi!
> >
> > > >>> altr,pinmux-regs = <0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF
> > > >>> reg = <0xffd07300 0x0048>;
> > > >>> altr,pinmux-regs = <0x0 0x51010
Le 16/12/2014 18:16, Robert Nelson a écrit :
On Tue, Dec 16, 2014 at 5:00 AM, Guillaume GARDET
wrote:
As reported by Robert Nelson, commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
may break MMC RAW boot mode.
This patch fixes the check path to fix MMC Raw boot mode.
Tested raw boot mode and F
On 12/03/2014 03:08 PM, Jeffrey Ladouceur wrote:
> Following boards has incorrect number of portals defined.
> powerpc/T102xQDS
> powerpc/T102xRDB
> powerpc/T1040QDS
> powerpc/T104xRDB
>
> Signed-off-by: Jeffrey Ladouceur
> ---
Applied to u-boot-mpc85xx master, awaiting upstream.
York
__
Tom,
The following changes since commit fc9b0b80435cda721fbdbe507c9e4f388b0ea62b:
Merge branch 'master' of git://git.denx.de/u-boot-usb (2014-12-11 18:40:49
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git master
for you to fetch changes up to 002335285
On 11/20/2014 07:17 PM, yuantian.t...@freescale.com wrote:
> From: Tang Yuantian
>
> A new interface is introduced to support generic board structure.
> Converts it to use new interface.
>
> Signed-off-by: Tang Yuantian
> ---
Applied to u-boot-mpc85xx master, awaiting upstream.
York
__
On 12/14/2014 11:50 PM, Zhao Qiang wrote:
> Deep sleep for generic board is supported now,
> modify qe deep-sleep code to adapt it.
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2:
> - rebase
>
Applied to u-boot-mpc85xx master, awaiting upstream.
York
On 12/09/2014 01:00 AM, Laurentiu Tudor wrote:
> Offsets were overlaping, causing pamu access violations in
> hypervised scenarios.
>
> Signed-off-by: Cristian Sovaiala
> Signed-off-by: Laurentiu Tudor
> Reviewed-by: Fleming Andrew-AFLEMING
> Reviewed-by: Sun Yusong-R58495
> ---
Applied to u-
On 12/03/2014 11:30 PM, Gaurav Rana wrote:
> Corrected the order of arguments in memset in run_descriptor
> function. Wrong order of argumnets led to improper initialization
> of members of struct type result. This resulted in RNG instantiation
> error.
>
> Signed-off-by: Gaurav Rana
> ---
> Chan
On 12/08/2014 11:54 AM, Jeffrey Ladouceur wrote:
> Not all portals might be managed and therefore visible.
> Set the isdr register so that the corresponding isr register
> won't be set. This is required when supporting power management.
>
> Signed-off-by: Jeffrey Ladouceur
> ---
> The following d
On 12/02/2014 11:27 PM, Shengzhou Liu wrote:
> we need to differentiate dual-role MACs into two types: MACs with
> 10GEC enumeration consistent with DTSEC enumeration(defined by
> CONFIG_FSL_FM_10GEC_REGULAR_NOTATION) and other MACs without
> CONFIG_FSL_FM_10GEC_REGULAR_NOTATION defined.
>
> Signe
On 12/02/2014 11:21 AM, York Sun wrote:
> Commit f29f804a93e87c17670607641d120f431a3b0633 generalized the TLB
> mapping function, but made the DDR mapping leftover size to zero,
> causing the message not printed.
>
> Signed-off-by: York Sun
> CC: Alexander Graf
> CC: Scott Wood
> ---
> Change l
On 12/02/2014 11:18 AM, York Sun wrote:
> For DDR controller version 4.7 or newer, MRC_CYC (mode register set
> cycle time) is max(tMRD, tMOD). tMRD is 4nCK, or 8nCK (RDIMM). tMOD
> is max(12nCK, 15ns) according to JEDEC spec.
>
> DDR4 is not affected by this change.
>
> Signed-off-by: York Sun
On 11/30/2014 11:39 PM, shh@gmail.com wrote:
> From: Shaohui Xie
>
> Add following configs in header file:
> CONFIG_SYS_GENERIC_BOARD
> CONFIG_DISPLAY_BOARDINFO
>
> Signed-off-by: Shaohui Xie
> ---
Applied to u-boot-mpc85xx master, awaiting upstream.
York
___
On Tue, Dec 16, 2014 at 5:00 AM, Guillaume GARDET
wrote:
> As reported by Robert Nelson, commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
> may break MMC RAW boot mode.
> This patch fixes the check path to fix MMC Raw boot mode.
>
> Tested raw boot mode and FS boot mode on a pandaboard (rev. A3).
>
On 12/02/2014 02:25 AM, Harninder Rai wrote:
> Signed-off-by: Harninder Rai
> ---
Applied to u-boot-mpc85xx master, awaiting upstream.
York
___
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On 12/01/2014 12:21 AM, Chunhe Lan wrote:
> Signed-off-by: Chunhe Lan
> ---
Applied to u-boot-mpc85xx master, awaiting upstream.
York
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On Tuesday, December 16, 2014 at 05:07:06 PM, Lukasz Majewski wrote:
> Hi Marek,
>
> > On Tuesday, December 16, 2014 at 02:48:46 PM, Lukasz Majewski wrote:
> > [...]
> >
> > > Applied to u-boot-dfu, thanks!
> >
> > Hi,
> >
> > Will you have any PR for me for this MW please ? If so, when ?
>
>
On Tuesday, December 16, 2014 at 05:28:55 PM, Simon Glass wrote:
> On 16 December 2014 at 06:07, Marek Vasut wrote:
> > Add separate image type for the Wittenstein OpenRTOS .
> >
> > Signed-off-by: Marek Vasut
> > Cc: Simon Glass
> > Cc: Tom Rini
> > ---
> >
> > common/bootm_os.c | 29 ++
On Tuesday, December 16, 2014 at 05:27:53 PM, Simon Glass wrote:
> Hi Marek,
>
> On 16 December 2014 at 06:09, Marek Vasut wrote:
> > The malloc() calls are unnecessary, just allocate the stuff on stack.
> > While at it, reorder the code a little, so that only one variable is
> > used for the tex
On Tuesday, December 16, 2014 at 05:22:31 PM, Simon Glass wrote:
> Hi Marek,
>
> On 16 December 2014 at 06:09, Marek Vasut wrote:
> > Repair the register configuration and add proper support for the
> > display attached to both LVDS channels.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Igor Grin
On 12/16/2014 02:55 AM, Rai Harninder-B01044 wrote:
> I am not sure I followed you completely but if I just use CONFIG_BOOTDELAY
> then
> I get the following compilation error
>
>
>
> common/autoboot.c: In function 'bootdelay_process':
>
> common/autoboot.c:247:68: error: expected expression
Hi Bin,
On 16 December 2014 at 01:04, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass wrote:
>> Intel delivers microcode updates in a microcode.dat file which must be
>> split up into individual files for each CPU. Add a tool which performs
>> this task. It can list
Hi Bin,
On 16 December 2014 at 02:41, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass wrote:
>> There are several problems in the code. The device tree decode is incorrect
>> in ways that are masked due to a matching bug. Both are fixed. Also
>> microcode_read_rev()
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