Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4
(patman: RunPipe() should not pipe stdout/stderr unless asked),
Patman spits lots of "Invalid MAINTAINERS address: '-'"
error messages for patches with global changes.
It takes too long for Patman to process them.
Anyway, "M:-" does not car
Masahiro Yamada (3):
tools/genboardscfg.py: pick up also commented maitainers
MAINTAINERS: comment out invalid maintainers
MAINTAINERS: comment out blank M: field
board/LaCie/net2big_v2/MAINTAINERS| 2 +-
board/LaCie/netspace_v2/MAINTAINERS | 2 +-
board/LaCie/wireless_spac
We are still keeping invalid email addressed in MAINTAINERS
because they carry information.
The problem is that scripts/get_maintainer.pl adds emails in the
"M:" field including invalid ones.
We want to comment out invalid email addresses in MAINTAINERS
to prevent scripts/get_maintainer.pl from p
The "S:Orphan" in MAINTAINERS means that the maintainer in the
"M:" field is unreachable (i.e. the email address is not working).
(Refer to the definition of "Orphan" adopted in U-Boot
in the log of commit 31f1b654b2f395b69faa5d0d3c1eb0803923bd3b,
"boards.cfg: move boards with invalid emails to
The Central Security Unit (CSU) allows secure world software to
change the default access control policies of peripherals/bus
slaves, determining which bus masters may access them. This
allows peripherals to be separated into distinct security domains.
Combined with SMMU configuration of the system
Kconfiglib is the flexible Python Kconfig parser and library
created by Ulf Magnusson.
(https://github.com/ulfalizer/Kconfiglib)
This commit imports kconfiglib.py from
commit ce84c22e58fa59cb93679d4ead03c3cd1387965e
of https://github.com/ulfalizer/Kconfiglib
with an ISC SPDX-License-Identifier.
S
For some SoCs, the pen address may has different endianness with
the CPUs, so this need the byte revertion for it,
Signed-off-by: Xiubo Li
---
arch/arm/cpu/armv7/nonsec_virt.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt
For some SoCs, the CONFIG_SYS_CLK_FREQ maybe won't equal the ARCH
Timer's frequency.
Here using the CONFIG_TIMER_CLK_FREQ instead if the ARCH Timer's
frequency need to config here.
Signed-off-by: Xiubo Li
---
arch/arm/cpu/armv7/nonsec_virt.S | 4 ++--
include/configs/sun7i.h | 1 +
2 f
Xiubo Li (4):
ARM: HYP/non-sec: add the pen address byte reverting support.
ARM: HYP/non-sec: Fix the ARCH Timer frequency setting.
ls102xa: HYP/non-sec: support for ls102xa boards
ARM: ls102xa: allow all device accessable in non-secure state
arch/arm/cpu/armv7/ls102xa/cpu.c
Enable hypervisors utilizing the ARMv7 virtualization extension
on the LS1021A-QDS/TWR boards with the A7 core tile, we add the
required configuration variable.
Also we define the board specific smp_set_cpu_boot_addr() function
to set the start address for secondary cores in the LS1021A specific
ma
Hi Tom,
I think this series (v2) is under review now,
but I have noticed my big mistake in terms of the license.
In v2, I accidentally added GPL-2.0+ SPDX
but it should have been ISC SPDX.
I'd like you to replace it with v3.
On Mon, 1 Sep 2014 19:57:37 +0900
Masahiro Yamada wrote:
> Kcon
The idea of using Kconfiglib was given by Tom Rini.
It allows us to scan lots of defconfigs very quickly.
This commit also uses multiprocessing for further acceleration.
Signed-off-by: Masahiro Yamada
Suggested-by: Tom Rini
Acked-by: Simon Glass
---
Changes in v3:
- A minor comment fix
Chan
Masahiro Yamada (3):
SPDX: Add ISC SPDX-License-Identifier
tools: Import Kconfiglib
tools/genboardscfg.py: improve performance more with Kconfiglib
Licenses/README |1 +
Licenses/isc.txt | 17 +
tools/buildman/kconfiglib.py | 3799
Signed-off-by: Masahiro Yamada
Cc: Wolfgang Denk
---
Changes in v3: None
Changes in v2:
- Newly added
Licenses/README | 1 +
Licenses/isc.txt | 17 +
2 files changed, 18 insertions(+)
create mode 100644 Licenses/isc.txt
diff --git a/Licenses/README b/Licenses/README
index
On Monday, September 15, 2014 at 11:21:22 PM, Pavel Machek wrote:
> Hi!
>
> > Dear Marek Vasut,
> >
> > In message <1410779188-6880-13-git-send-email-ma...@denx.de> you wrote:
> > > The bit definitions for clock manager are complete chaos. Implement
> > > some basic logical order into them.
> >
On Mon 2014-09-15 13:59:25, Marek Vasut wrote:
> The code is now fixed to the point where we can safely enable
> the L1 data cache. Enable the D-Cache and set it as write-alloc.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wol
On Mon 2014-09-15 13:06:22, Marek Vasut wrote:
> The Cortex-A9 has 32-byte long L1 cachelines. Define this value.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wolfgang Denk
Acked-by: Pavel Machek
--
(english) http://www.l
On Mon 2014-09-15 13:06:21, Marek Vasut wrote:
> Add configuration for the write-allocate mode of L1 D-Cache on ARM.
> This is needed for D-Cache operation on Cortex-A9 on the SoCFPGA .
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
>
On Mon 2014-09-15 13:06:19, Marek Vasut wrote:
> Add function to enable and disable FPGA bridges. This code is used
> by the FPGA manager to disable the bridges before programming the
> FPGA and will later be also used by the initialization code for the
> chip to put the chip into well defined stat
On Mon 2014-09-15 13:06:17, Marek Vasut wrote:
> Cosmetic change to the checkboard() function output. Align the
> output with the rest of initial output produced by U-Boot.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wolfgang
On Mon 2014-09-15 13:06:12, Marek Vasut wrote:
> Add functions to reset the EMAC ethernet blocks. We cannot handle
> two EMAC ethernet blocks yet, therefore the ifdefs. Once there is
> hardware using both EMAC blocks, this ifdef will have to go.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
On Mon 2014-09-15 13:06:11, Marek Vasut wrote:
> The timer reload value is a property of the timer hardware and there
> is no reason for this to be configurable. Place this into the timer
> driver just like on the other hardware.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Ngu
Hi!
> Dear Marek Vasut,
> In message <1410779188-6880-13-git-send-email-ma...@denx.de> you wrote:
> > The bit definitions for clock manager are complete chaos. Implement
> > some basic logical order into them.
> ...
> > +#define CLKMGR_BYPASS_MAINPLL_SET(x) (((x) << 0) &
> > 0x0
On 09/15/2014 06:06 AM, Marek Vasut wrote:
> From: Pavel Machek
>
> Add the entire bulk of code to read out clock configuration from the SoCFPGA
> CPU registers. This is important for MMC, QSPI and UART drivers as otherwise
> they cannot determine the frequency of their upstream clock.
>
> Signe
On 09/15/2014 06:06 AM, Marek Vasut wrote:
> Add some stub defines, which are used by the clock code, but are
> missing from the auto-generated header file for the SoCFPGA family.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: W
On 09/15/2014 06:06 AM, Marek Vasut wrote:
> The inlining is done by GCC whe needed, there is no need to do it
s/whe/when.
Acked-by: Dinh Nguyen
thanks...
> explicitly. Furthermore, the inline keyword does not force-inline
> the code, but is only a hint for the compiler. Scrub this hint.
>
> S
On Monday, September 15, 2014 at 05:40:54 PM, Dinh Nguyen wrote:
> On 09/15/2014 06:05 AM, Marek Vasut wrote:
> > Fix remaining cache alignment issues in the DWC Ethernet driver.
> > Please note that the cache handling in the driver is making the
> > code hideous and thus the next patch cleans that
On Monday, September 15, 2014 at 06:00:47 PM, Dinh Nguyen wrote:
> On 09/15/2014 06:05 AM, Marek Vasut wrote:
> > From: Pavel Machek
> >
> > The dw_mmc driver was responding to errors with debug(). Change that
> > to prinf()/puts() respectively so that any errors are immediately
> > obvious. Also
On 09/15/14 15:57, Simon Glass wrote:
> Now that serial and GPIO are available for iMX.6, move cm_fx6 over as an
> example.
>
> Signed-off-by: Simon Glass
> ---
>
> board/compulab/cm_fx6/cm_fx6.c | 10 ++
> include/configs/cm_fx6.h | 11 +++
> 2 files changed, 21 insertion
On 09/15/14 21:04, Simon Glass wrote:
> Hi Igor,
>
> On 15 September 2014 11:13, Igor Grinberg wrote:
>> Hi Simon,
>>
>> On 09/15/14 15:57, Simon Glass wrote:
>>> GPIOs should be requested before use. Without this, driver model will not
>>> permit the GPIO to be used.
[...]
>>
>> In all the abo
Hi Simon,
On 09/15/14 15:57, Simon Glass wrote:
> Add driver model support with this driver. In this case the platform data
> is in the driver. It would be better to put this into an SOC-specific file,
> but this is best attempted when more boards are moved over to use driver
> model.
>
> Signed-
On 09/15/2014 11:59 AM, Hans de Goede wrote:
Hi,
On 09/15/2014 07:22 PM, Stephen Warren wrote:
On 09/14/2014 12:00 PM, Hans de Goede wrote:
Hi Karsten,
Thanks for testing this!
On 09/14/2014 05:43 PM, Karsten Merker wrote:
Hello,
I am currently testing the new bootcmd handling introduced a
Hi Igor,
On 15 September 2014 11:13, Igor Grinberg wrote:
> Hi Simon,
>
> On 09/15/14 15:57, Simon Glass wrote:
>> GPIOs should be requested before use. Without this, driver model will not
>> permit the GPIO to be used.
>
> Right. That should have been done from the start... Sorry for that...
> A
Current code sets reserved CG1 bits instead of CG6 bits
for pl301_mx6qper1_bch clock. Fix it.
Signed-off-by: Anatolij Gustschin
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Tim Harvey
---
board/aristainetos/aristainetos.c |2 +-
board/barco/titanium/titanium.c |2 +-
board/ga
Hello everyone,
I am using u-boot from the xilinx repo on github with the zedboard and
whenever I start the zedboard I get the "No boot file defined".
I have checked that all the variables boot_image kernel_image and
devicetree_image are normally set in zynq-common.h.
If I use fatload mmc 0 0x300
On 09/15/14 15:57, Simon Glass wrote:
> This seems to break mkimage:
>
> Invalid imximage commands Type - valid names are: BOOT_FROM, BOOT_OFFSET,
> DATA, CSF, IMAGE_VERSION
> Error: board/compulab/cm_fx6/imximage.cfg[1] - Invalid command(/*)
That is really strange, because there are multiple im
Hi,
On 09/15/2014 07:22 PM, Stephen Warren wrote:
> On 09/14/2014 12:00 PM, Hans de Goede wrote:
>> Hi Karsten,
>>
>> Thanks for testing this!
>>
>> On 09/14/2014 05:43 PM, Karsten Merker wrote:
>>> Hello,
>>>
>>> I am currently testing the new bootcmd handling introduced at
>>> http://git.denx.de
On 09/14/2014 12:00 PM, Hans de Goede wrote:
Hi Karsten,
Thanks for testing this!
On 09/14/2014 05:43 PM, Karsten Merker wrote:
Hello,
I am currently testing the new bootcmd handling introduced at
http://git.denx.de/?p=u-boot.git;a=commit;h=8cc96848f0a467922820895b6b2363b0c64163b5
on a sunxi-
From: Pavel Machek
Add code which configures the AMBA NIC-301 and the SCU on the SoCFPGA .
The code sets the access permissions for the CPU to the AMBA slaves such
that the CPU can access them in both secure and non-secure mode.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc
Configure the PL310 address filter to make sure DRAM is mapped to 0x0.
This code also configures the "remap" register of NIC-301 and sets the
required 'mpuzero' bit.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Mach
Add register definition for the NIC-301 used on SoCFPGA.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
---
arch/arm/include/asm/arch-socfpga/nic301.h | 195 +
1 file changed, 195
Add the Snoop Control Unit register definition file.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
---
arch/arm/include/asm/arch-socfpga/scu.h | 23 +++
1 file changed, 23 insertions(+)
Enable the PL310 L2 cache controller support for the SoCFPGA.
With the cache related issues resolved, this is safe to be done.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
---
include/configs/socfpga_cyclon
Hi Simon,
On 09/15/14 15:57, Simon Glass wrote:
> GPIOs should be requested before use. Without this, driver model will not
> permit the GPIO to be used.
Right. That should have been done from the start... Sorry for that...
A question below though..
>
> Signed-off-by: Simon Glass
> ---
>
> a
On 09/15/2014 06:06 AM, Marek Vasut wrote:
> From: Pavel Machek
>
> This adds watchdog disable. It is neccessary for running Linux kernel.
>
> Signed-off-by: Pavel Machek
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wolfgang
On 09/15/2014 06:05 AM, Marek Vasut wrote:
> From: Pavel Machek
>
> The dw_mmc driver was responding to errors with debug(). Change that
> to prinf()/puts() respectively so that any errors are immediately
> obvious. Also adjust english in comments.
>
> Signed-off-by: Pavel Machek
> Signed-off-b
On 09/15/2014 06:05 AM, Marek Vasut wrote:
> Fix remaining cache alignment issues in the DWC Ethernet driver.
> Please note that the cache handling in the driver is making the
> code hideous and thus the next patch cleans that up. In order to
> make this change reviewable though, the cleanup is spl
Dear Marek Vasut,
In message <1410779188-6880-26-git-send-email-ma...@denx.de> you wrote:
> From: Pavel Machek
>
> Add code necessary to program the FPGA part of SoCFPGA from U-Boot
> with an RBF blob. This patch also integrates the code into the
> FPGA driver framework in U-Boot so it can be us
On 09/15/2014 06:05 AM, Marek Vasut wrote:
> From: Pavel Machek
>
> Remove this symbol from configs, since it's unused.
>
> Signed-off-by: Pavel Machek
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wolfgang Denk
> Cc: Pavel M
Hi Christian,
On 15/09/2014 08:37, Christian Gmeiner wrote:
> 2014-09-09 16:41 GMT+02:00 Christian Gmeiner :
>> This patch adds support for the OT1200 series of devices.
>>
>> Following components are used in u-boot:
>> + ethernet
>> + i2c
>> + emmc
>> + gpio
>>
>> The main difference between the
From: Nitin Garg
Provide cgtqmx6eval board its own variant of ddr
setup config file. Move board/freescale/imx/ddr/
mx6q_4x_mt41j128.cfg to board/freescale/mx6sabresd/
as this is was designed for the mx6sabresd board.
Signed-off-by: Nitin Garg
---
Series-changes: 3
-Provide cgtqmx6eval board it
Dear Marek Vasut,
In message <1410779188-6880-13-git-send-email-ma...@denx.de> you wrote:
> The bit definitions for clock manager are complete chaos. Implement
> some basic logical order into them.
...
> +#define CLKMGR_BYPASS_MAINPLL_SET(x) (((x) << 0) & 0x0001)
> +#define CLKMGR_BYPA
On Mon, Sep 15, 2014 at 10:54 AM, Tom Rini wrote:
> On Tue, Sep 09, 2014 at 01:42:59PM -0600, Simon Glass wrote:
>> Hi,
>>
>> On 4 September 2014 16:27, Simon Glass wrote:
>>
>> > Use driver model for serial ports.
>> >
>> > Since Tegra now uses driver model for serial, adjust the definition of
>
On Fri, Sep 12, 2014 at 02:52:05PM +0530, jags gediya wrote:
> I want to implement fail-safe booting feature in my project. Basically
> my logic is, i will increase any u-boot environment variable each time
> and up on successful bring up, i want to decrease the value of that
> again. If the value
On Tue, Sep 09, 2014 at 01:42:59PM -0600, Simon Glass wrote:
> Hi,
>
> On 4 September 2014 16:27, Simon Glass wrote:
>
> > Use driver model for serial ports.
> >
> > Since Tegra now uses driver model for serial, adjust the definition of
> > V_NS16550_CLK so that it is clear that this is only use
On Tue, Sep 02, 2014 at 02:49:36PM +0300, Vasili Galka wrote:
> Hi Tom,
>
> On Thu, Aug 21, 2014 at 2:07 PM, Vasili Galka wrote:
>
> > Hi Nobuhiro,
> >
> > I'm trying to verify the correct build of all SH boards in U-Boot. What is
> > the recommended toolchain to use?
> >
> > I tried the one fro
We support one base print with different panel sizes. In order
to keep it simple we use one devicetree for the linux kernel.
The timing values for each panel is stored on an i2c EEPROM.
This EDID gets transformed to fb_videomode and later stored
in the dtb.
Signed-off-by: Christian Gmeiner
---
b
This new function is used to set all display-timings
properties based on fb_videomode.
display-timings {
timing0 {
clock-frequency = <2500>;
hactive = <640>;
vactive = <480>;
hback-porch = <48>;
hfront-porc
There may be some custom boards in the field which have
an seperate eeprom chip to store edid informations in it.
To make use of those edid information in the board code
this patch add a function to convert edid to fb_videomode.
Signed-off-by: Christian Gmeiner
---
common/edid.c | 30 ++
Allow serial_find_console_or_panic() to work without a device tree.
Signed-off-by: Simon Glass
---
drivers/serial/serial-uclass.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index d04104e..1ac943f 100644
-
The existing ll_entry_declare() permits a single element of the list to
be added to a linker list. Sometimes we want to add several objects at
once. To avoid lots of messy declarations, add a macro to support this.
Signed-off-by: Simon Glass
---
include/linker_lists.h | 21 +
Add driver model support with this driver. Boards which use this driver
should define platform data in their board files.
Signed-off-by: Simon Glass
---
drivers/serial/serial_mxc.c | 170 +---
include/serial_mxc.h| 14
2 files changed, 159 i
Now that serial and GPIO are available for iMX.6, move cm_fx6 over as an
example.
Signed-off-by: Simon Glass
---
board/compulab/cm_fx6/cm_fx6.c | 10 ++
include/configs/cm_fx6.h | 11 +++
2 files changed, 21 insertions(+)
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/boar
This seems to break mkimage:
Invalid imximage commands Type - valid names are: BOOT_FROM, BOOT_OFFSET, DATA,
CSF, IMAGE_VERSION
Error: board/compulab/cm_fx6/imximage.cfg[1] - Invalid command(/*)
Signed-off-by: Simon Glass
---
board/compulab/cm_fx6/imximage.cfg | 6 --
1 file changed, 6 de
The U_BOOT_DEVICE macro allows the declaration of a single U-Boot device.
Add an equivalent macro to declare an array of devices, for convenience.
Signed-off-by: Simon Glass
---
include/dm/platdata.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/dm/platdata.h b/include/dm/plat
Avoid duplicating the code which deals with getc() and putc(). It is fairly
simple, but may expand later.
Signed-off-by: Simon Glass
---
drivers/serial/serial-uclass.c | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/drivers/serial/serial-uc
GPIOs should be requested before use. Without this, driver model will not
permit the GPIO to be used.
Signed-off-by: Simon Glass
---
arch/arm/imx-common/i2c-mxv7.c | 14 ++
board/compulab/cm_fx6/cm_fx6.c | 9 +
board/compulab/cm_fx6/common.c | 3 +++
3 files changed, 26 in
Add driver model support with this driver. In this case the platform data
is in the driver. It would be better to put this into an SOC-specific file,
but this is best attempted when more boards are moved over to use driver
model.
Signed-off-by: Simon Glass
---
drivers/gpio/mxc_gpio.c | 291
This series adjusts the IMX serial and GPIO drivers to support driver model.
As an example of its use, the recently-added cm_fx6 board is converted over
to driver model.
Some minor driver model core changed are required to make this work and
these are included with this series.
Simon Glass (10):
The sequence number support in driver model requires device tree control.
It should be skipped if CONFIG_OF_CONTROL is not defined, and should not
require functions from fdtdec.
Signed-off-by: Simon Glass
---
drivers/core/device.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
di
Adjust this driver to use driver model and move smdk5420 boards over to
use it.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/misc/cros_ec_spi.c | 68 +++--
include/configs/peach-pit.h | 1 +
2 files changed, 60 insertions(+), 9 deletions(
This feature provides for init of a single SPI port for the soft SPI
feature. It is not really compatible with driver model since it assumes a
single SPI port. Also, inserting SPI init into the driver by means of
a #define is not very nice.
This feature is not used by any active boards, so let's r
Adjust the sandbox SPI driver to support driver model and move sandbox over
to driver model for SPI.
Signed-off-by: Simon Glass
---
Changes in v2:
- Correct sandbox's xfer() method signature
- Use 'bus' instead of 'dev' to make the API clearer
arch/sandbox/include/asm/state.h | 1 +
drivers/
We want the SPI flash probing feature to operate as a standard driver.
Add a driver for the basic probing feature used by most boards. This
will be activated by device_probe() as with any other driver.
The 'sf probe' command currently keeps track of the SPI slave that it
last used. This doesn't wo
Convert sandbox's spi flash emulation driver to use driver model.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/sandbox/include/asm/spi.h | 13 --
arch/sandbox/include/asm/state.h | 1 -
drivers/mtd/spi/sandbox.c| 326 +--
include/conf
This README is intended to help maintainers move their SPI drivers over to
driver model. It works through the required steps with an example.
Signed-off-by: Simon Glass
---
Changes in v2:
- Update for changes to exynos driver
- Fix typos reported by Jagannadha Sutradharudu Teki
doc/driver-mode
These tests use SPI flash (and the sandbox emulation) to operate.
Signed-off-by: Simon Glass
---
Changes in v2:
- Create a 'spi.bin' file for the SPI tests
test/dm/Makefile | 1 +
test/dm/spi.c | 47 +++
test/dm/test-dm.sh | 2 ++
3 files ch
Add a driver model uclass for SPI flash which supports the common
operations (read, write, erase). Since we must keep support for the
non-dm interface, some modification of the spi_flash header is required.
CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash.
Signed-off-by: Simon Gla
Reserve the 'normal' name for use by driver model, and rename the old
driver so that it is clear that it is for 'legacy' drivers only.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/spi/Makefile | 2 +-
drivers/spi/{soft_spi.c => soft_spi_legacy.c} | 0
2 f
Use driver model for exynos5 board SPI flash.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/configs/exynos-common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index 0ec2ed7..47136b3 100644
--- a/include/con
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.
Signed-off-by: Simon Glass
---
Changes in v2: None
doc/device-tree-bindings/spi/soft-spi.txt | 32
drivers/spi/Makefile
Add a simple test for SPI that uses SPI flash. It operates by creating a
SPI flash file and using the 'sf test' command to test that all
operations work correctly.
Signed-off-by: Simon Glass
---
Changes in v2: None
test/dm/Makefile | 1 +
test/dm/sf.c | 43
Adjust the sandbox cros_ec emulation driver to work with driver model, and
switch over to driver model for sandbox cros_ec.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/misc/cros_ec_sandbox.c | 90 +++---
include/configs/sandbox.h | 1 +
Add support for driver model if enabled. This involves minimal changes
to the code, mostly just plumbing around the edges.
Signed-off-by: Simon Glass
---
Changes in v2: None
common/cros_ec.c | 30 ++
drivers/misc/cros_ec.c | 122 ++
Adjust spi_flash_probe_slave() to return an error value instead of a
pointer so we get the correct error return.
Have the caller allocate memory for spi_flash to simplify error handling,
and also so that driver model can use its existing allocated memory.
Add a spi.h include in the sf_params file
At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.
This enables us to expand the number of chips that sandbox supports.
Signed-off-by: Simon Glass
Reviewed-by: Jagannadha Sutradharu
Move the exynos SPI driver over to driver model. This removes quite a bit
of boilerplate from the driver, although it adds some for driver model.
A few device tree additions are needed to make the SPI flash available.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add additional debug() statem
Since spi_flash.h is supposed to be the public API for SPI flash, move
private things to sf_internal.h. Also tidy up a few comment nits.
Signed-off-by: Simon Glass
---
Changes in v2: None
board/buffalo/lsxl/lsxl.c | 3 +-
common/cmd_sf.c| 1 +
drivers/mtd/spi/ramtron.c
Driver model uses a different way to find the SPI bus and slave from the
numbered devices given on the command line. Adjust the code to suit.
Signed-off-by: Simon Glass
---
Changes in v2: None
common/cmd_spi.c | 34 +++---
1 file changed, 27 insertions(+), 7 deletio
Add a uclass which provides access to SPI buses and includes operations
required by SPI.
For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not
The list is supposed to be terminated with a NULL name, but is not. If a
board probes a chip which does not appear in the table, U-Boot will crash
(at least on sandbox).
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/spi/sf_params.c | 1 +
1 file changed, 1 insertion(+)
diff -
Adjust this board to use the driver model soft_spi implementation.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/dts/exynos4210-universal_c210.dts | 13
board/samsung/universal_c210/universal.c | 52 --
include/configs/s5pc210_universal.h
Add a SPI device which can be used for testing SPI flash features in
sandbox.
Also add a cros_ec device since with driver model the Chrome OS EC
emulation will not otherwise be available.
Signed-off-by: Simon Glass
---
Changes in v2:
- Adjust binding to avoid Linux-specific mentions
arch/sand
Some of the #defines in spi.h are not bracketed. To avoid future mistakes
add brackets. Also add an explanatory comment for SPI_CONN_DUAL_...
Signed-off-by: Simon Glass
Reviewed-by: Jagannadha Sutradharudu Teki
---
Changes in v2: None
include/spi.h | 24
1 file change
A merge error ended up repeating a similar sentence twice. Fix it.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to fix README merge error
README | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/README b/README
index 0a0f528..298e8d6 100644
--- a/README
+
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.
Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an em
Sandbox may as well support everything. This increases the amount of code
that is built/tested by sandbox, and also provides access to all the
supported SPI flash devices.
Signed-off-by: Simon Glass
Reviewed-by: Jagannadha Sutradharudu Teki
---
Changes in v2: None
include/configs/sandbox.h |
Driver model does its own init, so we don't need this.
There is still a call in board_f.c but it is only enabled by CONFIG_HARD_SPI.
It is easy enough to disable that option when converting boards which use
it to driver model.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix a typo in the co
Some files are using SPI functions but not explitly including the SPI
header file. Fix this, since driver model needs it.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add spi.h header to dfu_sf.c and some renesas boards
board/renesas/sh7752evb/sh7752evb.c | 1 +
board/renesas/sh7753evb/sh77
In preparation for changing the error handling in this code for driver
model, move it into its own function.
Reviewed-by: Jagannadha Sutradharudu Teki
Signed-off-by: Simon Glass
---
Changes in v2: None
common/cmd_spi.c | 53 -
1 file changed
1 - 100 of 161 matches
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