From: Sonic Zhang
ADSP-BF60x is the new generation Blackfin® dual-core processor announced by
Analog Devices in late March, 2012. This patch set adds BF60x processor support
to Das U-Boot Blackfin architecture.
For more information, see http://blackfin.uclinux.org .
The v2 patches
1) fix most
Hi all
I have arm board pxa 300 xcale .Can anyone send a link what are the major
steps required to bring up board
Thanks
--
View this message in context:
http://u-boot.10912.n7.nabble.com/Steps-to-bring-up-uboot-for-pxa300-arm-tp147671.html
Sent from the U-Boot mailing list archive at Nabble.
Dear Das U-boot developers and upstream git maintainers,
I am Sonic Zhang from the Blackfin Linux team in
Analog Devices Inc. Blackfin is one of the high performance general
purpose DSPs, which can run complete OS without MMU, such as Linux. I
have worked on the Linux kernel and u-boot porting an
From: Bob Liu
Add dma support for bf60x.
Signed-off-by: Bob Liu
Signed-off-by: Sonic Zhang
---
arch/blackfin/include/asm/dma.h | 81 --
arch/blackfin/include/asm/mach-common/bits/dma.h | 54 +++-
arch/blackfin/lib/string.c |
From: Steven Miao
Add Bf60x resume from hibernate support
Signed-off-by: Steven Miao
Signed-off-by: Sonic Zhang
Signed-off-by: Bob Liu
---
arch/blackfin/cpu/initcode.c | 46 ++
1 files changed, 46 insertions(+), 0 deletions(-)
diff --git a/arch/blac
From: Sonic Zhang
Add rsi/sdh support for bf60x.
Signed-off-by: Sonic Zhang
Signed-off-by: Bob Liu
---
arch/blackfin/include/asm/mach-common/bits/sdh.h | 38 +++-
drivers/mmc/bfin_sdh.c | 68 -
2 files changed, 88 insertions(+), 18 del
From: Sonic Zhang
Board and config header files for bf609-ezkit support.
Signed-off-by: Bob Liu
Signed-off-by: Sonic Zhang
---
MAINTAINERS |3 +-
board/bf609-ezkit/Makefile| 55 +
board/bf609-ezkit/bf609-ezkit.c | 67 +++
boards.
From: Bob Liu
Signed-off-by: Bob Liu
Signed-off-by: Sonic Zhang
---
arch/blackfin/cpu/initcode.c | 13 +
arch/blackfin/cpu/start.S |2 ++
include/configs/bf609-ezkit.h |1 +
3 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/blackfin/cpu/initcode.c
From: Bob Liu
Bf60x support 16K, 64K, 16M and 64M cplb pages, this patch add support for them.
So that bf609-ezkit can use it's 128M memory.
Signed-off-by: Bob Liu
Signed-off-by: Sonic Zhang
---
arch/blackfin/include/asm/cplb.h | 31 +++
arch/blackfin/lib/board.c
From: Bob Liu
Signed-off-by: Bob Liu
Signed-off-by: Sonic Zhang
---
arch/blackfin/cpu/gpio.c| 36 +--
arch/blackfin/include/asm/gpio.h|2 +-
arch/blackfin/include/asm/mach-bf609/gpio.h | 151 +++
3 files changed, 181 insertions
From: Sonic Zhang
ADSP-BF60x is the new generation Blackfin® dual-core processor announced by
Analog Devices in late March, 2012. This patch set adds BF60x processor support
to Das U-Boot Blackfin architecture.
For more information, see http://blackfin.uclinux.org .
The v2 patches
1) fix most
From: Sonic Zhang
Set up clocks, DDR controller, Nor flash controller, reboot,
serial port. Add new SPI boot modes.
Signed-off-by: Bob Liu
Signed-off-by: Sonic Zhang
---
arch/blackfin/cpu/cpu.c|4 +-
arch/blackfin/cpu/initcode.c | 326 +++
From: Sonic Zhang
Add serial for bf60x.
Signed-off-by: Sonic Zhang
Signed-off-by: Bob Liu
---
arch/blackfin/cpu/serial.c | 81 +++--
arch/blackfin/cpu/serial.h | 222 +
arch/blackfin/cpu/serial1.h| 338 +++
From: Scott Jiang
Spi driver for bf60x is different from old one, so implement a new
driver for it.
Signed-off-by: Scott Jiang
Signed-off-by: Sonic Zhang
Signed-off-by: Bob Liu
---
.../blackfin/include/asm/mach-common/bits/spi6xx.h | 240 +++
drivers/spi/Makefile
Dear Inderpal Singh,
In message <1360841461-18028-3-git-send-email-inderpal.si...@linaro.org> you
wrote:
> The Arndale board is based on samsung's exynos5250 SOC.
> This patch adds a initial config and dts file.
>
> Signed-off-by: Inderpal Singh
> ---
> This depends on the first 6 patches from
On 14 February 2013 17:00, Inderpal Singh wrote:
> The Arndale board is based on samsung's exynos5250 SOC.
> First patch moves board specific options to board specific config file and the
> second patch adds the initial config and dts file for the arndale board.
>
> Inderpal Singh (2):
> smdk525
From: Simon Glass
The mem_manuf is not in the correct order according to the string table.
This causes cros_bundle_firmware to get the BL2 settings in the wrong
order. This patch fixes the same.
Signed-off-by: Simon Glass
Signed-off-by: Rajeshwari Shinde
---
arch/arm/include/asm/arch-exynos/s
This revomes the code under #if 0 in the s3c24x0_i2c driver.
Signed-off-by: Alim Akhtar
Signed-off-by: Rajeshwari Shinde
---
drivers/i2c/s3c24x0_i2c.c |7 ---
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 769a2
Hi Tom,
On Mon, Feb 18, 2013 at 2:45 PM, Tom Rini wrote:
> On Mon, Feb 18, 2013 at 09:06:01AM -0800, Simon Glass wrote:
>> Hi Wolfgang,
>>
>> On Mon, Feb 18, 2013 at 3:35 AM, Wolfgang Denk wrote:
>> > Dear Tom,
>> >
>> > In message <51216721.1010...@ti.com> you wrote:
>> >>
>> >> There's another
Hi Tom,
On Mon, Feb 18, 2013 at 2:52 PM, Tom Rini wrote:
> On Sun, Feb 17, 2013 at 01:32:58PM -0800, Simon Glass wrote:
>> Hi Wolfgang,
>>
>> On Sun, Feb 17, 2013 at 12:58 PM, Wolfgang Denk wrote:
>> > Dear Simon Glass,
>> >
>> > In message
>> > you
>> > wrote:
>> >> Hi Tom,
>> >>
>> >> This
Hi Tom,
On Mon, Feb 18, 2013 at 1:36 PM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 02/18/2013 02:23 PM, Wolfgang Denk wrote:
>> Dear Simon,
>>
>> In message <1361207920-24983-1-git-send-email-...@chromium.org> you
>> wrote:
>>> Many parts of the U-Boot code base are
Hi Wolfgang,
On Mon, Feb 18, 2013 at 11:23 AM, Wolfgang Denk wrote:
> Dear Simon,
>
> In message <1361207920-24983-1-git-send-email-...@chromium.org> you wrote:
>> Many parts of the U-Boot code base are sprinkled with #ifdefs. This makes
>> different boards compile different versions of the sourc
Hi,
The M29EW devices seem to report the CFI information wrong when it's in 8 bit
mode.
Due to this the buffer size detected as 1024 bytes instead of 256.
I tried to fix this bug to initialize the 256 for these flash devices.
But when I tried to get the information from flash.
Bank # 1: CFI con
Dear Otavio Salvador,
> On Mon, Feb 18, 2013 at 8:16 PM, Fabio Estevam wrote:
> > On Sun, Feb 17, 2013 at 4:45 PM, Otavio Salvador
> >
> > wrote:
> >> +#ifdef CONFIG_CMD_USB
> >> + /* Enable LAN9512 */
> >> + gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 1);
> >> +#endif
> >
Hi Otavio,
On Mon, Feb 18, 2013 at 4:30 PM, Otavio Salvador
wrote:
> On Mon, Feb 18, 2013 at 9:23 PM, Simon Glass wrote:
>> Hi Otavio,
>>
>> On Mon, Feb 18, 2013 at 1:40 PM, Otavio Salvador
>> wrote:
>>> On Mon, Feb 18, 2013 at 5:13 PM, Tom Rini wrote:
On Fri, Feb 08, 2013 at 07:11:59AM -
On 02/15/2013 02:54:12 PM, Benoît Thébaudeau wrote:
The syndrome functions should use the page number passed as argument
instead of
the page number saved upon NAND_CMD_READ0.
This does not make any difference if the NAND_NO_AUTOINCR option is
set, but
otherwise this fixes accesses to the wr
On Mon, Feb 18, 2013 at 9:23 PM, Simon Glass wrote:
> Hi Otavio,
>
> On Mon, Feb 18, 2013 at 1:40 PM, Otavio Salvador
> wrote:
>> On Mon, Feb 18, 2013 at 5:13 PM, Tom Rini wrote:
>>> On Fri, Feb 08, 2013 at 07:11:59AM -0800, Simon Glass wrote:
>>>
Note this is a tree-wide change affecting m
On Mon, Feb 18, 2013 at 8:16 PM, Fabio Estevam wrote:
> On Sun, Feb 17, 2013 at 4:45 PM, Otavio Salvador
> wrote:
>
>> +#ifdef CONFIG_CMD_USB
>> + /* Enable LAN9512 */
>> + gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 1);
>> +#endif
>
> What about doing like we do with other im
Hi Otavio,
On Mon, Feb 18, 2013 at 1:40 PM, Otavio Salvador
wrote:
> On Mon, Feb 18, 2013 at 5:13 PM, Tom Rini wrote:
>> On Fri, Feb 08, 2013 at 07:11:59AM -0800, Simon Glass wrote:
>>
>>> Note this is a tree-wide change affecting multiple architectures.
>>>
>>> At present we use __bss_start, bu
On Fri, Feb 15, 2013 at 05:59:44PM -0600, Kim Phillips wrote:
> Hi Tom,
>
> Please pull the latest set of keymile 83xx board updates:
>
> The following changes since commit 9a82b10c6657c5744802971036bb564ebc660291:
>
> Merge branch 'master' of git://git.denx.de/u-boot (2013-02-15 17:46:50
>
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/18/2013 06:48 PM, Otavio Salvador wrote:
> On Mon, Feb 18, 2013 at 8:45 PM, Tom Rini wrote:
>> -BEGIN PGP SIGNED MESSAGE- Hash: SHA1
>>
>> On 02/18/2013 06:30 PM, Otavio Salvador wrote:
>>> On Mon, Feb 18, 2013 at 7:52 PM, Tom Rini
>>>
On Mon, Feb 18, 2013 at 8:45 PM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 02/18/2013 06:30 PM, Otavio Salvador wrote:
>> On Mon, Feb 18, 2013 at 7:52 PM, Tom Rini wrote:
>>> OK, I thought I said, but maybe I didn't, I'm OK with re-using
>>> the tree, but _not_ the
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/18/2013 06:30 PM, Otavio Salvador wrote:
> On Mon, Feb 18, 2013 at 7:52 PM, Tom Rini wrote:
>> OK, I thought I said, but maybe I didn't, I'm OK with re-using
>> the tree, but _not_ the master branch, u-boot-x86/sandbox would
>> have been fine.
On Mon, Feb 18, 2013 at 7:52 PM, Tom Rini wrote:
> OK, I thought I said, but maybe I didn't, I'm OK with re-using the tree,
> but _not_ the master branch, u-boot-x86/sandbox would have been fine.
Personally I'd prefer another tree as done for other custodians. It
makes life of new developers eas
On Fri, Feb 8, 2013 at 9:11 AM, Simon Glass wrote:
> Note this is a tree-wide change affecting multiple architectures.
>
> At present we use __bss_start, but mostly __bss_end__. This seems
> inconsistent and in a number of places __bss_end is used instead.
>
> Change to use __bss_end for the BSS
On Sun, Feb 17, 2013 at 4:45 PM, Otavio Salvador
wrote:
> +#ifdef CONFIG_CMD_USB
> + /* Enable LAN9512 */
> + gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 1);
> +#endif
What about doing like we do with other imx devices and write something like:
gpio_direction_output(MXS_GPIO
Dear Simon,
In message
you wrote:
>
> > -> bloat-o-meter u-boot-before u-boot
>
> What board is this please?
That was TQM5200S
> This is the generic hashing command. What is happening here is that
> the crc32 command is getting a few more features, more like sha1sum.
> However, this might no
On Thu, Feb 14, 2013 at 3:04 PM, Tom Warren wrote:
> tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc.
> Tested on Seaboard, fully functional.
>
> Tamonten boards (medcom-wide, plutux, and tec) use a different/new
> dtsi file w/common settings.
>
> Signed-off-by: Tom Warren
Dear Otavio Salvador,
> The i.MX23 just one USB port so we shouldn't mess up with PLL1CTRL and
> USB1 port when building for i.MX23.
>
> Signed-off-by: Otavio Salvador
> ---
> Changes in v4:
> - Rework soc_ehci_hcd_{enable,disable}_clock to mxs_ehci_hcd_clock (Fabio /
> Marek)
>
> Changes in v3
On Sun, Feb 17, 2013 at 01:32:58PM -0800, Simon Glass wrote:
> Hi Wolfgang,
>
> On Sun, Feb 17, 2013 at 12:58 PM, Wolfgang Denk wrote:
> > Dear Simon Glass,
> >
> > In message
> > you
> > wrote:
> >> Hi Tom,
> >>
> >> This series includes the sandbox map_sysmem() feature, and gets the
> >> mem
On Wed, Dec 26, 2012 at 10:56:53AM -0800, Simon Glass wrote:
> This series aims to get all the memory functions running correctly
> on sandbox.
>
> There was some discussion about this a while ago, and a commit was
> added to show a possible approach:
>
> 355a8357 sandbox: Change md command to u
On Mon, Feb 18, 2013 at 09:06:01AM -0800, Simon Glass wrote:
> Hi Wolfgang,
>
> On Mon, Feb 18, 2013 at 3:35 AM, Wolfgang Denk wrote:
> > Dear Tom,
> >
> > In message <51216721.1010...@ti.com> you wrote:
> >>
> >> There's another thread I don't have yet (and I don't have this one in
> >> gmail ye
On Wed, Dec 26, 2012 at 10:57:06AM -0800, Simon Glass wrote:
> Use setenv_ulong(), setenv_hex() and setenv_addr() in drivers/
>
> Signed-off-by: Simon Glass
> ---
> fs/fs.c |4 +---
> fs/ubifs/ubifs.c |4 +---
fs/ not drivers/
--
Tom
signature.asc
Description: Digital signa
On Wed, Dec 26, 2012 at 10:57:05AM -0800, Simon Glass wrote:
> Use setenv_ulong(), setenv_hex() and setenv_addr() in common/
>
> Signed-off-by: Simon Glass
[snip]
> diff --git a/common/cmd_fdos.c b/common/cmd_fdos.c
> index fbee861..5a35cc1 100644
> --- a/common/cmd_fdos.c
> +++ b/common/cmd_fdo
This is almost exactly what we want to do, we just want to be able to hold a
key down during the boot and switch it to a recovery settings with a different
kernel/rfs, would this be supported as well?
-Original Message-
From: Alexandre Belloni [mailto:alexandre.bell...@piout.net]
Sent:
On Mon, Feb 18, 2013 at 6:36 PM, Alexandre Belloni
wrote:
> Hi,
>
> On Mon, Feb 18, 2013 at 11:44:36AM -0700, Chaves, Kevin wrote :
>> Ok is there documentation anywhere that can show the requirements for
>> supporting SPL if I'd like to be able to implement it, same with falcon
>> mode? I've al
Hi,
On Mon, Feb 18, 2013 at 11:44:36AM -0700, Chaves, Kevin wrote :
> Ok is there documentation anywhere that can show the requirements for
> supporting SPL if I'd like to be able to implement it, same with falcon mode?
> I've already got support for nitrogen6x through another vendor but they wo
On Mon, Feb 18, 2013 at 5:13 PM, Tom Rini wrote:
> On Fri, Feb 08, 2013 at 07:11:59AM -0800, Simon Glass wrote:
>
>> Note this is a tree-wide change affecting multiple architectures.
>>
>> At present we use __bss_start, but mostly __bss_end__. This seems
>> inconsistent and in a number of places _
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/18/2013 02:23 PM, Wolfgang Denk wrote:
> Dear Simon,
>
> In message <1361207920-24983-1-git-send-email-...@chromium.org> you
> wrote:
>> Many parts of the U-Boot code base are sprinkled with #ifdefs.
>> This makes different boards compile differ
This patch adds fdt nodes for peripherals which require
pin muxing and configuration. Device tree bindings for pinctrl
are kept same as required for Linux. Existing pinmux code
modified to retrieve gpio range and function related info from fdt.
Depends-on: [PATCH 0/3 V2] EXYNOS5: Add GPIO numberin
On Mon, Feb 18, 2013 at 11:01:42AM +0100, Lukasz Majewski wrote:
> Hi Tom,
>
> > On Fri, Nov 30, 2012 at 08:01:12PM +0200, Pantelis Antoniou wrote:
> >
> > > We didn't support upload/download larger than available memory.
> > > This is pretty bad when you have to update your root filesystem for
>
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/18/2013 03:39 PM, Benoît Thébaudeau wrote:
> Hi Tom,
>
> On Monday, February 18, 2013 5:40:21 PM, Tom Rini wrote:
>> On Sun, Feb 17, 2013 at 04:51:37PM +0100, Beno??t Th??baudeau
>> wrote:
>>> Hi Albert, Tom, Zhong,
>>>
>>> On Friday, February
Hi Tom,
On Monday, February 18, 2013 5:40:21 PM, Tom Rini wrote:
> On Sun, Feb 17, 2013 at 04:51:37PM +0100, Beno??t Th??baudeau wrote:
> > Hi Albert, Tom, Zhong,
> >
> > On Friday, February 15, 2013 9:54:22 PM, Beno??t Th??baudeau wrote:
> > > Signed-off-by: Beno??t Th??baudeau
> > > ---
> > >
Add defines needed to access NAND, remove second flash bank that is
actually connected to NAND.
Add nand booting support for P1022DS with hardcoded DDR config using
SPL framework from 2011
Signed-off-by: Matthew McClintock
Signed-off-by: Jerry Huang
Signed-off-by: Jiang Yutang
Signed-off-by: K
On Fri, Feb 08, 2013 at 07:11:59AM -0800, Simon Glass wrote:
> Note this is a tree-wide change affecting multiple architectures.
>
> At present we use __bss_start, but mostly __bss_end__. This seems
> inconsistent and in a number of places __bss_end is used instead.
>
> Change to use __bss_end f
On Fri, Feb 08, 2013 at 07:12:00AM -0800, Simon Glass wrote:
> We create a separate header file for link symbols defined by the link
> scripts. It is helpful to have these all in one place and try to
> make them common across architectures. Since Linux already has a similar
> file, we bring this i
On Monday, February 18, 2013 9:06:30 PM, Scott Wood wrote:
> On 02/18/2013 02:01:59 PM, Benoît Thébaudeau wrote:
> > On Monday, February 18, 2013 8:47:28 PM, Scott Wood wrote:
> > > On 02/18/2013 01:52:10 PM, Benoît Thébaudeau wrote:
> > > > On Monday, February 18, 2013 8:37:29 PM, Scott Wood wrote
On 02/18/2013 02:01:59 PM, Benoît Thébaudeau wrote:
On Monday, February 18, 2013 8:47:28 PM, Scott Wood wrote:
> On 02/18/2013 01:52:10 PM, Benoît Thébaudeau wrote:
> > On Monday, February 18, 2013 8:37:29 PM, Scott Wood wrote:
> > > On 02/17/2013 10:16:49 AM, Benoît Thébaudeau wrote:
> > > > all
On Monday, February 18, 2013 8:47:28 PM, Scott Wood wrote:
> On 02/18/2013 01:52:10 PM, Benoît Thébaudeau wrote:
> > On Monday, February 18, 2013 8:37:29 PM, Scott Wood wrote:
> > > On 02/17/2013 10:16:49 AM, Benoît Thébaudeau wrote:
> > > > Before this patch, PAD_TO was used, but there is no such
On 02/18/2013 01:52:10 PM, Benoît Thébaudeau wrote:
On Monday, February 18, 2013 8:37:29 PM, Scott Wood wrote:
> On 02/17/2013 10:16:49 AM, Benoît Thébaudeau wrote:
> > Before this patch, PAD_TO was used, but there is no such
definition
> > for this
> > board for generic SPL, so this board see
On Monday, February 18, 2013 8:37:29 PM, Scott Wood wrote:
> On 02/17/2013 10:16:49 AM, Benoît Thébaudeau wrote:
> > Hi Poonam, Andy,
> >
> > On Friday, February 15, 2013 9:54:19 PM, Benoît Thébaudeau wrote:
> > > PAD_TO is not a generic SPL configuration option, so use
> > CONFIG_SPL_MAX_SIZE
> >
On 02/17/2013 10:16:49 AM, Benoît Thébaudeau wrote:
Hi Poonam, Andy,
On Friday, February 15, 2013 9:54:19 PM, Benoît Thébaudeau wrote:
> PAD_TO is not a generic SPL configuration option, so use
CONFIG_SPL_MAX_SIZE
> instead.
>
> We want to use --pad-to with a size, but this option expects an
On 02/18/2013 01:24:44 PM, McClintock Matthew-B29882 wrote:
On Mon, Feb 18, 2013 at 1:18 PM, Scott Wood
wrote:
> On 02/18/2013 01:07:53 PM, Matthew McClintock wrote:
>>
>> @@ -118,6 +172,7 @@
>> * Localbus non-cacheable
>> * 0xe000_ 0xe80f_ Promjet/free128M
non-ca
On Mon, Feb 18, 2013 at 1:18 PM, Scott Wood wrote:
> On 02/18/2013 01:07:53 PM, Matthew McClintock wrote:
>>
>> @@ -118,6 +172,7 @@
>> * Localbus non-cacheable
>> * 0xe000_ 0xe80f_ Promjet/free128M non-cacheable
>> * 0xe800_ 0xefff_ FLASH
Dear Simon,
In message <1361207920-24983-1-git-send-email-...@chromium.org> you wrote:
> Many parts of the U-Boot code base are sprinkled with #ifdefs. This makes
> different boards compile different versions of the source code, meaning
> that we must build all boards to check for failures. It is
Add defines needed to access NAND, remove second flash bank that is
actually connected to NAND.
Add nand booting support for P1022DS with hardcoded DDR config using
SPL framework from 2011
Signed-off-by: Matthew McClintock
Signed-off-by: Jerry Huang
Signed-off-by: Jiang Yutang
Signed-off-by: K
Hi Scott,
On Monday, February 18, 2013 8:11:22 PM, Scott Wood wrote:
> On 02/18/2013 12:52:51 PM, Benoît Thébaudeau wrote:
> > On Monday, February 18, 2013 7:24:51 PM, Scott Wood wrote:
> > > On 02/18/2013 12:22:58 PM, Benoît Thébaudeau wrote:
> > > > On Monday, February 18, 2013 7:02:49 PM, Scott
On 02/18/2013 01:07:53 PM, Matthew McClintock wrote:
@@ -118,6 +172,7 @@
* Localbus non-cacheable
* 0xe000_ 0xe80f_ Promjet/free 128M
non-cacheable
* 0xe800_ 0xefff_ FLASH 128M
non-cacheable
+ * 0xff80_ 0xff80_1fff NAND 8K
non-cacheable
* 0xffdf_ 0xffdf_
On Mon, Feb 18, 2013 at 01:15:13PM -0500, Robert P. J. Day wrote:
> i hope someone here can clear up what should be a simple question --
> i'm trying to figure out what exactly is going on when building and
> flashing a u-boot image for my new AM1808 experimenter kit or, more
> accurately, someo
On 02/18/2013 12:52:51 PM, Benoît Thébaudeau wrote:
On Monday, February 18, 2013 7:24:51 PM, Scott Wood wrote:
> On 02/18/2013 12:22:58 PM, Benoît Thébaudeau wrote:
> > On Monday, February 18, 2013 7:02:49 PM, Scott Wood wrote:
> > > On 02/18/2013 12:00:52 PM, Benoît Thébaudeau wrote:
> > > > The
On Fri, Feb 15, 2013 at 6:34 PM, Scott Wood wrote:
> On 02/14/2013 03:35:13 PM, Matthew McClintock wrote:
>>
>> +#if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
>> + /* for FPGA */
>> + set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
>> + set_lbc_or(2, CONFIG_SYS_OR2_P
On Fri, Feb 15, 2013 at 05:52:45PM -0800, Julius Werner wrote:
> This patch adds a new 'usb test' command, that will set a port to a USB
> 2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes
> on both downstream hub ports and ordinary device's upstream ports. In
> addition, it
LP-8x4x is a programmable automation controller by ICP DAS. It is
shipped with outdated U-Boot v1.3.0
This patch adds enough supports to boot the board:
- 128M of 128M SDRAM
- 32M of 48M NOR Flash memory
- 1 of 4 Serial console (PXA FFUART)
- 1 of 2 Ethernet controller (DM9000)
Signed-off-by:
On Mon, Feb 18, 2013 at 01:39:45PM -0500, Tom Rini wrote:
> On Fri, Feb 01, 2013 at 07:18:58AM +, Kim B??ndergaard wrote:
>
> > ---
> > arch/arm/cpu/arm926ejs/davinci/misc.c | 2 +-
> > include/configs/da830evm.h| 1 +
> > include/configs/davinci_dm365evm.h| 1 +
> > include/c
Ok is there documentation anywhere that can show the requirements for
supporting SPL if I'd like to be able to implement it, same with falcon mode?
I've already got support for nitrogen6x through another vendor but they won't
support the spl.
I'm taking a look at board/woodburn/woodburn.c to se
On Monday, February 18, 2013 7:24:51 PM, Scott Wood wrote:
> On 02/18/2013 12:22:58 PM, Benoît Thébaudeau wrote:
> > On Monday, February 18, 2013 7:02:49 PM, Scott Wood wrote:
> > > On 02/18/2013 12:00:52 PM, Benoît Thébaudeau wrote:
> > > > The only question is if we may need to have an empty gap
On Fri, Feb 01, 2013 at 07:18:58AM +, Kim B??ndergaard wrote:
> ---
> arch/arm/cpu/arm926ejs/davinci/misc.c | 2 +-
> include/configs/da830evm.h| 1 +
> include/configs/davinci_dm365evm.h| 1 +
> include/configs/davinci_dm6467evm.h | 1 +
> include/configs/davinci_dvevm.h
On Fri, Feb 08, 2013 at 02:07:21PM -0600, Joe Hershberger wrote:
> NAND is not good at handling absolute addresses to sectors for storing
> particular data. The current implementation of the NAND env support
> works around this in several ways such as storing a pointer to the
> sector in the OOB
On 02/18/2013 12:22:58 PM, Benoît Thébaudeau wrote:
On Monday, February 18, 2013 7:02:49 PM, Scott Wood wrote:
> On 02/18/2013 12:00:52 PM, Benoît Thébaudeau wrote:
> > The only question is if we may need to have an empty gap between
the
> > SPL and
> > U-Boot within the resulting image. I don
i hope someone here can clear up what should be a simple question --
i'm trying to figure out what exactly is going on when building and
flashing a u-boot image for my new AM1808 experimenter kit or, more
accurately, someone else's modified version where the 8M of NOR flash
has been replaced wit
On Monday, February 18, 2013 7:02:49 PM, Scott Wood wrote:
> On 02/18/2013 12:00:52 PM, Benoît Thébaudeau wrote:
> > On Monday, February 18, 2013 6:27:50 PM, Tom Rini wrote:
> > > > Commit 74752ba performs a '--pad-to=$(or $(CONFIG_SPL_PAD_TO),0)'
> > > > on u-boot-spl. I could use this CONFIG_SPL_
On 02/18/2013 12:00:52 PM, Benoît Thébaudeau wrote:
On Monday, February 18, 2013 6:27:50 PM, Tom Rini wrote:
> > Commit 74752ba performs a '--pad-to=$(or $(CONFIG_SPL_PAD_TO),0)'
> > on u-boot-spl. I could use this CONFIG_SPL_PAD_TO for this series
> > too, but is it really necessary to have both
On 02/18/2013 06:28:15 AM, Benoît Thébaudeau wrote:
I'm also wondering why there is both generic SPL for NAND and legacy
"NAND SPL"
for p1_p2_rdb, all the more the "NAND SPL" version does not seem to
be used in
boards.cfg.
"p1_p2_rdb_pc" and "P1_P2_RDB" are different targets (unfortunately)
On Monday, February 18, 2013 6:27:50 PM, Tom Rini wrote:
> > Commit 74752ba performs a '--pad-to=$(or $(CONFIG_SPL_PAD_TO),0)'
> > on u-boot-spl. I could use this CONFIG_SPL_PAD_TO for this series
> > too, but is it really necessary to have both CONFIG_SPL_PAD_TO and
> > CONFIG_SPL_MAX_SIZE? In oth
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/18/2013 12:26 PM, Benoît Thébaudeau wrote:
[snip]
> But I've just seen that commit 74752ba did something for that in
> u-boot/master, and this commit is not in u-boot-imx/master on which
> I based this series. Why is u-boot-imx/master not sync'e
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/09/2013 11:21 AM, Otavio Salvador wrote:
> Hello Wolfgang,
>
> On Sat, Feb 9, 2013 at 4:54 AM, Wolfgang Denk wrote:
>> Dear Joe Hershberger,
>>
>> In message
>> <1360355280-1197-1-git-send-email-joe.hershber...@ni.com> you
>> wrote:
>>> Becaus
Many parts of the U-Boot code base are sprinkled with #ifdefs. This makes
different boards compile different versions of the source code, meaning
that we must build all boards to check for failures. It is easy to misspell
an #ifdef and there is not as much checking of this by the compiler. Multiple
On Monday, February 18, 2013 5:50:59 PM, Tom Rini wrote:
> On Sun, Feb 17, 2013 at 05:16:49PM +0100, Beno??t Th??baudeau wrote:
>
> > Hi Poonam, Andy,
> >
> > On Friday, February 15, 2013 9:54:19 PM, Beno??t Th??baudeau wrote:
> > > PAD_TO is not a generic SPL configuration option, so use
> > > C
Hi Wolfgang,
On Mon, Feb 18, 2013 at 3:35 AM, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <51216721.1010...@ti.com> you wrote:
>>
>> There's another thread I don't have yet (and I don't have this one in
>> gmail yet even). But, I am OK with custodians using their repos, but
>> not the master
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/18/2013 11:36 AM, Simon Glass wrote:
> Hi Wolfgang,
>
> On Mon, Feb 18, 2013 at 3:35 AM, Wolfgang Denk wrote:
>> Dear Tom,
>>
>> In message <51216721.1010...@ti.com> you wrote:
>>>
>>> There's another thread I don't have yet (and I don't have
On Sun, Feb 17, 2013 at 05:16:49PM +0100, Beno??t Th??baudeau wrote:
> Hi Poonam, Andy,
>
> On Friday, February 15, 2013 9:54:19 PM, Beno??t Th??baudeau wrote:
> > PAD_TO is not a generic SPL configuration option, so use CONFIG_SPL_MAX_SIZE
> > instead.
> >
> > We want to use --pad-to with a siz
Hi Andreas,
On Mon, 18 Feb 2013 11:42:07 +0100, "Andreas Bießmann"
wrote:
> On 02/18/2013 11:39 AM, Andreas Bießmann wrote:
> > Hi Albert,
> >
> > On 02/16/2013 07:20 PM, Albert ARIBAUD wrote:
>
>
>
> > It's ok so far, the arm-linux toolchain I have do not produce these
>
> I mean avr32-lin
On Sun, Feb 17, 2013 at 04:51:37PM +0100, Beno??t Th??baudeau wrote:
> Hi Albert, Tom, Zhong,
>
> On Friday, February 15, 2013 9:54:22 PM, Beno??t Th??baudeau wrote:
> > Signed-off-by: Beno??t Th??baudeau
> > ---
> > Changes in v7: None
> > Changes in v6:
> > - New patch.
> >
> > Changes in v5:
Hi Wolfgang,
On Mon, Feb 18, 2013 at 3:35 AM, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <51216721.1010...@ti.com> you wrote:
>>
>> There's another thread I don't have yet (and I don't have this one in
>> gmail yet even). But, I am OK with custodians using their repos, but
>> not the master
> "Tom" == Tom Rini writes:
Hi,
>> Quite some of the base addresses are similar, but I wonder if it
>> wouldn't be cleaner to simply have a hardware-am33xx.h /
>> hardware-ti814x.h instead of all these ifdef / elif?
Tom> Since I suspect the things common from ti814x and am33xx are also
On Sun, Feb 17, 2013 at 09:28:33PM +0100, Peter Korsgaard wrote:
> > "Matt" == Matt Porter writes:
>
> Matt> Support the ti814x specific register definitions within
> Matt> arch-am33xx.
>
> Matt> Signed-off-by: Matt Porter
> Matt> ---
> Matt> arch/arm/cpu/armv7/am33xx/sys_info.c
On Mon, Feb 18, 2013 at 03:43:14PM +0800, Macpaul Lin wrote:
> Hi Tom,
>
> Please pull a bug fix for the missing of including header which cause
> broken on NDS32 (board adp-ag102).
>
> Thanks,
> Macpaul Lin
>
> The following changes since commit ea6bd08b7717bf0d3f69ad9f016bf3b03b3eaf16:
>
>
On Mon, Feb 18, 2013 at 02:43:47PM +, Mark Jackson wrote:
> On 15/02/13 21:13, Tom Rini wrote:
> > On Thu, Feb 14, 2013 at 03:54:23PM +, Mark Jackson wrote:
> >
> >> I'm trying to diagnose why our AM335x based CPU board (based on the
> >> AM335x Starter Kit) can boot SPL and U-Boot from an
On 15/02/13 21:13, Tom Rini wrote:
> On Thu, Feb 14, 2013 at 03:54:23PM +, Mark Jackson wrote:
>
>> I'm trying to diagnose why our AM335x based CPU board (based on the
>> AM335x Starter Kit) can boot SPL and U-Boot from an MMC card, but is
>> unable to boot from NAND (connected to CS0).
>>
>>
Thanks again Jason,
On 02/17/2013 10:31 PM, Liu Hui-R64343 wrote:
-Original Message-
From: Eric Nelson [mailto:eric.nel...@boundarydevices.com]
Sent: Monday, February 18, 2013 3:24 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496;
troy.ki...@boundaryde
1 - 100 of 129 matches
Mail list logo
