Dear Scott Wood,
On 16.11.12 01:29, Scott Wood wrote:
> On 11/15/2012 06:22:11 PM, Scott Wood wrote:
>> On Mon, Nov 05, 2012 at 10:15:46AM -,
>> =?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau_=3Cbenoit=2Ethebaudeau=40advans?==?utf-8?q?ee=2Ecom=3E?=
>> wrote:
>
> Sigh, it looks like either patchwork is
DMM_LISA_MAP registers program whether memory is mapped
on particular EMIF or not. Irrespective of these registers
EMIF is getting configured. Correcting the same.
Signed-off-by: Lokesh Vutla
---
arch/arm/cpu/armv7/omap-common/emif-common.c | 41 ++
1 file changed, 36 i
On 16/11/12 08:50, Albert ARIBAUD wrote:
> Hi Minkyu,
>
> On Thu, 15 Nov 2012 21:12:52 +0900, Minkyu Kang
> wrote:
>
>
> (Was your master branch rebased?)
Yes.
Is it not recommended?
>
> Applied to u-boot-arm/master, thanks!
>
> Amicalement,
>
Thanks.
Minkyu Kang.
Am 15.11.2012 22:23, schrieb Fabio Estevam:
From: Fabio Estevam
Print CSPI clock in 'clock' command.
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx5/clock.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7
Hi Nick,
On Wed, Nov 14, 2012 at 3:59 AM, Nick Thompson wrote:
> I think there might be a bug in this commit:
>
> http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commitdiff;h=2c8fe5120f8da013cbd789be2f10cce880972836
>
> The commit makes "the netconsole buffer size configurable". It adds
> C
On 10/29/2012 09:04:51 PM, Scott Wood wrote:
Previously, in many if not all configs we were creating overlapping
TLB entries
which is illegal. This caused a crash during boot when moving
p2020rdb NAND SPL
into L2 SRAM.
Signed-off-by: Scott Wood
Cc: Prabhakar Kushwaha
Cc: Andy Fleming
--
On 11/15/2012 06:05:35 PM, Scott Wood wrote:
On Thu, Sep 27, 2012 at 11:18:38AM -, Charles Hardin wrote:
> NANDs with large page sizes are getting oob ares of 218 and 224
> so the eccpos field needs to support these larger areas since
> BCH ECC correction with 24-bit over 1024 bytes will use
On Thu, 15 Nov 2012 16:35:26 +0900
Nobuhiro Iwamatsu wrote:
> When __BYTEORDER_HAS_U64__ is not defined, we got warning following:
>
> -
> /tmp/include/linux/byteorder/little_endian.h: In function ‘__cpu_to_be64p’:
> /tmp/include/linux/byteorder/little_endian.h:71:2: warning: implicit
> dec
On 11/15/2012 06:22:11 PM, Scott Wood wrote:
On Mon, Nov 05, 2012 at 10:15:46AM -,
=?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau_=3Cbenoit=2Ethebaudeau=40advans?==?utf-8?q?ee=2Ecom=3E?=
wrote:
Sigh, it looks like either patchwork is mangling the From address or
mutt is failing to understand so
On Mon, Nov 05, 2012 at 10:16:15AM -,
=?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau_=3Cbenoit=2Ethebaudeau=40advans?==?utf-8?q?ee=2Ecom=3E?=
wrote:
> NAND Flash is erased by blocks, not by pages.
>
> Signed-off-by: Benoît Thébaudeau
> Cc: Scott Wood
Applied to u-boot-nand-flash
-Scott
_
On Mon, Nov 05, 2012 at 10:15:46AM -,
=?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau_=3Cbenoit=2Ethebaudeau=40advans?==?utf-8?q?ee=2Ecom=3E?=
wrote:
> This patch cleans up nand_util.c:
> - Fix tabs.
> - Fix typos.
> - Remove space character before opening parenthesis in function calls.
> - Fix com
On Mon, Nov 05, 2012 at 06:46:31AM -, Joe Hershberger wrote:
> Use a flag instead of a hard-coded macro so that sub-page reads can be
> enabled in other cases (such as on-die ecc).
>
> This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux
>
> Signed-off-by: Joe Hershberger
A
On Thu, Sep 27, 2012 at 11:18:38AM -, Charles Hardin wrote:
> NANDs with large page sizes are getting oob ares of 218 and 224
> so the eccpos field needs to support these larger areas since
> BCH ECC correction with 24-bit over 1024 bytes will use 168 bytes
> of the oob for ECC and is required
Hi Stephen,
On Thu, Nov 15, 2012 at 3:46 PM, Stephen Warren wrote:
> On 11/15/2012 04:31 PM, Simon Glass wrote:
>> Hi Stephen,
>>
>> On Wed, Oct 31, 2012 at 9:50 PM, Stephen Warren
>> wrote:
>>> On 10/31/2012 05:59 PM, Simon Glass wrote:
Hi,
On Fri, Oct 26, 2012 at 12:17 AM, Luca
On Wed, Sep 12, 2012 at 10:26:05PM -, Prabhakar Kushwaha wrote:
> IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
> SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
> implemented in IFC for any "system side write" into sram buffer. Reading an
> un
Hi Minkyu,
On Thu, 15 Nov 2012 21:12:52 +0900, Minkyu Kang
wrote:
> Dear Albert,
>
> The following changes since commit ccfa398547ce0b579f2e7874e78948246c739237:
>
> arm1136: Fix enable_caches() (2012-11-10 12:28:22 +0100)
>
> are available in the git repository at:
>
> git://git.denx.de
On 11/15/2012 04:31 PM, Simon Glass wrote:
> Hi Stephen,
>
> On Wed, Oct 31, 2012 at 9:50 PM, Stephen Warren wrote:
>> On 10/31/2012 05:59 PM, Simon Glass wrote:
>>> Hi,
>>>
>>> On Fri, Oct 26, 2012 at 12:17 AM, Lucas Stach wrote:
Am Donnerstag, den 25.10.2012, 19:31 -0700 schrieb Simon Gla
Hi Stephen,
On Wed, Oct 31, 2012 at 9:50 PM, Stephen Warren wrote:
> On 10/31/2012 05:59 PM, Simon Glass wrote:
>> Hi,
>>
>> On Fri, Oct 26, 2012 at 12:17 AM, Lucas Stach wrote:
>>> Am Donnerstag, den 25.10.2012, 19:31 -0700 schrieb Simon Glass:
From: Sean Paul
Add get and set gp
On Sat, Nov 3, 2012 at 8:26 AM, Wolfgang Denk wrote:
> Dear Simon Glass,
>
> In message <1351902453-27956-16-git-send-email-...@chromium.org> you
> wrote:
> > From: Vadim Bendebury
> >
> > Provide u-boot console functions to access IO space registers. A no
> > thrills implementation, accessing o
HI Wolfgang,
On Sat, Nov 3, 2012 at 8:15 AM, Wolfgang Denk wrote:
> Dear Simon Glass,
>
> In message <1351902453-27956-17-git-send-email-...@chromium.org> you wrote:
>> The CONFIG_SYS_CONSOLE_INFO_QUIET option should suppress the console
>> information, but allow boards to display it later if req
Hi Wolfgang,
On Sat, Nov 3, 2012 at 7:54 AM, Wolfgang Denk wrote:
> Dear Simon Glass,
>
> In message <1351813330-23741-7-git-send-email-...@chromium.org> you wrote:
>> Some boards want to report more than just memory size. For example, it
>> might be useful to display the memory type (DDR2, DDR3)
Hi Simon,
On Thu, 15 Nov 2012 11:35:27 -0800, Simon Glass
wrote:
> Hi Albert,
>
> On Sat, Nov 10, 2012 at 9:00 AM, Albert ARIBAUD
> wrote:
> > Move all the C runtime setup code from every start.S
> > in arch/arm into arch/arm/lib/crt0.S. This covers
> > the code sequence from isetting up the i
Hi Wolfgang,
On Sat, Nov 3, 2012 at 5:33 AM, Wolfgang Denk wrote:
> Dear Simon Glass,
>
> In message <1351813330-23741-6-git-send-email-...@chromium.org> you wrote:
>> This option displays board info after stdio is running, so that it will
>> appear on the LCD. If it is displayed earlier, the boa
> "Ilya" == Ilya Yanok writes:
Hi,
Peter> Why? You already do this in enable_gpmc_cs_config().
Ilya> Hm... Again, I'm not the one who written this code, I just stole
Ilya> it ;) but probably the idea was to disable the config even in
Ilya> case of CONFIG_CMD_NAND undefined...
Why w
Hi Wolfgang,
On Sat, Nov 3, 2012 at 8:31 AM, Wolfgang Denk wrote:
> Dear Simon Glass,
>
> In message <1351902453-27956-6-git-send-email-...@chromium.org> you wrote:
>> From: Vincent Palatin
>>
>> The name is already copied when we memopy the whole structure.
>
> memopy?
>
Done
>> --- a/common/
Hi Luka,
On Sat, Nov 3, 2012 at 1:22 AM, Luka Perkov wrote:
> Hi Simon,
>
> On Fri, Nov 02, 2012 at 05:27:18PM -0700, Simon Glass wrote:
>> From: Anton Staaf
>>
>> Gettime returns the current timer value. If CONFIG_SYS_HZ is defined
>> then the timer value is also converted to seconds.
>>
>> Te
On 09/18/2012 01:11:21 PM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 09/17/12 17:36, Scott Wood wrote:
> On Tue, Aug 21, 2012 at 11:04:14PM +0200, Benoît Thébaudeau wrote:
>> Signed-off-by: Benoît Thébaudeau
>> Cc: Scott Wood
>> Cc: Stefano Babic ---
>> Changes for v2:
Hi Wolfgang,
On Sat, Nov 3, 2012 at 8:24 AM, Wolfgang Denk wrote:
> Dear Simon Glass,
>
> In message <1351902453-27956-3-git-send-email-...@chromium.org> you wrote:
>> From: Anton Staaf
>>
>> Gettime returns the current timer value. If CONFIG_SYS_HZ is defined
>> then the timer value is also co
On Fri, Aug 03, 2012 at 05:57:21AM -, Karl O. Pinc wrote:
> Reference nand monitor commands in U-Boot README
>
> Signed-off-by: Karl O. Pinc
>
> ---
> Resend of patch to ease review/commit process.
>
> Changes for v2:
> - include a commit message
> - Change message subject to "README:"
From: Fabio Estevam
In decode_cs() function the polarity of the chip select must be taken into
account.
Also, for the case of low active chip select, the CS was activated too early.
Signed-off-by: Fabio Estevam
---
drivers/spi/mxc_spi.c |5 +++--
1 file changed, 3 insertions(+), 2 deletio
From: Fabio Estevam
Align SPI chip select naming with i.MX53 reference manual.
Signed-off-by: Fabio Estevam
---
arch/arm/include/asm/arch-mx5/mx5x_pins.h |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx5/mx5x_pins.h
b/arch/arm/include/a
From: Fabio Estevam
Measuring the spi clock line on a scope shows a 'glitch' during the reset of the
spi.
Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line
becomes
always stable.
Signed-off-by: Fabio Estevam
---
drivers/spi/mxc_spi.c |4 ++--
1 file changed, 2 in
From: Fabio Estevam
Print CSPI clock in 'clock' command.
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx5/clock.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 1c9223f..76c2c52 100644
--- a
Rodolfo Romão te mandou uma mensagem.
Só você pode ver o conteúdo desta mensagem e quem a enviou. Você pode deletar a
qualquer momento. Para responder basta clicar no link:
http://us1.badoo.com/01133556825/in/76H5DfWwTsg/?lang_id=61&m=63&mid=50a550f9003d00b5bdf903e972ef0073
Mais alg
On 11/06/2012 02:27 PM, Stephen Warren wrote:
> Commits 6dc71c8 "MMC: MXS: Toggle the generic bounce buffer on the
> boards" and 49a627f "MMC: Remove the MMC bounce buffer" replaced
> CONFIG_MMC_BOUNCE_BUFFER with CONFIG_BOUNCE_BUFFER, but missed
> converting a few boards over to the new option. Fi
Hi Peter,
On Thu, Nov 8, 2012 at 10:33 AM, Peter Korsgaard wrote:
> Ilya> +void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs
> *cs, u32 base,
> Ilya> +u32 size)
> Ilya> +{
> Ilya> +writel(0, &cs->config7);
> Ilya> +sdelay(1000);
> Ily
Hi Albert,
On Sat, Nov 10, 2012 at 9:00 AM, Albert ARIBAUD
wrote:
> Move all the C runtime setup code from every start.S
> in arch/arm into arch/arm/lib/crt0.S. This covers
> the code sequence from isetting up the initial stack
> to calling into board_init_r().
>
> Also, rewrite the C runtime set
Observed incorrect bahavior (some debug traces are enabled):
U-Boot# test = yes
test(3): '=' 'yes': returns 0
U-Boot# test yes =
test(3): 'yes' '=': returns 0
This means that any "if test" with such broken expressions (maybe due to
an empty variable) in incorrectly evaluated as true.
Signed-off-
On 15/11/2012 16:51, Lukasz Majewski wrote:
> Hi Stefano,
>
Hi Lucasz,
> I've got some questions about Falcon mode and spl export command.
>
> I've looked into the ./common/cmd_spl.c at master branch
> SHA1: 59852d03867108217fe88e3bfc3e1e9cedfe63c5
>
> Correct me if I'm wrong (or I've overlooke
Dear Lukasz Majewski,
On 15.11.2012 16:51, Lukasz Majewski wrote:
> Hi Stefano,
>
> I've got some questions about Falcon mode and spl export command.
>
> I've looked into the ./common/cmd_spl.c at master branch
> SHA1: 59852d03867108217fe88e3bfc3e1e9cedfe63c5
>
> Correct me if I'm wrong (or I'v
Hi Stefano,
I've got some questions about Falcon mode and spl export command.
I've looked into the ./common/cmd_spl.c at master branch
SHA1: 59852d03867108217fe88e3bfc3e1e9cedfe63c5
Correct me if I'm wrong (or I've overlooked something).
It looks that, this file version is a very early version.
Dear Nobuhiro Iwamatsu,
> By commit c7e3b2b5, this was chanded to support multiple controllers.
> But this has missing of parenthesis. This commit fix it.
>
> -
> r8a66597-hcd.c: In function ‘usb_lowlevel_init’:
> r8a66597-hcd.c:911:52: error: expected declaration specifiers before ‘)’
> toke
Dear Nobuhiro Iwamatsu,
> Hi, Marek.
>
> This patch was not picked to your repository yet.
> Could you apply?
Weird ... applied.
> Best regards,
> Nobuhiro
>
> On Wed, Mar 21, 2012 at 4:30 PM, Marek Vasut wrote:
> > Dear Nobuhiro Iwamatsu,
> >
> >> Some variables are initialized with a val
Dear Andreas Puls,
> Dear Marek Vasut,
>
> > Dear Andreas Puls,
> >
> > > Dear Marek Vasut,
> > >
> > > > Dear Andreas Puls,
> > > >
> > > > > Hi together,
> > > > >
> > > > > i've got another problem with latest stable U-Boot-2012.10 and a
> > > > > Toradex Colibri PXA270 V2.4
> > > > >
> >
Dear Ilya Yanok,
On 07.11.2012 00:06, Ilya Yanok wrote:
> From: Mansoor Ahamed
>
> This patch adds support for BCH8 error correction code to omap_gpmc
> driver. We use GPMC to generate codes/syndromes but we need ELM to find
> error locations from given syndrome.
>
first of all, I wonder why t
Dear Heiko,
On 15/11/12 19:58, Rajeshwari Birje wrote:
> Hi Heiko,
>
> Thank you for Acking the patchset.
> It is based on u-boot-samsung, where the basic FDT support patches for
> Exynos are submitted.
>
> Regards
> Rajeshwari Shinde.
>
> On Thu, Nov 15, 2012 at 12:26 PM, Heiko Schocher wrote
Dear Albert,
The following changes since commit ccfa398547ce0b579f2e7874e78948246c739237:
arm1136: Fix enable_caches() (2012-11-10 12:28:22 +0100)
are available in the git repository at:
git://git.denx.de/u-boot-samsung master
for you to fetch changes up to 7a5337732e3e05b2b0de1b592fa031b2
Git commit d417d1db5f9092d125ddea882ced77eaa5f3d236 replaced the
omap-common file reset.S with reset.c, but the Makefile was not
adjusted for that.
Signed-off-by: Robert P. J. Day
---
Compile and run-tested on a BeagleBoard xM (rev C), seems to work
fine.
diff --git a/arch/arm/cpu/armv7/oma
Hi Heiko,
Thank you for the comments will modify the same and resend the patch.
Regards,
Rajeshwari Shinde.
On Thu, Nov 15, 2012 at 12:29 PM, Heiko Schocher wrote:
> Hello Rajeshwari,
>
>
> On 14.11.2012 10:11, Rajeshwari Shinde wrote:
>>
>> Functions added to get the I2C bus number and reset I
Hi Heiko,
Thank you for Acking the patchset.
It is based on u-boot-samsung, where the basic FDT support patches for
Exynos are submitted.
Regards
Rajeshwari Shinde.
On Thu, Nov 15, 2012 at 12:26 PM, Heiko Schocher wrote:
> Hello Rajeshwari
>
>
> On 14.11.2012 10:11, Rajeshwari Shinde wrote:
>>
This enables new i2c framework on Trats board.
Hardware s3c24x0 i2c driver is used instead of software i2c.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
board/samsung/trats/trats.c | 26 +-
include/configs/trats.h | 16 ++
This patch modifies s3c24x0 driver for the new I2C framework.
Configs for VCMA9.h and smdk5250.h boards are modified.
Boards compile successfully but were not tested.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
drivers/i2c/i2c_core.c |5 ++
drivers/i2c
This patch modifies the S3C i2c driver to support both Exynos4 and Exynos5
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
drivers/i2c/s3c24x0_i2c.c | 19 ---
1 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c
This patch add pinmux for I2C for Exynos4
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
arch/arm/cpu/armv7/exynos/pinmux.c | 64
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinm
This patch adds i2c clock for Exynos4
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
arch/arm/cpu/armv7/exynos/clock.c | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv
This patch add the spacing for i2c for Exynos4
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
arch/arm/include/asm/arch-exynos/cpu.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/inclu
This patchset brings new I2C framework to Samsung Trats board.
It is intended to test the framework, please don't merge.
I2C clock, spacing and pinmux are added for Exynos4.
The s3c24x0 i2c driver is modified to support both Exynos4.
The s3c24x0 i2c driver is modiefied for the new I2C framework.
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