[Spice-devel] [PATCH v1 2/2] drm/ttm: enable ioremap buffer according to TTM mem caching setting for arm64

5.628811] el0t_64_sync_handler+0xb0/0xb8 [5.629206] el0t_64_sync+0x1a4/0x1a8 [5.629552] Code: a8811d07 f2400c42 b462 8b020108 (a93f1d07) [5.630152] ---[ end trace 35a380fcdcd5b8f7 ]--- Signed-off-by: Cong Liu --- drivers/gpu/drm/ttm/ttm_bo_util.c | 4 ++-- 1 file changed, 2 insert

[Spice-devel] [PATCH v1 1/2] drm/qxl: replace ioremap by ioremap_cache on arm64

] ---[ end trace 95615d89b7c87f95 ]--- Signed-off-by: Cong Liu --- drivers/gpu/drm/qxl/qxl_kms.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/qxl/qxl_kms.c b/drivers/gpu/drm/qxl/qxl_kms.c index 4dc5ad13f12c..0e61ac04d8ad 100644 --- a/drivers/gpu/drm/qxl/qxl_kms.c

[Spice-devel] [PATCH v2] drm/qxl: fix qxl can't use in arm64

qxl use ioremap to map ram_header and rom, in the arm64 implementation, the device is mapped as DEVICE_nGnRE, it can not support unaligned access. and qxl is a virtual device, it can be treated more like RAM than actual MMIO registers. use ioremap_wc() replace it. Signed-off-by: Cong Liu

Re: [Spice-devel] [PATCH v2] drm/qxl: fix qxl can't use in arm64

any suggestions or extra test I can do now? Regards, Cong On 2022/3/25 15:45, Christian König wrote: Am 24.03.22 um 11:49 schrieb Cong Liu: qxl use ioremap to map ram_header and rom, in the arm64 implementation, the device is mapped as DEVICE_nGnRE, it can not support unaligned access. and