CVS commit: src/sys/arch/arm/arm32

2015-03-26 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Thu Mar 26 08:45:05 UTC 2015 Modified Files: src/sys/arch/arm/arm32: arm32_tlb.c Log Message: don't use armreg_tlbiasidis_write() and armreg_icialluis_write() on single processor platforms. To generate a diff of this commit: c

CVS commit: src/sys/arch/arm/arm

2015-03-26 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Thu Mar 26 08:50:42 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S Log Message: set ttbr0/1 using correct register(r2). To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm/cpufun

CVS commit: src/sys

2015-04-15 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Apr 15 10:15:40 UTC 2015 Modified Files: src/sys/arch/evbarm/armadaxp: armadaxp_machdep.c armadaxp_start.S src/sys/dev/marvell: if_mvgbe.c Log Message: add u-boot argument parser for Marvell ARMADA XP/370. use 'ethad

CVS commit: src/sys/arch/evbarm/armadaxp

2015-04-15 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Apr 15 10:30:42 UTC 2015 Modified Files: src/sys/arch/evbarm/armadaxp: armadaxp_machdep.c Log Message: lookup clock frequencies of ARMADA 370 correctly. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/

CVS commit: src/sys/arch/arm/marvell

2015-04-15 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Apr 15 10:40:36 UTC 2015 Modified Files: src/sys/arch/arm/marvell: armadaxp.c armadaxpreg.h Added Files: src/sys/arch/arm/marvell: armadaxpvar.h Log Message: implement L2 cache maintenance operations of ARMADA XP. th

CVS commit: src/sys/arch/arm

2015-04-15 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Apr 15 10:52:19 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc.c cpufunc_asm_pj4b.S src/sys/arch/arm/include: cpufunc_proto.h Log Message: clean up cpufuncs of CPU_PJ4B. PJ4B is a ARMv7 compatible CPU, so mo

CVS commit: src/sys/arch/arm/marvell

2015-04-15 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Apr 15 12:11:31 UTC 2015 Modified Files: src/sys/arch/arm/marvell: armadaxp.c Log Message: add L2 cache write eviction buffer sync barrier To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/marve

CVS commit: src/sys/arch/arm/arm

2015-04-17 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Fri Apr 17 13:39:02 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: don't call L2 maintance function if L2 cache is disabled. To generate a diff of this commit: cvs rdiff -u -r1.152 -r1.153 src/sys/arch/a

CVS commit: src/sys/arch/arm/marvell

2015-04-17 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Fri Apr 17 13:43:55 UTC 2015 Modified Files: src/sys/arch/arm/marvell: armadaxp.c Log Message: sync L2 cache on the tail of region. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/marvell/armadax

CVS commit: src/sys/arch/arm/marvell

2015-05-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Sun May 3 06:29:32 UTC 2015 Modified Files: src/sys/arch/arm/marvell: armadaxp.c Log Message: write back unaligned boundary of L2 cache even if invalidate operation is requested. To generate a diff of this commit: cvs rdiff -

CVS commit: src/sys

2015-05-03 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Sun May 3 14:38:10 UTC 2015 Modified Files: src/sys/arch/arm/marvell: files.marvell mvsoc.c src/sys/arch/evbarm/armadaxp: armadaxp_machdep.c src/sys/arch/evbarm/marvell: marvellvar.h Added Files: src/sys/

CVS commit: src/sys/arch/arm/marvell

2015-05-10 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Mon May 11 05:49:48 UTC 2015 Modified Files: src/sys/arch/arm/marvell: mvsoc.c Log Message: add MARVELL Armada XP MV78260 B0(rev.2) recent OpenBlocks AX3 uses it. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 s

CVS commit: src/sys/arch

2015-05-13 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Thu May 14 05:39:32 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc.c cpufunc_asm_pj4b.S src/sys/arch/arm/include: cpufunc_proto.h src/sys/arch/arm/marvell: armadaxp.c armadaxpreg.h mvsocreg.h src/s

CVS commit: src/sys/arch/arm

2015-05-19 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Tue May 19 09:20:19 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S src/sys/arch/arm/marvell: armadaxp.c mvsocreg.h Log Message: fix Marvell Coherency Barrier register address. configure coherency bus m

CVS commit: src/sys/arch/arm

2015-05-19 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed May 20 02:59:57 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S src/sys/arch/arm/include: armreg.h Log Message: move register accessor macros for MPIDR and AUXFMC0 to armreg.h To generate a diff o

CVS commit: src/sys/net

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 02:17:51 UTC 2015 Modified Files: src/sys/net: if_gif.c Log Message: Obtain softnet_lock before entering IP networking stack from gif software interrupt. To generate a diff of this commit: cvs rdiff -u -r1.84 -r1.85

CVS commit: src/sys/arch/arm/arm

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 02:30:11 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: initialize sdcache operations for PJ4B. otherwise the kernel crashes without 'options L2CACHE_ENABLE.' To generate a diff of this commit

CVS commit: src/sys/arch/arm/marvell

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 02:53:19 UTC 2015 Modified Files: src/sys/arch/arm/marvell: armadaxp.c armadaxpreg.h armadaxpvar.h Log Message: add ARMADA XP's Soc internal bus(Mbus) address decoder initialization function. some versions of u-boot i

CVS commit: src/sys/arch/arm/marvell

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 03:04:21 UTC 2015 Modified Files: src/sys/arch/arm/marvell: mvsoc.c mvsoc_intr.h mvsocreg.h mvsocvar.h Log Message: dump Mbus settins on boot if AV_VERBOSE or AV_DEBUG is enabled. To generate a diff of this commit:

CVS commit: src/sys/arch/evbarm/marvell

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 03:25:51 UTC 2015 Modified Files: src/sys/arch/evbarm/marvell: marvell_machdep.c Log Message: initialize ARMADA XP's Mbus address decoder and code clean up probably we need more sophisticated Mbus driver or KPI... T

CVS commit: src/sys

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 03:34:38 UTC 2015 Modified Files: src/sys/arch/arm/marvell: files.marvell Added Files: src/sys/dev/marvell: files.armada Log Message: move Marvell ARMADA SoC's device driver definitions from arm/marvell to dev

CVS commit: src/sys

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 03:55:47 UTC 2015 Modified Files: src/sys/arch/arm/marvell: files.marvell mvsoc.c src/sys/dev/marvell: files.armada if_mvxpe.c if_mvxpereg.h if_mvxpevar.h Added Files: src/sys/dev/marvell: m

CVS commit: src/sys/dev/marvell

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 04:00:06 UTC 2015 Modified Files: src/sys/dev/marvell: marvellreg.h Log Message: reduce magic numbers. SDRAM address space attribute register has cache coherency control bits. this bit is important for AURORA_IO_CACHE

CVS commit: src/sys

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 04:20:02 UTC 2015 Modified Files: src/sys/arch/arm/marvell: files.marvell mvsoc.c mvsocvar.h src/sys/dev/marvell: files.armada Added Files: src/sys/dev/marvell: mvxpsec.c mvxpsecreg.h mvxpsecvar.h Log

CVS commit: src/sys/arch/evbarm/conf

2015-06-02 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 04:31:46 UTC 2015 Modified Files: src/sys/arch/evbarm/conf: ARMADAXP OPENBLOCKS_AX3 Log Message: add kernel config of if_mvxpe(new ethernet) and mvxpsec(new cryptographic). still disabled by default. I need to do more

CVS commit: src/distrib/notes/common

2014-03-28 Thread SUENAGA Hiroki
Module Name:src Committed By: hsuenaga Date: Fri Mar 28 08:24:06 UTC 2014 Modified Files: src/distrib/notes/common: main Log Message: Added myself, hsuenaga To generate a diff of this commit: cvs rdiff -u -r1.508 -r1.509 src/distrib/notes/common/main Please note that di