Module Name:src
Committed By: skrll
Date: Wed Jun 30 21:18:00 UTC 2021
Modified Files:
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm: aeabi_cfcmp.S
divmodsi4.S divsi3.S modsi3.S
Log Message:
Do previous differently by pushing even number of registers a
Module Name:src
Committed By: rin
Date: Tue Jun 29 23:26:00 UTC 2021
Modified Files:
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm: aeabi_cfcmp.S
divmodsi4.S divsi3.S modsi3.S
Log Message:
Align sp to 8-byte boundary as required by EABI.
This is espec
