Module Name:src
Committed By: thorpej
Date: Mon Jan 4 18:19:53 UTC 2021
Modified Files:
src/sys/arch/mips/sibyte/dev: sbjcn.c sbscn.c
Log Message:
malloc(9) -> kmem(9)
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/mips/sibyte/dev/sbjcn.c
cvs
Module Name:src
Committed By: msaitoh
Date: Mon Apr 22 08:39:10 UTC 2019
Modified Files:
src/sys/arch/mips/sibyte/dev: sbmac.c
Log Message:
This driver does ether_ioctl() on SIOC{ADD,DEL}MULTI, SIOC{G,S}IFMEDIA and
default case in the switch statement. Only the default ca
Module Name:src
Committed By: simonb
Date: Sun Mar 31 12:47:33 UTC 2019
Modified Files:
src/sys/arch/mips/sibyte/dev: sbmac.c
Log Message:
Allocate memory for for the ethernet DMA descriptor rings aligned to a
cache line boundary, as documented in the chip documentation.
Module Name:src
Committed By: msaitoh
Date: Wed Jan 23 07:40:05 UTC 2019
Modified Files:
src/sys/arch/mips/sibyte/dev: sbmac.c
Log Message:
Fix build break (return type of mii_writereg).
To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/mips/sib
Module Name:src
Committed By: tsutsui
Date: Thu Mar 10 17:40:50 UTC 2011
Modified Files:
src/sys/arch/mips/sibyte/dev: sbtimer.c
Log Message:
Set correct struct clockframe .intr value for hardclock(9).
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys
Module Name:src
Committed By: matt
Date: Tue Feb 1 06:13:08 UTC 2011
Modified Files:
src/sys/arch/mips/sibyte/dev: sbgbusvar.h sbjcn.c sbmac.c sbobio.c
sbscd.c sbscn.c sbsmbus.c sbtimer.c sbwdog.c
Log Message:
Use aprint_* and misc cleanup.
To generate a dif
Module Name:src
Committed By: matt
Date: Tue Feb 1 03:16:54 UTC 2011
Modified Files:
src/sys/arch/mips/sibyte/dev: sbgbus.c sbjcn.c sbjcnvar.h sbmac.c
sbobio.c sbscd.c sbscn.c sbscnvar.h sbsmbus.c sbtimer.c sbwdog.c
Log Message:
Update to CFATTACH_DECL_NEW.
