Module Name:src
Committed By: skrll
Date: Fri Aug 26 07:07:29 UTC 2016
Modified Files:
src/sys/arch/evbmips/evbmips: interrupt.c
Log Message:
Make this reentrant / MP safe
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/evbmips/evbmips/interrup
Module Name:src
Committed By: matt
Date: Fri Jun 26 21:57:25 UTC 2015
Modified Files:
src/sys/arch/evbmips/evbmips: cpu.c yamon.c
Log Message:
Add #include
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbmips/evbmips/cpu.c
cvs rdiff -u -r1.13
Module Name:src
Committed By: matt
Date: Sat Jun 6 22:22:03 UTC 2015
Modified Files:
src/sys/arch/evbmips/evbmips: interrupt.c
Log Message:
Add a few KDASSERT for interrupts being enabled.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/evbmip
Module Name:src
Committed By: macallan
Date: Fri Dec 26 18:08:52 UTC 2014
Modified Files:
src/sys/arch/evbmips/evbmips: interrupt.c
Log Message:
put #ifdef MIPS3_ENABLE_CLOCK_INTR around special handling of INT5
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.
Module Name:src
Committed By: macallan
Date: Tue May 14 09:16:59 UTC 2013
Modified Files:
src/sys/arch/evbmips/evbmips: interrupt.c
Log Message:
always set up a clockframe and make it available to other drivers, so clocks
other than the MIPS cycle counter can be used ( for