On Thu, 3 Nov 2022 09:07:44 GMT, Matthias Baesken wrote:
> This change adds constructors (String,Throwable) and (Throwable) to
> InvalidParameterException and uses them at a few places in the jdk coding.
This pull request has now been integrated.
Changeset: 8836b925
Author:Matthias Baesken
On Wed, 16 Mar 2022 00:48:17 GMT, Sandhya Viswanathan
wrote:
>> This PR delivers ChaCha20 intrinsics that accelerate the core block function
>> that generates key stream from the key, counter and nonce. Intrinsics have
>> been written for the following platforms and instruction sets:
>>
>> -
On Mon, 6 Jun 2022 20:57:49 GMT, Vladimir Ivanov wrote:
>> This PR delivers ChaCha20 intrinsics that accelerate the core block function
>> that generates key stream from the key, counter and nonce. Intrinsics have
>> been written for the following platforms and instruction sets:
>>
>> - x86_6
On Tue, 22 Mar 2022 23:07:30 GMT, Jamil Nimeh wrote:
>> src/hotspot/cpu/x86/stubGenerator_x86_64.cpp line 5842:
>>
>>> 5840: __ evpscatterdd(Address(result, zmm_scratch, Address::times_4,
>>> 32), writeMask, zmm_cVec, Assembler::AVX_512bit);
>>> 5841: __ knotwl(writeMask, writeMask);
>>
On Fri, 4 Mar 2022 16:47:54 GMT, Jamil Nimeh wrote:
> This PR delivers ChaCha20 intrinsics that accelerate the core block function
> that generates key stream from the key, counter and nonce. Intrinsics have
> been written for the following platforms and instruction sets:
>
> - x86_64: AVX, A
On Fri, 4 Mar 2022 16:47:54 GMT, Jamil Nimeh wrote:
> This PR delivers ChaCha20 intrinsics that accelerate the core block function
> that generates key stream from the key, counter and nonce. Intrinsics have
> been written for the following platforms and instruction sets:
>
> - x86_64: AVX, A
On Fri, 16 Sep 2022 09:27:39 GMT, Andrew Haley wrote:
>> Interesting, I had not considered that. Thanks for pointing that out. I'm
>> honestly not sure how to evaluate the impact of the generated code on the
>> icache. I'll look at the logic surrounding the ghash processBlocks(_wide)
>> cod
On Thu, 18 Aug 2022 14:43:51 GMT, Jamil Nimeh wrote:
>> src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp line 4306:
>>
>>> 4304: __ subs(loopCtr, loopCtr, 1);
>>> 4305: __ cmp(loopCtr, (u1)0);
>>> 4306: __ br(Assembler::NE, L_twoRounds);
>>
>> Same thing about subs-cmp0-bne.
>
> Th
On Thu, 18 Aug 2022 14:26:47 GMT, Dmitry Chuyko wrote:
>> This PR delivers ChaCha20 intrinsics that accelerate the core block function
>> that generates key stream from the key, counter and nonce. Intrinsics have
>> been written for the following platforms and instruction sets:
>>
>> - x86_64
On Fri, 4 Mar 2022 16:47:54 GMT, Jamil Nimeh wrote:
> This PR delivers ChaCha20 intrinsics that accelerate the core block function
> that generates key stream from the key, counter and nonce. Intrinsics have
> been written for the following platforms and instruction sets:
>
> - x86_64: AVX, A
On Fri, 4 Mar 2022 16:47:54 GMT, Jamil Nimeh wrote:
> This PR delivers ChaCha20 intrinsics that accelerate the core block function
> that generates key stream from the key, counter and nonce. Intrinsics have
> been written for the following platforms and instruction sets:
>
> - x86_64: AVX, A
On Fri, 2 Sep 2022 16:52:02 GMT, Jamil Nimeh wrote:
>> src/hotspot/cpu/aarch64/assembler_aarch64.hpp line 2521:
>>
>>> 2519: #undef INSN3
>>> 2520: #undef INSN4
>>> 2521:
>>
>> This code to handle the AdvSIMD load/store single structure and AdvSIMD
>> load/store single structure (post-indexed
On Fri, 2 Sep 2022 09:32:56 GMT, Andrew Haley wrote:
>> This PR delivers ChaCha20 intrinsics that accelerate the core block function
>> that generates key stream from the key, counter and nonce. Intrinsics have
>> been written for the following platforms and instruction sets:
>>
>> - x86_64:
On Fri, 4 Mar 2022 16:47:54 GMT, Jamil Nimeh wrote:
> This PR delivers ChaCha20 intrinsics that accelerate the core block function
> that generates key stream from the key, counter and nonce. Intrinsics have
> been written for the following platforms and instruction sets:
>
> - x86_64: AVX, A
This PR delivers ChaCha20 intrinsics that accelerate the core block function
that generates key stream from the key, counter and nonce. Intrinsics have
been written for the following platforms and instruction sets:
- x86_64: AVX, AVX2 and AVX512
- aarch64: platforms that support the advanced SI
> The major change is to remove the `get` and `set` methods in various
> `CertAttrSet` child classes and change them to `setXyz` and `getXyz` methods.
> The `Xyz` words might come from the field name or the attribute name. For
> example, `X509CertInfo` now has `setExtensions` and `setValidity` i
On Sun, 6 Nov 2022 14:37:34 GMT, Andrey Turbanov wrote:
>> Weijun Wang has updated the pull request incrementally with one additional
>> commit since the last revision:
>>
>> more cleanup
>
> src/java.base/share/classes/sun/security/x509/CertificateX509Key.java line
> 102:
>
>> 100: */
On Fri, 4 Nov 2022 15:53:50 GMT, Weijun Wang wrote:
>> The major change is to remove the `get` and `set` methods in various
>> `CertAttrSet` child classes and change them to `setXyz` and `getXyz`
>> methods. The `Xyz` words might come from the field name or the attribute
>> name. For example,
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