On Sat, Jun 28, 2025 at 07:49:13AM +0200, Paul Menzel wrote:
> From: Michał Żygowski
>
> Fix what happens when F11/F12 is sent via serial port. The existing code
> already correctly detects the byte sequence that is sent on the serial
> connection, however it translates it to the incorrect keycod
On Fri, Jun 27, 2025 at 07:34:40PM +, Andrei Purdea wrote:
> Hello,
>
> This fixes what happens when F11/F12 is sent via serial port.
> The existing code already correctly detected the byte sequence that was sent
> on the serial connection, however it translated it to incorrect keycode.
> The
acpi tables and hex includes
add romfile_loadbool()
update pci_pad_mem64 handling
ahci: add controller reset
Kevin O'Connor (14):
vgasrc: Use curmode_g instead of vmode_g when mode is the current video
mode
vgasrc: Rename vgahw_get_linesize() to vgahw_minimum_linel
On Mon, Jun 02, 2025 at 11:44:31AM +0200, Gerd Hoffmann wrote:
> On Tue, Apr 08, 2025 at 11:48:19AM +0200, Gerd Hoffmann via SeaBIOS wrote:
> > On Wed, Mar 26, 2025 at 02:21:47AM +0000, Kevin O'Connor wrote:
> > > > comments?
> > >
> > > I don't s
On Mon, May 05, 2025 at 11:12:37AM +0100, Leah Rowe via SeaBIOS wrote:
>
> Do I do that in addition to, or instead of, my patch?
>
> 1) Replace my patch with your change
>
> or
>
> 2) Add your change on top of my change
>
> I'm guessing it's #1, but please confirm and I'll have that tested.
Y
On Mon, Mar 10, 2025 at 04:21:30PM +0100, Gerd Hoffmann wrote:
> On Thu, Mar 06, 2025 at 11:44:01AM +0100, Fiona Ebner wrote:
> > Thank you! Works for my 32-bit Debian 12 VM :)
> >
> > I wanted to briefly ask if a new SeaBIOS release is planned before/for
> > QEMU 10.0?
>
> Hmm. Kevin? 1.17.0 re
On Tue, Jan 28, 2025 at 09:14:43AM +0100, Gerd Hoffmann wrote:
> On Tue, Jan 21, 2025 at 11:59:14AM -0500, Christopher Lentocha wrote:
> >
> > For whatever reason, when you compile SeaBIOS in Csm16 mode, and use it
> > under EDK2's OvmfPkg, the ATA_CMD_IDENTIFY_PACKET_DEVICE command
> > doesn't wor
On Wed, Jan 22, 2025 at 02:46:09PM +0700, Timothy Kenno Handojo wrote:
> Revision from a previous patch. Sorry it took so long.
>
> This change allows seabios to load bootorder not only from CBFS but
> also from the NVRAM as well, making use of coreboot's cmos.layout.
Thanks. However, I don't th
On Sun, Jan 05, 2025 at 08:28:24AM +, Daniel Khodabakhsh wrote:
> Thanks for the explanation Kevin!
>
> I made the modification and tried it locally and it does work.
>
> I've updated the patch and attached it to this email.
Thanks. I committed this change.
-Kevin
_
> index dec198ac..34e6802f 100644
> > --- a/src/hw/usb-hid.c
> > +++ b/src/hw/usb-hid.c
> > @@ -1,20 +1,54 @@
> > // Code for handling USB Human Interface Devices (HID).
> > //
> > // Copyright (C) 2009 Kevin O'Connor
> > +// Copyright (C) 2024 Daniel Khodabakhsh
On Thu, Dec 26, 2024 at 12:22:43PM +0100, Anthony Iliopoulos wrote:
> On Tue, Dec 24, 2024 at 06:55:19PM -0500, Kevin O'Connor wrote:
> > On Wed, Dec 11, 2024 at 11:36:42AM +0100, Anthony Iliopoulos via SeaBIOS
> > wrote:
> > > Currently the mptable setup code on
On Wed, Dec 11, 2024 at 11:36:42AM +0100, Anthony Iliopoulos via SeaBIOS wrote:
> Currently the mptable setup code only considers one core per cpu package
> for populating the cpu tables. The detection logic goes back to machines
> where the cpuid would signify the presence of multiple logical core
On Fri, Nov 22, 2024 at 03:00:41PM +0100, Gerd Hoffmann wrote:
> On Thu, Nov 21, 2024 at 01:34:10PM -0500, Kevin O'Connor wrote:
> > On Thu, Nov 21, 2024 at 05:52:41PM +0100, Gerd Hoffmann wrote:
> > >
> > >
> > > Gerd Hoffmann (2):
> > > drop
On Fri, Nov 22, 2024 at 03:33:04PM +0100, Gerd Hoffmann wrote:
>
>
> Gerd Hoffmann (2):
> add romfile_loadbool()
> update pci_pad_mem64 handling
Thanks. It looks fine to me. Feel free to commit when you are ready.
Cheers,
-Kevin
>
> src/romfile.h| 1 +
> src/fw/pciinit.c | 13
On Sat, Dec 21, 2024 at 08:10:55AM +, Daniel Khodabakhsh wrote:
> Here's the patch file with the Signed-off-by line attached
Thanks for the ping. I've committed this patch.
-Kevin
>
> On Thu, Nov 21, 2024 at 9:15 PM Daniel Khodabakhsh
> wrote:
> >
> > >
> > > Thanks. Looks fine to me, b
On Mon, Nov 11, 2024 at 03:41:16AM +, Daniel Khodabakhsh wrote:
> After poking around I realised boot-fail-wait supports a negative
> integer input, so instead of introducing a new configuration I made a
> change to support negative integer input for boot-menu-wait.
> Please disregard the previ
On Thu, Nov 21, 2024 at 05:07:50PM +0100, Gerd Hoffmann wrote:
> Allow setting pci_pad_mem64 via fw_cfg.
> Usage: qemu -fw_cfg name=opt/org.seabios/pci64,string={yes,no}
>
> Signed-off-by: Gerd Hoffmann
> ---
> src/util.h| 1 +
> src/fw/paravirt.c | 13 +
> src/fw/pciinit.c
On Thu, Nov 21, 2024 at 05:52:41PM +0100, Gerd Hoffmann wrote:
>
>
> Gerd Hoffmann (2):
> drop obsolete acpi table code
> drop acpi tables and hex includes
Thanks for working on this. I wonder if we should disable it by
default in "make menuconfig" for a year or so prior to full removal?
-
On Fri, Nov 15, 2024 at 12:40:06PM +0100, Gerd Hoffmann wrote:
> This series adds an option to set the memory layout preference,
> both at compile time (via kconfig) and runtime (via fwcfg).
>
> Gerd Hoffmann (4):
> add guest hint variable
> use guest hint as additional condition
> add guest
On Tue, Nov 12, 2024 at 12:33:58PM +0100, Gerd Hoffmann wrote:
> We already have a runtime config switch to force 32-bit friendly setup
> (turn off long mode support in the vcpu).
>
> We already have a heuristic to select the 32-bit friendly setup, which
> right now is simply "no memory above 4G i
On Thu, Nov 14, 2024 at 02:54:38PM +0100, Gerd Hoffmann wrote:
> On Wed, Nov 13, 2024 at 11:14:28AM +, Daniel Khodabakhsh wrote:
> > Hi Gerd,
> >
> > Thanks for the reviews!
> >
> > >
> > > seabios has a linked list implementation (see src/list.h).
> > > Please use that instead of rolling you
-hid.c
> index dec198ac..b7d5533e 100644
> --- a/src/hw/usb-hid.c
> +++ b/src/hw/usb-hid.c
> @@ -1,20 +1,44 @@
> // Code for handling USB Human Interface Devices (HID).
> //
> // Copyright (C) 2009 Kevin O'Connor
> +// Copyright (C) 2024 Daniel Khodabakhsh
>
On Sat, Oct 12, 2024 at 11:34:34AM +, Steven Price wrote:
> Accessing the data in the vga_modes array requires using GET_GLOBAL(),
> and the bits set in the bit array should correspond to the modes, not
> the indexes in vga_modes.
>
> With this change the modes calculated matches the expected
On Mon, Aug 05, 2024 at 04:15:00PM +0200, william pecnik wrote:
> the patch is in attach file
> to apply use "*patch src/farptr.h < farptr.patch*" from seabios directory
>
> This will fix the problem of calling bios service int 0x13 AH=0x42 when the
> drive is a ATAPI
>
> (because Outs should use
without address space limits.
Thanks. Looks good to me.
Reviewed-by: Kevin O'Connor
-Kevin
>
> Signed-off-by: Gerd Hoffmann
> ---
> src/fw/pciinit.c | 15 ++-
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/src/fw/pciinit.c b/src/fw/pci
On Fri, Jun 21, 2024 at 10:29:45PM +0200, Rudolf Marek wrote:
> Hi,
>
> Dne 21. 06. 24 v 15:20 Igor Mammedov napsal(a):
> > > +// Old linux kernels have trouble dealing with more than
> > > 44/46
> > > +// phys-bits. Seems to be a bug in the virtio-pci driver.
> > > +
On Thu, Jun 20, 2024 at 07:34:28PM +0200, Paul Menzel wrote:
> Am 20.06.24 um 19:29 schrieb Kevin O'Connor:
> > Some possible alternatives:
> >
> > * We could do nothing for now and continue to gauge how much of a
> >problem this is.
> >
> >
On Fri, Jun 21, 2024 at 01:37:24PM +0100, John Levon wrote:
> On Fri, Jun 21, 2024 at 02:05:17PM +0200, Gerd Hoffmann wrote:
>
> > On Wed, Jun 19, 2024 at 11:21:14AM GMT, John Levon wrote:
> > > Older 32-bit Linux VMs (including Ubuntu 16.10) have issues with the
> > > 64-bit pci io window, failin
On Thu, Jun 20, 2024 at 07:08:38PM +0100, John Levon wrote:
> On Thu, Jun 20, 2024 at 01:29:11PM -0400, Kevin O'Connor wrote:
>
> > I'm leery of moving this heuristic to 64G of ram. I can understand
> > the logic of >4G of ram indicating support for >4G pci. H
On Mon, Jun 17, 2024 at 01:42:20PM +0200, Gerd Hoffmann wrote:
> On Fri, Jun 14, 2024 at 01:05:44PM GMT, Kevin O'Connor wrote:
> > On Fri, Jun 14, 2024 at 12:54:28PM +0200, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > > Be a bit more conservative
On Fri, Jun 14, 2024 at 12:54:28PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > Be a bit more conservative, and only enable the window by default when
> > the ram size extends beyond 60G. Due to the mmio window this translates
> > to an effective working configuration limit of 58G/59G, depending on
>
On Thu, Apr 11, 2024 at 10:51:35PM +0300, Daniil Tatianin wrote:
> Previously we would unconditionally lower the alignment for large BARs
> in case their alignment was greater than "pci_mem64_top >> 11", this
> would make it impossible to use these devices by the kernel:
> [ 13.821108] pci 00
On Tue, Apr 09, 2024 at 11:20:14AM -0400, Kevin O'Connor wrote:
> Introduce stdvga_dac_read_many() and stdvga_dac_write_many() for
> writing multiple dac palette entries. Convert the stdvga_dac_read()
> and stdvga_dac_write() low-level IO access functions in stdvgaio.c to
> acce
On Sun, Apr 14, 2024 at 05:56:31PM +, Riku Viitanen wrote:
> > I think it would be preferable if mxm_setup() was passed the pci
> > device for uniformity, and have mxm_setup() call romfile_xxx() itself.
>
> Do you mean, run mxm30_setup unconditionally?
> And it checks if the file exists:
>
>
On Sun, Apr 14, 2024 at 05:39:21PM +, Riku Viitanen wrote:
> > Ah, I missed that vgahook_setup() checks for NULL. Out of curiosity,
> > is it possible to limit this support to a particular hardware vendor
> > instead of by existence of file?
>
> ATI, AMD, and Nvidia based MXM cards exist. I do
On Sun, Apr 14, 2024 at 11:51:33AM -0400, Kevin O'Connor wrote:
> On Sun, Apr 14, 2024 at 10:30:55AM +, Riku Viitanen via SeaBIOS wrote:
> > VGAROMs on MXM graphics cards need certain int15h functions present
> > to function properly.
> >
> > On HP EliteBoo
On Sun, Apr 14, 2024 at 10:30:55AM +, Riku Viitanen via SeaBIOS wrote:
> VGAROMs on MXM graphics cards need certain int15h functions present
> to function properly.
>
> On HP EliteBook 8560w with coreboot and Quadro 2000M, this warning
> is displayed for 30 seconds, making every boot extremely
On Wed, Apr 10, 2024 at 02:24:50PM +0200, Gerd Hoffmann wrote:
> On Wed, Apr 10, 2024 at 11:01:34AM +0300, Daniil Tatianin wrote:
> > Previously we would unconditionally lower the alignment for large BARs
> > in case their alignment was greater than "pci_mem64_top >> 11", this
> > would make it imp
Introduce stdvga_dac_read_many() and stdvga_dac_write_many() for
writing multiple dac palette entries. Convert the stdvga_dac_read()
and stdvga_dac_write() low-level IO access functions in stdvgaio.c to
access just one color palette entry.
Signed-off-by: Kevin O'Connor
--
There should n
On Tue, Apr 02, 2024 at 02:35:05PM -0400, Kevin O'Connor wrote:
> Add helper function and update the bochsvga.c code to use it. This
> emphasizes the relationship between stdvga_get_vertical_size() and
> stdvga_set_vertical_size() code.
>
> Signed-off-by: Kevin O'Connor
On Mon, Apr 01, 2024 at 11:51:22AM -0400, Kevin O'Connor wrote:
> This series adds comments to vgasrc/stdvga.c along with some variable
> and function renaming. The goal is to make it a little easier to
> understand this legacy code.
>
> There should be no functionality cha
On Thu, Apr 04, 2024 at 04:00:20PM +, Eduardo Batalha via SeaBIOS wrote:
> Hi,
>
> I had some old files saved in diskettes that I really needed to see, so I
> bought a floppy drive and installed it in my coreboot based computer, so, no,
> It's not a retro project. :)
>
> Regarding the AHCI
On Sat, Feb 10, 2024 at 11:17:54PM +0300, Michael Tokarev wrote:
> So.. the difference is vgabios only, not seabios (vgabios-stdvga in this
> case).
>
> And I can't get it to work with debugging vgabios, it always fails even with
> DEBUG_LEVEL=2
> (and level-1 logging isn't useful).
>
> I was a
On Wed, Feb 07, 2024 at 03:21:15AM +0300, Michael Tokarev wrote:
> 07.02.2024 02:17, Michael Tokarev пишет:
[...]
> > The binary in question is vgabios-stdvga.bin.
[...]
>"SMBIOS 2.1 table length 66822 exceeds 65535"
>
> Which wont help with 7.2 machine types (it changes defaults for 8.1+)
On Fri, Aug 25, 2023 at 10:36:04PM +0100, Kieran Kunhya wrote:
> Hello,
>
> I'm trying to update this patch for 2017 as I have the same issue as the
> author in that I can't use the KVM virtual keyboard and a physical keyboard
> at the same time:
> https://patchew.org/Seabios/20171215100946.58298-
On Tue, May 30, 2023 at 03:44:05PM +0200, Niklas Cassel via SeaBIOS wrote:
> According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set in the
> received FIS, the HBA shall jump to state ERR:FatalTaskfile, which will
> raise a TFES IRQ.
>
> This means that if ERR_STAT is set in the recevied
On Fri, Jan 20, 2023 at 11:33:19AM +, David Woodhouse wrote:
> From: David Woodhouse
>
> When running under Xen, hvmloader places a table at 0x1000 with the e820
> information and BIOS tables. If this isn't present, SeaBIOS will
> currently panic.
>
> We now have support for running Xen gue
On Fri, Jan 20, 2023 at 11:33:19AM +, David Woodhouse wrote:
> From: David Woodhouse
>
> When running under Xen, hvmloader places a table at 0x1000 with the e820
> information and BIOS tables. If this isn't present, SeaBIOS will
> currently panic.
>
> We now have support for running Xen gue
On Wed, Jul 13, 2022 at 03:25:17AM +0200, Petr Cvek wrote:
> ASPI2DOS.SYS and KEYB.COM from Win 98 SE installation CD (and most likely
> other DOS versions too) depend on I/O port 0x61 bit 4 to be toggled. This
> requires timer 1 (I/O 0x41, legacy DRAM refresh) to be correctly set.
> Also Intel ICH
On Wed, Jul 13, 2022 at 03:24:49AM +0200, Petr Cvek wrote:
> SeaBIOS can be used for booting legacy OS and also Linux is still using
> CMOS address 0x10 to configure floppy controller. Under these assumptions
> it makes sense to allow boot from CMOS defined floppy drives.
There was never really a
On Thu, Jul 07, 2022 at 12:06:16PM +0200, Gerd Hoffmann wrote:
> Bump default from 8 to 64 blocks. Using 8 by default leads
> to requests being splitted on qemu, which slows down boot.
>
> Some (temporary) debug logging added showed that almost all
> requests on a standard fedora install are less
On Fri, May 20, 2022 at 03:19:03PM +, Lev Kujawski wrote:
> In accord with the El Torito specification[1], SeaBIOS now signals
> failure (AH=1 and CF) whenever attempts are made to terminate disk
> emulation (0x4B) for non-emulated drives. The prior behavior of always
> returning success caused
On Fri, May 20, 2022 at 03:19:01PM +, Lev Kujawski wrote:
> References:
> R. Brown, "INT 15 - OS HOOK - DEVICE POST (AT,PS)", in
> The x86 Interrupt List. https://www.cs.cmu.edu/~ralf/files.html
> [Updated: 2018-02-28].
>
> F. v. Gilluwe, The Undocumented PC. Boston, MA: Addison-Wesley
On Wed, Apr 27, 2022 at 09:22:02AM +0200, Gerd Hoffmann wrote:
> v4:
> - make calculations more robust.
>
> v3:
> - check size instead of end address.
The series looks good to me.
-Kevin
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On Wed, Apr 27, 2022 at 08:26:35AM +0200, Gerd Hoffmann wrote:
> > > if (!highram_start) {
> > > +if (e - s > BUILD_MAX_HIGHTABLE * 16)
> > > +highram_size = BUILD_MAX_HIGHTABLE;
> > > u32 newe = ALIGN_DOWN(e - highram_size, MALLOC_MIN_ALIGN);
> > >
On Tue, Apr 26, 2022 at 10:56:42AM +0200, Gerd Hoffmann wrote:
> In case there is enough memory installed use a large ZoneHigh.
>
> Signed-off-by: Gerd Hoffmann
> ---
> src/config.h | 3 ++-
> src/malloc.c | 4 +++-
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/src/config.
On Mon, Apr 25, 2022 at 09:41:45AM +0200, Gerd Hoffmann wrote:
> In case there is enough memory installed use a large ZoneHigh.
>
> Signed-off-by: Gerd Hoffmann
> ---
> src/config.h | 3 ++-
> src/malloc.c | 4 +++-
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/src/config.
On Sun, Apr 24, 2022 at 07:29:56PM -0400, Keith Hui wrote:
> (Looping in the SeaBIOS mailing list again.)
>
> See this: https://www.seabios.org/Runtime_config
>
> It appears CMOS locations are a legacy artifact and files within the
> cbfs image (eg. etc/floppy0) is the preferred way of passing Se
On Fri, Apr 22, 2022 at 01:55:56PM +0200, Gerd Hoffmann wrote:
> Bump BUILD_MAX_HIGHTABLE from 256k to 1M to avoid running
> out of memory with very large smbios tables.
>
> Signed-off-by: Gerd Hoffmann
> ---
> src/config.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Thu, Apr 21, 2022 at 11:33:24AM +0200, Gerd Hoffmann wrote:
> When running out of memory get a chunk of memory from ZoneTmpHigh to
> expand ZoneHigh. Drop simliar logic fro pmm code because it's not
> needed ay more.
>
> This fixes some scalability problems, for example with lots of vcpus,
> w
On Tue, Apr 19, 2022 at 11:46:59AM +0200, Gerd Hoffmann wrote:
> > > diff --git a/src/fw/mptable.c b/src/fw/mptable.c
> > > index 47385cc..3a7b02f 100644
> > > --- a/src/fw/mptable.c
> > > +++ b/src/fw/mptable.c
> >
> > If you look at the top of that file you'll see the notice:
> >
> > // DO NOT
On Fri, Apr 15, 2022 at 04:33:34PM +0530, Jay Khandkar wrote:
> Set the correct IOAPIC INTIN pin number for pci bus interrupt
> sources during MP spec table generation (on emulators). Currently,
> the pin number is set to the interrupt line field in the device's
> configuration space, which is set
On Sat, Apr 02, 2022 at 08:24:41PM +0200, Volker Rümelin wrote:
> This reset issue was reported on the QEMU issue tracker at
> https://gitlab.com/qemu-project/qemu/-/issues/766
>
> A reset with QEMU -machine q35 -accel tcg leads to a reset loop
> and with -machine q35 -accel kvm the reset only wor
On Sat, Mar 26, 2022 at 10:33:19AM +0100, Volker Rümelin wrote:
> After a reset of a QEMU -machine q35 guest, the PCI Express
> Enhanced Configuration Mechanism is disabled and the variable
> mmconfig no longer matches the configuration register PCIEXBAR
> of the Q35 chipset. Until the variable mmc
On Tue, Mar 15, 2022 at 10:28:12AM +0300, Michael Tokarev wrote:
> 02.03.2022 05:19, Kevin O'Connor rote:
> > The 1.16.0 version of SeaBIOS has now been released. For more
> > information on the release, please see:
>
> Hi Kevin!
> This release seems to be missi
some smbios_build_tables() arguments optional
smbios: Make smbios_build_tables() ready for 64-bit tables
smbios: copy_smbios_30() function
smbios: Support SMBIOS 3.0 entry point at copy_table()
smbios: Support SMBIOS 3.0 entry point at smbios_romfile_setup()
Kevin O'
I'm currently planning to make a release early next week. This will
be a v1.16.0 release.
If anyone knows of any critical bugs or deficiencies with the current
code, please let me know.
-Kevin
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On Sun, Jan 23, 2022 at 05:43:57PM +0100, Florian Larysch wrote:
> The LBA Format Data structure is dword-sized, but struct nvme_lba_format
> erroneously contains an additional member, misaligning all LBAF
> descriptors after the first and causing them to be misinterpreted.
> Remove it.
Thanks. I
On Wed, Feb 02, 2022 at 11:50:50AM +0100, Alexander Graf wrote:
>
> On 02.02.22 02:52, Kevin O'Connor wrote:
> > On Tue, Feb 01, 2022 at 08:39:10PM +0100, Florian Larysch wrote:
> > > On Thu, Jan 27, 2022 at 11:37:52AM -0500, Kevin O'Connor wrote:
> > > &
On Tue, Feb 01, 2022 at 08:39:10PM +0100, Florian Larysch wrote:
> On Thu, Jan 27, 2022 at 11:37:52AM -0500, Kevin O'Connor wrote:
> > Thanks. I don't know enough about NVMe to review this patch though.
> > Maybe Julian or Alex could comment?
>
> Happy to hear the
On Fri, Jan 28, 2022 at 01:03:23PM +0100, Gerd Hoffmann wrote:
> On Thu, Jan 27, 2022 at 05:43:32PM +0100, Paul Menzel wrote:
> > Dear SeaBIOS folks,
> >
> >
> > with the latest NVMe fixes, would it make sense to tag a 1.15.1 release?
> >
> > The 1.16.0 release is planned for end of February, as
On Sun, Jan 23, 2022 at 05:43:57PM +0100, Florian Larysch wrote:
> The LBA Format Data structure is dword-sized, but struct nvme_lba_format
> erroneously contains an additional member, misaligning all LBAF
> descriptors after the first and causing them to be misinterpreted.
> Remove it.
Thanks. I
On Mon, Jan 24, 2022 at 10:20:53AM +0100, Jan Beulich via SeaBIOS wrote:
> Commit b68f313c9139 ("nvme: Record maximum allowed request size")
> introduced a use of "identify" past it being passed to free(). Latch the
> value of interest into a local variable.
>
> Reported-by: Coverity (ID 1497613)
On Fri, Jan 21, 2022 at 11:12:35AM -0500, Kevin O'Connor wrote:
> The variable rx_bytes is marked VARLOW, but there was a missing
> GET_LOW() to access rx_bytes. Fix by copying rx_bytes to a local
> variable and avoid the repetitive segment memory accesses.
>
> Reported-by:
On Fri, Jan 21, 2022 at 11:48:42AM -0500, Kevin O'Connor wrote:
> This is a resend of the previous series. Changes since last time:
>
> * Patch 1: Fix function comment on nvme_io_xfer()
> * Patch 3-5: Added "goto bounce" to nvme_io_xfer() as suggested by Alex
> * P
On Fri, Jan 21, 2022 at 09:44:46PM +0100, Alexander Graf wrote:
> On 21.01.22 17:54, Kevin O'Connor wrote:
> > On Fri, Jan 21, 2022 at 05:41:17PM +0100, Alexander Graf wrote:
> > > On 21.01.22 17:02, Kevin O'Connor wrote:
> > > > On Fri, Jan 21, 2022 a
On Fri, Jan 21, 2022 at 11:48:45AM -0500, Kevin O'Connor wrote:
> Rename nvme_build_prpl() to nvme_prpl_xfer() and directly invoke
> nvme_io_xfer() or nvme_bounce_xfer() from that function.
>
> Signed-off-by: Kevin O'Connor
> ---
> src/hw/nvme-int.h | 1
On Fri, Jan 21, 2022 at 05:41:17PM +0100, Alexander Graf wrote:
> On 21.01.22 17:02, Kevin O'Connor wrote:
> > On Fri, Jan 21, 2022 at 03:28:33PM +0100, Alexander Graf wrote:
> > > On 19.01.22 19:45, Kevin O'Connor wrote:
> > > >if ((ns-&g
There is no need to create multiple dma bounce buffers as the BIOS
disk code isn't reentrant capable.
Also, verify that the allocation succeeds.
Signed-off-by: Kevin O'Connor
Reviewed-by: Alexander Graf
---
src/hw/nvme-int.h | 3 ---
src/hw/nvme.c | 21 +++-
.
This patch builds the PRP maintenance data in the existing "dma bounce
buffer" and only builds it when needed.
Fixes: 01f2736cc905d ("nvme: Pass large I/O requests as PRP lists")
Reported-by: Matt DeVillier
Signed-off-by: Alexander Graf
Signed-off-by: Kevin O'Connor
---
When using a prp2 parameter, build it in nvme_prpl_xfer() and pass it
directly to nvme_io_xfer().
Signed-off-by: Kevin O'Connor
Reviewed-by: Alexander Graf
---
src/hw/nvme.c | 39 ++-
1 file changed, 18 insertions(+), 21 deletions(-)
diff --git a/s
Rename nvme_build_prpl() to nvme_prpl_xfer() and directly invoke
nvme_io_xfer() or nvme_bounce_xfer() from that function.
Signed-off-by: Kevin O'Connor
---
src/hw/nvme-int.h | 1 -
src/hw/nvme.c | 46 --
2 files changed, 20 insertions(+
Move bounce buffer processing to a new helper function.
Signed-off-by: Kevin O'Connor
Reviewed-by: Alexander Graf
---
src/hw/nvme.c | 35 +--
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/src/hw/nvme.c b/src/hw/nvme.c
index 608651a..d6
Rename nvme_io_readwrite() to nvme_io_xfer() and change it so it
implements the debugging dprintf() and it returns -1 on an error.
Signed-off-by: Kevin O'Connor
Reviewed-by: Alexander Graf
---
src/hw/nvme.c | 37 ++---
1 file changed, 18 insertions(+
checking for malloc failure
-Kevin
Kevin O'Connor (6):
nvme: Rework nvme_io_readwrite() to return -1 on error
nvme: Add nvme_bounce_xfer() helper function
nvme: Convert nvme_build_prpl() to nvme_prpl_xfer()
nvme: Pass prp1 and prp2 directly to nvme_io_xfer()
nvme: Build the page
The variable rx_bytes is marked VARLOW, but there was a missing
GET_LOW() to access rx_bytes. Fix by copying rx_bytes to a local
variable and avoid the repetitive segment memory accesses.
Reported-by: Gabe Black
Signed-off-by: Volker Rümelin
Signed-off-by: Kevin O'Connor
---
src/ser
On Thu, Jan 13, 2022 at 05:27:11PM +0100, Paul Menzel wrote:
> Dear Kevin,
>
>
> Am 13.01.22 um 17:19 schrieb Kevin O'Connor:
> > Add a hack to suppress spurious gcc array-bounds warning.
>
> Wow, thank you for fixing it. Maybe elaborate a little, what version it
On Fri, Jan 21, 2022 at 03:28:33PM +0100, Alexander Graf wrote:
>
> On 19.01.22 19:45, Kevin O'Connor wrote:
> > Commit 01f2736cc905d ("nvme: Pass large I/O requests as PRP lists")
> > introduced multi-page requests using the NVMe PRP mechanism. To store the
>
On Wed, Jan 19, 2022 at 10:08:49PM +0100, Volker Rümelin wrote:
> The variable rx_bytes is marked VARLOW. Add a missing GET_LOW()
> to access rx_bytes.
>
> Reported-by: Gabe Black
> Signed-off-by: Volker Rümelin
Thanks. Good catch!
I think we should fix this by copying the contents into a loc
There is no need to create multiple dma bounce buffers as the BIOS
disk code isn't reentrant capable.
Signed-off-by: Kevin O'Connor
---
This is a minor cleanup on top of the previous nvme code series.
-Kevin
---
src/hw/nvme-int.h | 3 ---
src/hw/nvme.c | 14 +
.
This patch builds the PRP maintenance data in the existing "dma bounce
buffer" and only builds it when needed.
Fixes: 01f2736cc905d ("nvme: Pass large I/O requests as PRP lists")
Reported-by: Matt DeVillier
Signed-off-by: Alexander Graf
Signed-off-by: Kevin O'Conno
When using a prp2 parameter, build it in nvme_prpl_xfer() and pass it
directly to nvme_io_xfer().
Signed-off-by: Kevin O'Connor
---
src/hw/nvme.c | 39 ++-
1 file changed, 18 insertions(+), 21 deletions(-)
diff --git a/src/hw/nvme.c b/src/hw/nvme.c
Rename nvme_build_prpl() to nvme_prpl_xfer() and directly invoke
nvme_io_xfer() or nvme_bounce_xfer() from that function.
Signed-off-by: Kevin O'Connor
---
src/hw/nvme-int.h | 1 -
src/hw/nvme.c | 42 --
2 files changed, 16 insertions(+
Move bounce buffer processing to a new helper function.
Signed-off-by: Kevin O'Connor
---
src/hw/nvme.c | 35 +--
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/src/hw/nvme.c b/src/hw/nvme.c
index a97501b..fd7c1d0 100644
--- a/src/hw/nvme.c
Rename nvme_io_readwrite() to nvme_io_xfer() and change it so it
implements the debugging dprintf() and it returns -1 on an error.
Signed-off-by: Kevin O'Connor
---
src/hw/nvme.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/s
k en-us -snapshot -L test -chardev stdio,id=seabios -device
isa-debugcon,iobase=0x402,chardev=seabios -m 512 -drive
file=dos-drivec,if=none,id=drive0 -device nvme,drive=drive0,serial=nvme-1 -boot
menu=on
Thanks,
-Kevin
Kevin O'Connor (5):
nvme: Rework nvme_io_readwrite() to return -1 on erro
On Thu, Jan 13, 2022 at 11:56:35AM +0100, Gerd Hoffmann wrote:
> Hi,
>
> > 2. Commit the smbios 3 changes (and pcie-pci-bridge changes) and
> >release v1.15.0 in early January.
>
> I think all pending patches have been applied meanwhile.
> So time to enter 1.15 freeze and release in ~2 week
Add a hack to suppress spurious gcc array-bounds warning.
Signed-off-by: Kevin O'Connor
---
src/fw/smm.c | 21 +++--
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/src/fw/smm.c b/src/fw/smm.c
index d90e43a..a0b50b2 100644
--- a/src/fw/smm.c
+++ b/src/fw/
On Sun, Dec 19, 2021 at 09:45:59AM -0500, Kevin O'Connor wrote:
> Signed-off-by: Kevin O'Connor
> ---
> scripts/readserial.py | 28 +++-
> 1 file changed, 11 insertions(+), 17 deletions(-)
>
FYI, I committed this series (along with the two
It's simpler to use b"" designations around binary strings than to use
the as_bytes() function.
Signed-off-by: Kevin O'Connor
---
scripts/buildrom.py | 6 ++
scripts/checkrom.py | 4 +---
scripts/python23compat.py | 14 --
3 files changed,
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