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On 29.04.2014 19:24, Georg Icking-Konert wrote:
>
> hi Philipp,
>
> thanks a lot for that information! So it?s not even safe to always
> read low byte first, and write high byte first for 16b SFRs!? That
> really sucks? :-( Any idea where I can get
.
> --
>
> Message: 1
> Date: Fri, 18 Apr 2014 12:29:56 +0200
> From: Philipp Klaus Krause
> Subject: Re: [Sdcc-user] r/w order for STM8 16b registers
> To: sdcc-user@lists.sourceforge.net
> Message-ID: <5350fea4
On Fri, 18 Apr 2014, Georg Icking-Konert wrote:
> Hello Maarten,
>
> so far I observed it only for the ADC result register (ADC_DR) for read,
> and timer 3 compare register (TIM3_CCR) for write. The way I realized
> was simple: the ADC the result was skewed, and the TIM3 period was
> wrong. How
ioned it was plain
> obvious, because the STM8 clearly didn’t behave as expected. But there are
> too many 16b SFR registers with sometimes minute effect on the STM8 behavior
> to check them via their functionality alone. Any idea is appreciated!
>
> Regards, Georg I.
>
>
&
hem via their functionality alone. Any idea is appreciated!
Regards, Georg I.
> --
>
> Message: 7
> Date: Fri, 18 Apr 2014 09:49:36 +0200 (CEST)
> From: "Maarten Brock"
> Subject: Re: [Sdcc-user] r/w order for STM8 16b registers
> To:
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On 18.04.2014 09:49, Maarten Brock wrote:
> Hello Georg,
>
> Is this behaviour true for all 16 bit SFR's? Or is it different for
> every other SFR? If it's always the same then maybe SDCC could take
> this into account.
>
> Maarten
>
>> hi all,
>>
Hello Georg,
Is this behaviour true for all 16 bit SFR's? Or is it different for every
other SFR? If it's always the same then maybe SDCC could take this into
account.
Maarten
> hi all,
>
> it might be common knowledge in the community, but it sure was new to me
> (and took me some time to debug
hi all,
it might be common knowledge in the community, but it sure was new to me (and
took me some time to debug)…
As you know the STM8 is and 8-bit uC, so reading from or writing to 16b
peripheral registers (SFR) takes place in 2 steps. And I found that the
sequence of access matters for 16b
