> >
> > .obj/%.o : %.c $(PRJ_HEAD)
> > @-mkdir -p $(dir $@)
> > $(CC) $(CC_FLAGS) -c $< -o $@
Calling the shell at every source file just to try to make the destination
directory is very inefficient. You should make a "prepare" rule that
just creates everything that is needed.
By the wa
Arthur Skowronek wrote:
> I tried to write a Makefile for use with sdcc 2.9.0 to
> compile multifile z80 projects.
I tried out your makefile, and it seems the problem is
your options to link-z80. I was not able to figure out what
it did not like, so I changed it to use sdcc to link, and it
w
Hi,
I dont know about your linker options, but -i seems
weird to specify the output file. Any try with -o?
On Sun, Oct 4, 2009 at 1:42 AM, Richard Gray
wrote:
> While I don't entirely understand your Makefile (just my ignorance, nothing
> else!), but the likely problem is that SDCC can only cop
While I don't entirely understand your Makefile (just my ignorance, nothing
else!), but the likely problem is that SDCC can only cope with one source
file at a time, unlike, say, gcc. So, you're probably going to need some kind
of 'for' loop to iterate over each input file. I've been meaning to
Hello,
I tried to write a Makefile for use with sdcc 2.9.0 to
compile multifile z80 projects.
> # apps
> CC := sdcc
> AS := as-z80
> LD := link-z80
>
> # segment base
> SEG_CODE := 0x8000
> SEG_DATA := 0xd600
>
> # flags
> CC_FLAGS := -mz80 --no-reg-params --no-std-crt0 -V --verbose
> LD_FLAGS :
