Re: [Sdcc-user] 6502 and AS

2013-03-16 Thread Masur Jonathan
Le 16.03.2013 14:28, Borut Ražem a écrit : > This is probably because the parentheses are used for expressions. In > this case use of square brackets seems more appropriate to me. But I'm > only guessing... Yes, but it's not hard to test if an expression is itself fully surrounded by parenthesis

Re: [Sdcc-user] 6502 and AS

2013-03-16 Thread Borut Ražem
On 16. 03. 2013 12:54, Masur Jonathan wrote: Le 16.03.2013 01:13, Borut Ražem a écrit : Helo Jonathan, sdas and sdld are actually a fork of Alan Baldwin's AS assembler (see http://shop-pdp.net/ashtml/as.htm) with some sdcc related modifications. Only the targets supported by sdcc are in

Re: [Sdcc-user] 6502 and AS

2013-03-16 Thread Masur Jonathan
Le 16.03.2013 01:13, Borut Ražem a écrit : > Helo Jonathan, > > sdas and sdld are actually a fork of Alan Baldwin's AS assembler > (see http://shop-pdp.net/ashtml/as.htm) with some sdcc related > modifications. Only the targets supported by sdcc are included in > sdas/sdld but the documenta

Re: [Sdcc-user] 6502 and AS

2013-03-15 Thread Borut Ražem
Helo Jonathan, sdas and sdld are actually a fork of Alan Baldwin's AS assembler (see http://shop-pdp.net/ashtml/as.htm) with some sdcc related modifications. Only the targets supported by sdcc are included in sdas/sdld but the documentation includes all AS targets, as you already

Re: [Sdcc-user] 6502 and AS

2013-03-15 Thread Richard Gray
I'm dredging my memory, but back in the '80s this problem was "solved" by a pseudo-instruction, LDAZ, meaning load zero-page. I wrote an assembler myself for the 6502 back in the 1980's, and I seem to recall this is how I did it. I don't think there's a reliable way of deducing whether a zero-pa

[Sdcc-user] 6502 and AS

2013-03-15 Thread Masur Jonathan
Hello everyone, Without much surprise, I am unable to do contribute to SDCC during my free time. My plan is now to attempt to get, with my master project next year (2014), a project where I'll do a 6502 and 65C816 port of SDCC, along with some hardware simulation of both processors in order to