On Sat, Nov 3, 2012 at 10:36 AM, Stef wrote:
> On 02/11/2012 21:13, Radoslav Kolev wrote:
> the only public documentation from genesys logic is the register
> description you already found. Firmware functions have been reversed
> engineered. When there are many reads and writes,
ure out the reason for.
Before the actual scan begins there is a pattern of setting some
registers and RAM, then reading RAM contents (image data?). My current
guess is this may be hunting for the page start on the scanner bed.
So, that's about as far as we are now. Any ideas, suggestions o
