I've fixed the memory fence on 32-bit Arm for the next release to use
an instruction that works on ARMv6, so you won't need to use
`--enable-mach=arm32le` in the future.
Also, the Utah snapshot site now provides ARMv6 builds for Racket CS:
https://www.cs.utah.edu/plt/snapshots/
Unfortunately, D
Alright, after compiling for approximately 16 hours, it looks like this
works. Thanks so much!
On Tuesday, August 11, 2020 at 3:02:54 PM UTC-7 Matthew Flatt wrote:
> Ah, that makes sense.
>
> Does configuring with `--enable-mach=arm32le` work?
>
> Using "arm32le" instead of the inferred "tarm32
Ah, that makes sense.
Does configuring with `--enable-mach=arm32le` work?
Using "arm32le" instead of the inferred "tarm32le" avoids memory-fence
instructions, so it should solve this problem, but I'm not certain the
rest of the build will adapt correctly.
At Tue, 11 Aug 2020 14:35:49 -0700 (PDT
I'm on an old RPi B (maybe a B+). It's pretty ancient, so I might be
pushing my luck. Here's my CPU info:
pi@raspberrypi:~ $ cat /proc/cpuinfo
processor: 0
model name: ARMv6-compatible processor rev 7 (v6l)
BogoMIPS: 697.95
Features: half thumb fastmult vfp edsp java tls
CPU impl
Which model Pi are you using? I'm able to build on a Pi 3, so I wonder
if it's a difference in processors, where the Arm32 backend is using
something that it shouldn't.
Whether or not that guess is right, can you try running `gdb` in the
"ChezScheme" directory like this?
env SCHEMEHEAPDIRS=ta
I'm wondering, does anybody have any prebuilt 32-but ARM binaries for
Racket on Chez? I'm trying to run a little web-server on a raspberry pi,
and I'd prefer to use the Chez version, but I can't seem to get it to build.
Alternately, if anybody knows why it won't build and can help, that would
6 matches
Mail list logo
