Re: semihosting option

On Thu, 2025-02-27 at 09:55 +, Peter Maydell wrote: > On Thu, 27 Feb 2025 at 05:44, Yanfeng Liu wrote: > > I am wondering QEMU semihosting for ARM or RISCV targets allows user to > > control > > the set of functions available in semihosting? for example, I want give &g

QEMU arm boot all CPUs

Dear experts, With `qemu-system-arm -M virt -smp 2`, it seems that secondary core is halted upon boot and needs be brought up via PSCI later. I am wondering if there is a way to tell QEMU to boot all cores upon boot without having to use PSCI? I couldn't find an option in the manual yet. Regards

Timer quality

Dear experts, I am wondering how the precision of timers are with QEMU on x64 Ubuntu Linux and TCG accelerator? Regards, yf

Re: Timer quality

ilities, thus all guest > instructions get executed natively by bare metal, and thus the need > to actually emulate instructions via the TCG gets minimized... > > Frank > > https://www.vmware.com/docs/vmware_timekeeping > https://wiki.osdev.org/APIC_Timer > https://airbus-seclab.git

semihosting option

Dear experts, I am wondering QEMU semihosting for ARM or RISCV targets allows user to control the set of functions available in semihosting? for example, I want give read- only host folder share and poweroff functions to a guest. Is this possible? Regards, yf