how to access 64bit register? only lower 32 bits are written in aarch64..

Hi, list members, I;m faced with a problem I can't figure out how to solve. In a baremetal program running on aarch64, I have this test code, (*(volatile uint64_t *)(AXPU_BASE + AXPU_AXEMIS_IOCTL_ARG)) = 0x99aabbccddeeff00; // addr 0x1618 printf("read-back : cmd = %lx\n", (*(volatile uin

Re: how to access 64bit register? only lower 32 bits are written in aarch64..

On Thu, 27 May 2021 at 10:57, wrote: > And this is the print from the run. > > > > # size = 4 > > qemu written ddeeff00 at 1618 > > # size = 4 > > read-back : arg = ddeeff00 > > # size = 4 > > qemu written 55667788 at 1610 > > # size = 4 > > read-back : cmd = 55667788 > > > > I wanted to write two

RE: how to access 64bit register? only lower 32 bits are written in aarch64..

Hi, Peter Maydell, Thank you again for the help. > Does your device's MemoryRegionOps set > the .valid.min_access_size, .valid.max_access_size, .impl.min_access_size > and .impl.max_access_size appropriately to tell the core code that it > should get and can handle 64-bit accesses ? > > -- PMM I

How to get host virtual address from guest physical address?

Hello list members, In my baremetal test on aarch64, I pass the guest physical address of an array of a structure to the qemu peripheral code using peripherals register. I soon realized the adderss is from another world and to access this address in qemu, I need the host virtual address. I t