Re: [Qemu-discuss] [Qemu-devel] Cross-posted : Odd QXL/KVM performance issue with a Windows 7 Guest

2019-09-06 Thread Brad Campbell
On 7/9/19 03:03, Dr. David Alan Gilbert wrote: * Brad Campbell (lists2...@fnarfbargle.com) wrote: On 2/9/19 6:23 pm, Brad Campbell wrote: Here is the holdup : 11725@1567416625.003504:qxl_ring_command_check 0 native 11725@1567416625.102653:qxl_io_write 0 native addr=0 (QXL_IO_NOTIFY_CMD) val

Re: [Qemu-discuss] [Qemu-devel] Cross-posted : Odd QXL/KVM performance issue with a Windows 7 Guest

2019-09-06 Thread Dr. David Alan Gilbert
* Brad Campbell (lists2...@fnarfbargle.com) wrote: > On 2/9/19 6:23 pm, Brad Campbell wrote: > > > > > Here is the holdup : > > > > 11725@1567416625.003504:qxl_ring_command_check 0 native > > 11725@1567416625.102653:qxl_io_write 0 native addr=0 (QXL_IO_NOTIFY_CMD) > > val=0 size=1 async=0 > > >

Re: [Qemu-discuss] [Qemu-devel] Cross-posted : Odd QXL/KVM performance issue with a Windows 7 Guest

2019-09-06 Thread Brad Campbell
On 6/9/19 16:49, Brad Campbell wrote: On 2/9/19 6:23 pm, Brad Campbell wrote: Here is the holdup : 11725@1567416625.003504:qxl_ring_command_check 0 native 11725@1567416625.102653:qxl_io_write 0 native addr=0 (QXL_IO_NOTIFY_CMD) val=0 size=1 async=0 ~100ms delay prior to each logged QXL_IO_N

[Qemu-discuss] Cross-posted : Odd QXL/KVM performance issue with a Windows 7 Guest

2019-09-06 Thread Brad Campbell
On 2/9/19 6:23 pm, Brad Campbell wrote: Here is the holdup : 11725@1567416625.003504:qxl_ring_command_check 0 native 11725@1567416625.102653:qxl_io_write 0 native addr=0 (QXL_IO_NOTIFY_CMD) val=0 size=1 async=0 ~100ms delay prior to each logged QXL_IO_NOTIFY_CMD on the AMD box which explai

Re: [Qemu-discuss] qemu-system-aarch64 doesn't close after guest executes halt -f

2019-09-06 Thread Dawid Stencel via Qemu-discuss
Hi I tied the "poweroff -f" from the Linux guest system and it works as expected, but it does not need the PL061 GPIO to shutdown the system and QEMU ( I removed it from the code and poweroff still works). So if Peter is correct that the PL061 GPIO Poweroff button is implemented as a hardwar