On 2021/11/11 17:14, Philippe Mathieu-Daudé wrote:
On 10/28/21 17:09, Philippe Mathieu-Daudé wrote:
From: Yanan Wang
Now that we have a generic parser smp_parse(), let's add an unit
test for the code. All possible valid/invalid SMP configurations
that the user can specify are covered.
Signe
On 2021/11/11 17:37, Philippe Mathieu-Daudé wrote:
On 11/11/21 10:31, wangyanan (Y) wrote:
On 2021/11/11 17:14, Philippe Mathieu-Daudé wrote:
On 10/28/21 17:09, Philippe Mathieu-Daudé wrote:
From: Yanan Wang
Now that we have a generic parser smp_parse(), let's add an unit
test fo
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
There is a single MachineClass object, registered with
type_register_static(&smp_machine_info). Since the same
object is used multiple times (an MachineState object
is instantiated in both test_generic and test_with_dies),
we should restore its
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
smp_machine_class_init() is the actual TypeInfo::class_init().
Declare it as such in smp_machine_info, and avoid to call it
manually in each test. Move smp_machine_info definition just
before we register the type to avoid a forward declaration.
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
If the MachineClass::name pointer is not explicitly set, it is NULL.
Per the C standard, passing a NULL pointer to printf "%s" format is
undefined. Some implementations display it as 'NULL', other as 'null'.
Since we are comparing the formatted
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
We can simply use a local variable (and pass its pointer) instead
of a pointer to a compound literal.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 64 ++---
1 file changed, 32 inse
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
Declare structures const when we don't need to modify
them at runtime.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
Reviewed-by: Yanan Wang
Teste
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
All methods related to MachineState are prefixed with "machine_".
smp_parse() does not need to be an exception. Rename it and
const'ify the SMPConfiguration argument, since it doesn't need
to be modified.
Signed-off-by: Philippe Mathieu-Daudé
On 2021/11/15 18:24, Philippe Mathieu-Daudé wrote:
On 11/12/21 03:04, wangyanan (Y) wrote:
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
There is a single MachineClass object, registered with
type_register_static(&smp_machine_info). Since the same
object is used multiple times
On 2021/11/15 18:16, Philippe Mathieu-Daudé wrote:
On 11/12/21 03:28, wangyanan (Y) wrote:
On 2021/11/11 18:03, Philippe Mathieu-Daudé wrote:
If the MachineClass::name pointer is not explicitly set, it is NULL.
Per the C standard, passing a NULL pointer to printf "%s" format is
On 2021/11/15 22:58, Philippe Mathieu-Daudé wrote:
Use g_test_add_data_func() instead of g_test_add_func() so we can
pass the machine type to the tests (we will soon have different
machine types).
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 18 --
On 2021/11/15 22:58, Philippe Mathieu-Daudé wrote:
Split the 'generic' test in two tests: 'valid' and 'invalid'.
This will allow us to remove the hack which modifies the
MachineClass internal state.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 22 +
On 2021/11/15 22:58, Philippe Mathieu-Daudé wrote:
Split the 'generic' test in two tests: 'valid' and 'invalid'.
This will allow us to remove the hack which modifies the
MachineClass internal state.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 22 +
On 2021/11/15 22:58, Philippe Mathieu-Daudé wrote:
Avoid modifying the MachineClass internals by adding the
'smp-with-dies' machine, which inherits from TYPE_MACHINE.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 22 +++---
1 file changed, 15 inser
Hi Philippe,
On 2021/11/15 22:58, Philippe Mathieu-Daudé wrote:
Keep the common TYPE_MACHINE class initialization in
machine_base_class_init(), make it abstract, and move
the non-common code to a new class: "smp-without-dies-valid".
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-s
On 2021/11/17 16:08, Philippe Mathieu-Daudé wrote:
Hi Yanan,
On 11/17/21 08:37, wangyanan (Y) wrote:
On 2021/11/15 22:58, Philippe Mathieu-Daudé wrote:
Keep the common TYPE_MACHINE class initialization in
machine_base_class_init(), make it abstract, and move
the non-common code to a new
Hi,
On 2021/9/24 20:27, Igor Mammedov wrote:
Patch introduces acpi_table_begin()/ acpi_table_end() API
that hides pointer/offset arithmetic from user as opposed
to build_header(), to prevent errors caused by it [1].
acpi_table_begin():
initializes table header and keeps track of
t
On 2021/9/27 18:12, Daniel P. Berrangé wrote:
On Sun, Sep 26, 2021 at 04:45:38PM +0800, Yanan Wang wrote:
Currently the only difference between smp_parse and pc_smp_parse
is the support of dies parameter and the related error reporting.
With some arch compat variables like "bool dies_supported
On 2021/9/28 18:46, Philippe Mathieu-Daudé wrote:
On 9/28/21 11:31, Yanan Wang wrote:
There is one example of -smp CLI in qemu-options.hx currently
using "-smp 2" and assuming that there will be 2 sockets.
However now the actually calculation logic of missing sockets
and cores is not immutable
On 2021/9/28 18:58, Daniel P. Berrangé wrote:
On Tue, Sep 28, 2021 at 12:57:21PM +0200, Philippe Mathieu-Daudé wrote:
On 9/28/21 05:57, Yanan Wang wrote:
Currently the only difference between smp_parse and pc_smp_parse
is the support of dies parameter and the related error reporting.
With som
On 2021/9/28 17:58, Daniel P. Berrangé wrote:
On Tue, Sep 28, 2021 at 11:57:42AM +0800, Yanan Wang wrote:
In the SMP configuration, we should either provide a topology
parameter with a reasonable value (greater than zero) or just
omit it and QEMU will compute the missing value.
The users shou
On 2021/9/28 19:01, Philippe Mathieu-Daudé wrote:
On 9/28/21 05:57, Yanan Wang wrote:
Put both sanity-check of the input SMP configuration and sanity-check
of the output SMP configuration uniformly in the generic parser. Then
machine_set_smp() will become cleaner, also all the invalid scenario
On 2021/9/28 19:01, Daniel P. Berrangé wrote:
On Tue, Sep 28, 2021 at 06:58:20PM +0800, wangyanan (Y) wrote:
On 2021/9/28 18:46, Philippe Mathieu-Daudé wrote:
On 9/28/21 11:31, Yanan Wang wrote:
There is one example of -smp CLI in qemu-options.hx currently
using "-smp 2" and ass
On 2021/9/28 20:25, Markus Armbruster wrote:
Philippe Mathieu-Daudé writes:
On 9/28/21 05:57, Yanan Wang wrote:
Currently the only difference between smp_parse and pc_smp_parse
is the support of dies parameter and the related error reporting.
With some arch compat variables like "bool dies_
On 2021/9/29 22:57, Paolo Bonzini wrote:
On 29/09/21 16:46, Markus Armbruster wrote:
Paolo Bonzini writes:
On 29/09/21 04:58, Yanan Wang wrote:
Hi,
This is a new version (v12) with minor update suggested by Daniel
and Philippe. Two new commits (#1 and #16) are added. Thanks!
Queued, than
Hi,
On 2022/1/26 17:14, Igor Mammedov wrote:
On Wed, 26 Jan 2022 13:24:10 +0800
Gavin Shan wrote:
The default CPU-to-NUMA association is given by mc->get_default_cpu_node_id()
when it isn't provided explicitly. However, the CPU topology isn't fully
considered in the default association and it
On 2021/10/28 23:05, Philippe Mathieu-Daudé wrote:
All these files don't make sense for tools and user emulation,
restrict them to system emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/meson.build | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff
On 2021/10/28 23:05, Philippe Mathieu-Daudé wrote:
As we want to be able to conditionally add files to the hw/core
file list, use a source set.
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build | 4 +++-
hw/core/meson.build | 4 ++--
2 files changed, 5 insertions(+), 3 deletio
Hi Philippe,
On 2021/10/28 23:05, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/qdev-hotplug.c | 73 ++
hw/core/qdev.c | 60 --
hw/core/meson.build| 1 +
3 files changed,
Hi Philippe,
On 2021/10/28 23:05, Philippe Mathieu-Daudé wrote:
Restrict hotplug to system emulation, add stubs for the other uses.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/hotplug-stubs.c | 34 ++
hw/core/meson.build | 12 ++--
2 files
Hi Philippe,
I saw that there are some cross-build failures and a clang complain
about this patch in your triggered CI pipeline. I believe the minor
diff below will resolve them. If you are going to resend v2 of the
"qdev-hotplug" patches, I would very much appreciate it if you
can also help to r
On 2021/11/5 22:26, Philippe Mathieu-Daudé wrote:
Commit 497a30dbb06 ("qemu-img: Require -F with -b backing image")
removed the content of the "Related binaries" section but forgot
to remove the section title. Since it is now empty, remove it too.
Signed-off-by: Philippe Mathieu-Daudé
---
d
On 2021/11/6 3:25, Laurent Vivier wrote:
Unify format used by trace_pci_update_mappings_del(),
trace_pci_update_mappings_add(), trace_pci_cfg_write() and
trace_pci_cfg_read() to print the device name and bus number,
slot number and function number.
For instance:
pci_cfg_read virtio-net-pci
Hi Philippe,
On 2021/11/6 1:21, Philippe Mathieu-Daudé wrote:
qdev_connect_gpio_out_named() is described as qdev_connect_gpio_out(),
and referring to itself in an endless loop, which is confusing. Fix.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 5 ++---
1 file change
On 2021/11/6 1:21, Philippe Mathieu-Daudé wrote:
@pin is an input where we connect a device output.
Rename it @input_pin to simplify the documentation.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 8
hw/core/gpio.c | 13 +++--
2 files change
On 2021/11/6 1:21, Philippe Mathieu-Daudé wrote:
'a20_out' is an input IRQ, rename it as 'a20_input'.
i8042_setup_a20_line() doesn't take a Device parameter
but an ISADevice one. Rename it as i8042_isa_*() to
make it explicit.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/input/i8042
On 2021/11/9 17:36, Philippe Mathieu-Daudé wrote:
Hi,
On 10/28/21 17:09, Philippe Mathieu-Daudé wrote:
From: Yanan Wang
Now that we have a generic parser smp_parse(), let's add an unit
test for the code. All possible valid/invalid SMP configurations
that the user can specify are covered.
Hi,
On 2021/11/9 17:36, Philippe Mathieu-Daudé wrote:
Hi,
On 10/28/21 17:09, Philippe Mathieu-Daudé wrote:
From: Yanan Wang
Now that we have a generic parser smp_parse(), let's add an unit
test for the code. All possible valid/invalid SMP configurations
that the user can specify are covered.
On 2021/11/10 18:16, Markus Armbruster wrote:
Yanan Wang writes:
Checkpatch.pl reports errors like below for commit 9e8e393bb7. Fix it.
ERROR: space required after that close brace '}'
+SMPTestData *data = &(SMPTestData){{ }};
Fixes: 9e8e393bb7 ("tests/unit: Add an unit test for smp par
Cc'ing qemu-triv...@nongnu.org. What about this simple one ?
Before this patch, with "-smp 4, dies=2" for a PC machine, we will
generate warn strings like:
qemu-system-x86_64: warning: CPU(s) not present in any NUMA nodes: CPU 0
[socket-id: 0die-id: 0, core-id: 0, thread-id: 0]
After we will
Ping...
On 2021/10/14 21:22, Yanan Wang wrote:
Run ./tests/data/acpi/rebuild-expected-aml.sh from build directory
to update PPTT binary. Also empty bios-tables-test-allowed-diff.h.
Disassembled output of the updated new file:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler v
Ping...
On 2021/10/14 21:22, Yanan Wang wrote:
Add a generic empty binary file for the new introduced PPTT table
under tests/data/acpi/virt, and list it as files to be changed in
tests/qtest/bios-tables-test-allowed-diff.h
Signed-off-by: Yanan Wang
---
tests/data/acpi/virt/PPTT
Ping... for review of the newly added ACPI patches.
On 2021/10/14 21:21, Yanan Wang wrote:
Hi,
This is the latest v8 with update in patch #6 and #8. Now only one
generic reference file for PPTT is added in tests/data/acpi/virt.
Machiel and Igor, please help to have a look, thanks!
And sorry fo
Ping...
Is this a right direction to go or should I continue on with this ?
On 2021/10/7 18:43, Yanan Wang wrote:
Hi,
The motivation of this series is to improve the scalability of SMP
related Docs, so that we can easily/clearly extend them without making
confusion when we plan to introduce mo
Hi Eric,
On 2021/10/20 16:02, Eric Auger wrote:
Hi,
On 10/14/21 3:22 PM, Yanan Wang wrote:
From: Andrew Jones
Add the Processor Properties Topology Table (PPTT) used to
describe CPU topology information to ACPI guests.
Note, a DT-boot Linux guest with a non-flat CPU topology will
see socket
On 2021/10/20 15:43, Eric Auger wrote:
Hi
On 10/14/21 3:22 PM, Yanan Wang wrote:
Add a generic API to build Processor hierarchy node structure (Type 0),
which is strictly consistent with descriptions in ACPI 6.2: 5.2.29.1.
This function will be used to build ACPI PPTT table for cpu topology.
On 2021/10/20 16:05, Eric Auger wrote:
Hi
On 10/14/21 3:22 PM, Yanan Wang wrote:
Generate PPTT table for Arm virt machines.
Generate the Processor Properties Topology Table (PPTT) for ARM virt
machines supporting it (>= 6.2)
Ok, much clearer. I will add it to the commit msg.
Thanks,
Yanan
Hi Eric,
On 2021/10/20 19:11, Eric Auger wrote:
Hi Yanan,
On 10/20/21 11:51 AM, wangyanan (Y) wrote:
Hi Eric,
On 2021/10/20 16:02, Eric Auger wrote:
Hi,
On 10/14/21 3:22 PM, Yanan Wang wrote:
From: Andrew Jones
Add the Processor Properties Topology Table (PPTT) used to
describe CPU
On 2021/10/20 18:04, Michael S. Tsirkin wrote:
On Wed, Oct 20, 2021 at 05:51:46PM +0800, wangyanan (Y) wrote:
On 2021/10/20 15:43, Eric Auger wrote:
Hi
On 10/14/21 3:22 PM, Yanan Wang wrote:
Add a generic API to build Processor hierarchy node structure (Type 0),
which is strictly
On 2021/10/20 20:43, Eric Auger wrote:
Hi,
On 10/20/21 2:27 PM, wangyanan (Y) wrote:
Hi Eric,
On 2021/10/20 19:11, Eric Auger wrote:
Hi Yanan,
On 10/20/21 11:51 AM, wangyanan (Y) wrote:
Hi Eric,
On 2021/10/20 16:02, Eric Auger wrote:
Hi,
On 10/14/21 3:22 PM, Yanan Wang wrote:
From
On 2021/10/21 17:08, Andrew Jones wrote:
On Wed, Oct 20, 2021 at 08:53:00PM +0800, wangyanan (Y) wrote:
Table 5-149 of 6.2 spec (6.2 May 2017) tells the rev shall be 1. Or is
it an erratum somewhere I did miss?
Yes, the revision in 6.2 spec is 1. And it's 2 in spec 6.3.
So just to be
On 2021/10/13 15:41, Yanan Wang wrote:
Now that we have a generic parser smp_parse(), let's add an unit
test for the code. All possible valid/invalid SMP configurations
that the user can specify are covered.
Signed-off-by: Yanan Wang
Reviewed-by: Andrew Jones
---
MAINTAINERS
On 2021/10/19 16:23, Laurent Vivier wrote:
Le 08/10/2021 à 09:50, Yanan Wang a écrit :
The expected output string from cpu_slot_to_string() ought to be
like "socket-id: *, die-id: *, core-id: *, thread-id: *", so add
the missing ", " before "die-id". This affects the readability
of the error m
Hi,
Does this short series have a chance to get on the train for 6.2
before the closely coming soft-feature freeze? It would be very
nice to have a test finally, since all the previous work on -smp
code has been completed and merged, IMO. 😉
Regards,
Yanan
On 2021/10/26 11:46, Yanan Wang wrote:
On 2021/10/28 22:44, Philippe Mathieu-Daudé wrote:
On 10/26/21 05:46, Yanan Wang wrote:
Hi,
This is v3 which introduces an unit test for generic smp_parse.
We have had enough discussions about what kind of SMP configurations
by the user should be considered valid and what should be invalid.
On 2022/1/7 21:38, Thomas Huth wrote:
If I configure my build with --enable-sanitizers, my GCC (v8.5.0)
complains:
.../softmmu/device_tree.c: In function ‘qemu_fdt_add_path’:
.../softmmu/device_tree.c:560:18: error: ‘retval’ may be used uninitialized
in this function [-Werror=maybe-uninitial
On 2022/1/8 4:18, Richard Henderson wrote:
On 1/7/22 5:38 AM, Thomas Huth wrote:
diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c
index 3965c834ca..9e96f5ecd5 100644
--- a/softmmu/device_tree.c
+++ b/softmmu/device_tree.c
@@ -564,7 +564,7 @@ int qemu_fdt_add_path(void *fdt, const cha
On 2022/1/12 1:26, Peter Maydell wrote:
Fix a comment in qdev-core.h where we incorrectly referred
to TYPE_IRQ_SPLIT when we meant TYPE_SPLIT_IRQ.
Signed-off-by: Peter Maydell
---
include/hw/qdev-core.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/qdev-cor
On 2022/1/12 1:55, Philippe Mathieu-Daudé wrote:
Fix typo in 'make check-help' output.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/Makefile.include | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 4c564cf7899..3ab
Hi Zhao,
在 2023/2/13 17:50, Zhao Liu 写道:
From: Zhao Liu
Since hybrid cpu topology configuration can benefit not only x86, but
also other architectures/platforms that have supported (in real
machines) or will support hybrid CPU topology, "-hybrid" can be generic.
So add the generic topology pr
在 2023/2/14 18:16, Zhao Liu 写道:
On Mon, Feb 13, 2023 at 09:18:05PM +0800, wangyanan (Y) wrote:
Date: Mon, 13 Feb 2023 21:18:05 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 06/52] hw/cpu: Introduce hybrid CPU topology
Hi Zhao,
在 2023/2/13 17:49, Zhao Liu 写道:
From: Zhao Liu
For s
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
For function comments in this file, keep the comment style consistent
with other places.
Signed-off-by: Zhao Liu
---
include/hw/i386/topology.h | 33 +
1 file changed, 17 insertions(+), 16 deletions(-)
diff --g
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
As module-level topology support is added to X86CPU, now we can enable
the support for the cluster parameter on PC machines. With this support,
we can define a 5-level x86 CPU topology with "-smp":
-smp cpus=*,maxcpus=*,sockets=*,dies=*,clus
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
In fact, this unit tests APIC ID other than CPUID.
Rename to test-x86-apicid.c to make its name more in line with its
actual content.
Signed-off-by: Zhao Liu
---
MAINTAINERS| 2 +-
tests/unit/meson.build
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
>From CPUState.nr_cores' comment, it represents "number of cores within
this CPU package".
After 003f230 (machine: Tweak the order of topology members in struct
CpuTopology), the meaning of smp.cores changed to "the number of cores
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
In cpu_x86_cpuid(), there are many variables in representing the cpu
topology, e.g., topo_info, cs->nr_cores/cs->nr_threads.
Since the names of cs->nr_cores/cs->nr_threads does not accurately
represent its meaning, the use of cs->nr_cores/cs->nr_t
在 2023/2/15 15:10, Zhao Liu 写道:
On Wed, Feb 15, 2023 at 11:28:25AM +0800, wangyanan (Y) wrote:
Date: Wed, 15 Feb 2023 11:28:25 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 05/18] i386/cpu: Consolidate the use of
topo_info in cpu_x86_cpuid()
在 2023/2/13 17:36, Zhao Liu
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
smp command has the "clusters" parameter but x86 hasn't supported that
level. Though "clusters" was introduced to help define L2 cache topology
[1], using cluster to define x86's L2 cache topology will cause the
compatibility problem:
Well,
在 2023/2/15 11:35, Zhao Liu 写道:
On Wed, Feb 15, 2023 at 10:36:34AM +0800, wangyanan (Y) wrote:
Date: Wed, 15 Feb 2023 10:36:34 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 02/18] tests: Rename test-x86-cpuid.c to
test-x86-apicid.c
在 2023/2/13 17:36, Zhao Liu 写道:
From
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
For i-cache and d-cache, the maximum IDs for CPUs sharing cache (
CPUID.04H.00H:EAX[bits 25:14] and CPUID.04H.01H:EAX[bits 25:14]) are
both 0, and this means i-cache and d-cache are shared in the SMT level.
This is correct if there's sing
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
Support module level in i386 cpu topology structure "X86CPUTopoInfo".
Before updating APIC ID parsing rule with module level, the
apicid_core_width() temporarily combines the core and module levels
together.
At present, we don't expose modu
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
For function comments in this file, keep the comment style consistent
with other places.
Signed-off-by: Zhao Liu
nit：Better to move this cleanup patch to top of the series.
---
include/hw/i386/topology.h | 33 +
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
Add the module level parsing support for APIC ID.
With this support, now the conversion between X86CPUTopoIDs,
X86CPUTopoInfo and APIC ID is completed.
IIUC, contents in patch 6-8 and 10 are all about "Introduce the module-level
C
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
After i386 supports module level, it's time to add the test for module
level's parsing.
Signed-off-by: Zhuocheng Ding
Co-developed-by: Zhao Liu
Signed-off-by: Zhao Liu
---
tests/unit/test-x86-apicid.c | 19 +++
1 file c
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
Currently, by default, the cache topology is encoded as:
1. i/d cache is shared in one core.
2. L2 cache is shared in one core.
3. L3 cache is shared in one die.
This default general setting has caused a misunderstanding, that is, the
ca
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
>From AMD's APM, NumSharingCache (CPUID[0x801D].EAX[bits 25:14])
means [1]:
The number of logical processors sharing this cache is the value of
this field incremented by 1. To determine which logical processors are
sharing a cache, determine a
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
Support module level in i386 cpu topology structure "X86CPUTopoInfo".
Before updating APIC ID parsing rule with module level, the
apicid_core_width() temporarily combines the core and module levels
together.
If we dont merge this
在 2023/2/15 23:03, Zhao Liu 写道:
On Wed, Feb 15, 2023 at 07:06:32PM +0800, wangyanan (Y) wrote:
Date: Wed, 15 Feb 2023 19:06:32 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 10/18] i386: Update APIC ID parsing rule to
support module level
Hi Zhao,
在 2023/2/13 17:36, Z
Hi Zhao,
在 2023/2/13 17:49, Zhao Liu 写道:
From: Zhao Liu
When MachineState.topo is introduced, the topology related structures
become complicated. In the general case (hybrid or smp topology),
accessing the topology information needs to determine whether it is
currently smp or hybrid topology,
Hi Zhao,
在 2023/2/13 17:49, Zhao Liu 写道:
From: Zhao Liu
At present, in QEMU only arm needs PPTT table to build cpu topology.
Before QEMU's arm supports hybrid architectures, it's enough to limit
the cpu topology of PPTT to smp type through the explicit smp interface
(machine_topo_get_smp_thre
在 2023/2/13 17:50, Zhao Liu 写道:
From: Zhao Liu
When MachineState.topo is introduced, the topology related structures
become complicated. So we wrapped the access to topology fields of
MachineState.topo into some helpers, and we are using these helpers
to replace the use of MachineState.smp.
Be
Hi Zhao,
在 2023/2/13 17:50, Zhao Liu 写道:
From: Zhao Liu
Since supported core types are architecture specific, we need this hook
to allow archs define its own parsing or validation method.
As the example, add the x86 core_type() which will be used in "-hybrid"
parameter parsing.
Signed-off-by
在 2023/2/15 10:53, Zhao Liu 写道:
On Tue, Feb 14, 2023 at 09:46:50AM +0800, wangyanan (Y) wrote:
Date: Tue, 14 Feb 2023 09:46:50 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 42/52] hw/machine: Add hybrid_supported in generic topo
properties
Hi Zhao,
在 2023/2/13 17:50, Zhao Liu
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
The property x-l2-cache-topo will be used to change the L2 cache
topology in CPUID.04H.
Now it allows user to set the L2 cache is shared in core level or
cluster level.
If user passes "-cpu x-l2-cache-topo=[core|cluster]" then older L2 cache
topo
在 2023/2/17 11:35, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 09:14:54PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 21:14:54 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
cache topo in CPUID.04H
在 2023/2/13 17:36, Zhao Liu
在 2023/2/17 11:35, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 09:14:54PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 21:14:54 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
cache topo in CPUID.04H
在 2023/2/13 17:36, Zhao Liu
在 2023/2/17 11:07, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 04:38:38PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 16:38:38 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 08/52] machine: Add helpers to get cpu topology info from
MachineState.topo
Hi Zhao,
在 2023/2/13 17:49, Z
在 2023/2/17 11:26, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 08:15:23PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 20:15:23 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 41/52] machine: Introduce core_type() hook
Hi Zhao,
在 2023/2/13 17:50, Zhao Liu 写道:
From: Zhao Liu
Since
在 2023/2/17 11:14, Zhao Liu 写道:
On Thu, Feb 16, 2023 at 05:31:11PM +0800, wangyanan (Y) wrote:
Date: Thu, 16 Feb 2023 17:31:11 +0800
From: "wangyanan (Y)"
Subject: Re: [RFC 12/52] hw/acpi: Replace MachineState.smp access with
topology helpers
Hi Zhao,
在 2023/2/13 17:49, Zhao Liu
在 2023/2/17 15:26, Zhao Liu 写道:
On Fri, Feb 17, 2023 at 12:07:01PM +0800, wangyanan (Y) wrote:
Date: Fri, 17 Feb 2023 12:07:01 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
cache topo in CPUID.04H
在 2023/2/17 11:35, Zhao Liu 写
在 2023/2/20 10:49, Zhao Liu 写道:
On Fri, Feb 17, 2023 at 05:08:31PM +0800, wangyanan (Y) wrote:
Date: Fri, 17 Feb 2023 17:08:31 +0800
From: "wangyanan (Y)"
Subject: Re: [PATCH RESEND 18/18] i386: Add new property to control L2
cache topo in CPUID.04H
在 2023/2/17 15:26, Zhao Liu 写
Hi Yicong,
On 2022/10/27 11:26, Yicong Yang wrote:
From: Yicong Yang
Currently we'll always generate a cluster node no matter user has
specified '-smp clusters=X' or not. Cluster is an optional level
and will participant the building of Linux scheduling domains and
only appears on a few platfo
Hi Yicong,
On 2022/10/31 17:05, Yicong Yang wrote:
From: Yicong Yang
Add test for aarch64's ACPI topology building for all the supported
levels.
Acked-by: Michael S. Tsirkin
Signed-off-by: Yicong Yang
---
tests/qtest/bios-tables-test.c | 22 ++
1 file changed, 22 inse
On 2022/10/31 17:05, Yicong Yang wrote:
From: Yicong Yang
Currently we'll always generate a cluster node no matter user has
specified '-smp clusters=X' or not. Cluster is an optional level
and will participant the building of Linux scheduling domains and
only appears on a few platforms.
It's
Hi Yicong,
On 2022/10/31 17:05, Yicong Yang wrote:
From: Yicong Yang
Update the ACPI tables according to the acpi aml_build change.
We may also need the disassembled context of the table change
in the commit message, for review.
For your reference: see patch 6 in [1]:
https://patchew.org/QEM
On 2022/11/1 15:10, Yicong Yang wrote:
From: Yicong Yang
Allow changes to test/data/acpi/virt/PPTT, prepare to change the
building policy of the cluster topology.
Signed-off-by: Yicong Yang
Reviewed-by: Yanan Wang
Thanks,
Yanan
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1
On 2022/11/1 15:10, Yicong Yang wrote:
From: Yicong Yang
Currently we'll always generate a cluster node no matter user has
specified '-smp clusters=X' or not. Cluster is an optional level
and will participant the building of Linux scheduling domains and
only appears on a few platforms. It's u
On 2022/11/1 15:10, Yicong Yang wrote:
From: Yicong Yang
Update the ACPI tables according to the acpi aml_build change, also
empty bios-tables-test-allowed-diff.h.
The disassembled differences between actual and expected PPTT:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Dis
On 2022/11/1 15:10, Yicong Yang wrote:
From: Yicong Yang
Add and whitelist *.topology blobs, prepares for the aarch64's ACPI
topology building test.
Signed-off-by: Yicong Yang
Reviewed-by: Yanan Wang
Thanks,
Yanan
---
tests/data/acpi/virt/APIC.topology | 0
tests/data/acpi/v
On 2022/11/1 15:10, Yicong Yang wrote:
From: Yicong Yang
Add test for aarch64's ACPI topology building for all the supported
levels.
Acked-by: Michael S. Tsirkin
Signed-off-by: Yicong Yang
---
tests/qtest/bios-tables-test.c | 19 +++
1 file changed, 19 insertions(+)
dif
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