RE: [PATCH 21/38] target/hexagon: Add system reg insns

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 13/38] target/hexagon: Define DCache states

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 18/38] target/hexagon: Make A_PRIV, "J2_trap*" insts need_env()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 17/38] target/hexagon: Add vmstate representation

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 19/38] target/hexagon: Define register fields for system regs

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 20/38] target/hexagon: Implement do_raise_exception()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 16/38] target/hexagon: Add placeholder greg/sreg r/w helpers

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 05/38] target/hexagon: Switch to tag_ignore(), generate via get_{user, sys}_tags()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 34/39] target/hexagon: Add TLB, k0 {un,}lock

> -Original Message- > From: Philippe Mathieu-Daudé > Sent: Tuesday, March 4, 2025 6:19 PM > To: ltaylorsimp...@gmail.com; richard.hender...@linaro.org; 'Brian Cain' > ; qemu-devel@nongnu.org > Cc: quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; alex.ben

RE: [PATCH 34/39] target/hexagon: Add TLB, k0 {un,}lock

> -Original Message- > From: Brian Cain > Sent: Monday, March 3, 2025 10:24 AM > To: qemu-devel@nongnu.org > Cc: richard.hender...@linaro.org; phi...@linaro.org; > quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsimp...@gmail.com; > alex.ben...@li

RE: [PATCH 34/39] target/hexagon: Add TLB, k0 {un,}lock

> -Original Message- > From: Philippe Mathieu-Daudé > Sent: Tuesday, March 4, 2025 5:58 PM > To: richard.hender...@linaro.org; ltaylorsimp...@gmail.com; 'Brian Cain' > ; qemu-devel@nongnu.org > Cc: quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; alex.ben

RE: [PATCH 03/38] target/hexagon: Add System/Guest register definitions

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 09/38] target/hexagon: Add guest, system reg number state

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 11/38] target/hexagon: Add guest/sys reg writes to DisasContext

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 08/38] target/hexagon: Add guest, system reg number defs

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 04/38] target/hexagon: Make gen_exception_end_tb non-static

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 06/38] target/hexagon: Add privilege check, use tag_ignore()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 07/38] target/hexagon: Add a placeholder fp exception

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 31/38] target/hexagon: Add {TLB, k0}lock, cause code, wait_next_pc

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 32/38] target/hexagon: Add stubs for modify_ssr/get_exe_mode

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 30/38] target/hexagon: Add a TLB count property

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 27/38] target/hexagon: Add sreg_{read,write} helpers

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 28/38] target/hexagon: Initialize htid, modectl regs

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 29/38] target/hexagon: Add locks, id, next_PC to state

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 23/38] target/hexagon: Add implicit attributes to sysemu macros

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 28/38] target/hexagon: Initialize htid, modectl regs

> -Original Message- > From: Philippe Mathieu-Daudé > Sent: Wednesday, March 12, 2025 6:40 PM > To: Brian Cain ; qemu-devel@nongnu.org > Cc: richard.hender...@linaro.org; quic_mathb...@quicinc.com; > a...@rev.ng; a...@rev.ng; quic_mlie...@quicinc.com; > ltaylorsimp...@gmail.com; alex.be

RE: [PATCH 01/38] docs: Add hexagon sysemu docs

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 02/38] docs/system: Add hexagon CPU emulation

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 02/38] docs/system: Add hexagon CPU emulation

> -Original Message- > From: Brian Cain > Sent: Wednesday, March 5, 2025 2:13 PM > To: ltaylorsimp...@gmail.com; qemu-devel@nongnu.org > Cc: richard.hender...@linaro.org; phi...@linaro.org; > quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; alex.ben...@li

RE: [PATCH 33/38] target/hexagon: Add gdb support for sys regs

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 26/38] target/hexagon: Add TCG overrides for rte, nmi

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 38/38] target/hexagon: Add hex_interrupts support

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 37/38] target/hexagon: Define f{S,G}ET_FIELD macros

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 34/38] target/hexagon: Add initial MMU model

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 35/38] target/hexagon: Add IRQ events

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 36/38] target/hexagon: Add clear_wait_mode() definition

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 10/38] target/hexagon: Add TCG values for sreg, greg

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 6/8] target/hexagon: add build config for softmmu

> -Original Message- > From: Brian Cain > Sent: Saturday, March 1, 2025 11:21 AM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsimp

RE: [PATCH 36/39] target/hexagon: Add TCG overrides for transfer insts

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 39/39] target/hexagon: Add pcycle setting functionality

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 22/39] target/hexagon: Implement setprio, resched

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 22/39] target/hexagon: Implement setprio, resched

> -Original Message- > From: Sid Manning > Sent: Thursday, March 20, 2025 3:26 PM > To: ltaylorsimp...@gmail.com; 'Brian Cain' > ; qemu-devel@nongnu.org > Cc: richard.hender...@linaro.org; phi...@linaro.org; Matheus Bernardino > (QUIC) ; a...@rev.ng; a...@rev.ng; Marco > Liebel (QUIC) ;

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