This patchset enables QEMU to save/restore vcpu's TSC rate during the
migration. When cooperating with KVM which supports TSC scaling, guest
programs can observe a consistent guest TSC rate even though they are
migrated among machines with different host TSC rates.
Haozhong Zhang (3):
t
The newly added subsection 'vmstate_tsc_khz' in this patch results in
vcpu's TSC rate being saved on the source machine and loaded on the
target machine during the migration.
Signed-off-by: Haozhong Zhang
---
target-i386/machine.c | 20
1 file changed
When creating a vcpu, we initialize its TSC rate to the value from
KVM (through ioctl KVM_GET_TSC_KHZ).
Signed-off-by: Haozhong Zhang
---
target-i386/kvm.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 7b0ba17..c2b161a 100644
--- a/target
t KVM on the target machine supports TSC scaling, guest
programs running on the migrated vcpu will observe the same TSC rate
before and after the migration.
Signed-off-by: Haozhong Zhang
---
kvm-all.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/kvm-all.c b/kvm-all.c
index 0b
On Mon, Sep 28, 2015 at 01:17:44PM -0300, Eduardo Habkost wrote:
> On Mon, Sep 28, 2015 at 01:38:30PM +0800, Haozhong Zhang wrote:
> > When creating a vcpu, we initialize its TSC rate to the value from
> > KVM (through ioctl KVM_GET_TSC_KHZ).
> >
> > Si
On Tue, Sep 29, 2015 at 09:23:39AM +0800, Haozhong Zhang wrote:
> On Mon, Sep 28, 2015 at 01:17:44PM -0300, Eduardo Habkost wrote:
> > On Mon, Sep 28, 2015 at 01:38:30PM +0800, Haozhong Zhang wrote:
> > > When creating a vcpu, we initialize its TSC rate to the value from
> &
On Mon, Sep 28, 2015 at 01:37:34PM -0300, Eduardo Habkost wrote:
> On Mon, Sep 28, 2015 at 01:38:31PM +0800, Haozhong Zhang wrote:
> > When a vcpu is created in KVM, its TSC rate is initially identical to
> > the host TSC rate. If its state is migrated to a vcpu on another
>
On Tue, Sep 29, 2015 at 03:02:07PM -0300, Eduardo Habkost wrote:
> On Tue, Sep 29, 2015 at 11:43:34AM +0800, Haozhong Zhang wrote:
> > On Mon, Sep 28, 2015 at 01:37:34PM -0300, Eduardo Habkost wrote:
> > > On Mon, Sep 28, 2015 at 01:38:31PM +0800, Haozhong Zhang wrote:
> [...]
On Tue, Sep 29, 2015 at 08:00:13PM +0100, Dr. David Alan Gilbert wrote:
> * Haozhong Zhang (haozhong.zh...@intel.com) wrote:
> > The newly added subsection 'vmstate_tsc_khz' in this patch results in
> > vcpu's TSC rate being saved on the source machine and loaded on
On Wed, Sep 30, 2015 at 05:36:11PM -0300, Eduardo Habkost wrote:
> On Wed, Sep 30, 2015 at 08:32:26AM +0800, Haozhong Zhang wrote:
> > > [...]
> > > > > Or maybe we shouldn't treat this as VM state, but as configuration,
> > > > > and
>
On Wed, Sep 30, 2015 at 09:07:08AM +0100, Dr. David Alan Gilbert wrote:
> * Haozhong Zhang (haozhong.zh...@intel.com) wrote:
> > On Tue, Sep 29, 2015 at 08:00:13PM +0100, Dr. David Alan Gilbert wrote:
> > > * Haozhong Zhang (haozhong.zh...@intel.com) wrote:
> > > &
On Mon, Oct 26, 2015 at 04:41:22PM -0200, Eduardo Habkost wrote:
> On Mon, Oct 26, 2015 at 10:09:13AM +0800, haozhong.zh...@intel.com wrote:
> > On Fri, Oct 23, 2015 at 12:45:13PM -0200, Eduardo Habkost wrote:
> > > On Fri, Oct 23, 2015 at 10:27:27AM +0800, Haozhong Zhang wro
A new subsection 'vmstate_tsc_khz' is added to migrate vcpu's TSC
rate. For the backwards compatibility, this subsection is not migrated
on pc-*-2.4 and older machine types.
Signed-off-by: Haozhong Zhang
---
hw/i386/pc.c | 1 +
hw/i386/pc_piix.c | 1 +
hw/i386/pc_
C rate from KVM (returned by
KVM_GET_TSC_KHZ).
3. Otherwise, we will use the migrated TSC rate.
Signed-off-by: Haozhong Zhang
---
include/sysemu/kvm.h | 2 ++
kvm-all.c| 1 +
target-arm/kvm.c | 5 +
target-i386/kvm.c| 33 +
target-mip
m_cpu_synchronize_post_init().
Changes in v2:
* Add a pair of cpu options 'save-tsc-freq' and 'load-tsc-freq' to
control the migration of vcpu's TSC rate.
* Move all logic of setting TSC rate to target-i386.
* Remove the duplicated TSC setup in kvm_arch_init_vcpu(
Set vcpu's TSC rate to the migrated value if the user does not specify a
TSC rate by cpu option 'tsc-freq' and a migrated TSC rate does exist. If
KVM supports TSC scaling, guest programs will observe TSC increasing in
the migrated rate other than the host TSC rate.
Signed-off-by:
On Mon, Nov 02, 2015 at 09:40:18AM +, James Hogan wrote:
> On Mon, Nov 02, 2015 at 05:26:42PM +0800, Haozhong Zhang wrote:
> > The value of the migrated vcpu's TSC rate is determined as below.
> > 1. If a TSC rate is specified by the cpu option 'tsc-freq', th
On 11/04/15 19:42, Eduardo Habkost wrote:
> On Mon, Nov 02, 2015 at 05:26:42PM +0800, Haozhong Zhang wrote:
> > The value of the migrated vcpu's TSC rate is determined as below.
> > 1. If a TSC rate is specified by the cpu option 'tsc-freq', then this
> >
On 11/05/15 09:05, Christian Borntraeger wrote:
> Am 02.11.2015 um 10:40 schrieb James Hogan:
> > On Mon, Nov 02, 2015 at 05:26:42PM +0800, Haozhong Zhang wrote:
> >> The value of the migrated vcpu's TSC rate is determined as below.
> >> 1. If a TSC rate is speci
On 11/05/15 14:05, Eduardo Habkost wrote:
> On Thu, Nov 05, 2015 at 09:30:51AM +0800, Haozhong Zhang wrote:
> > On 11/04/15 19:42, Eduardo Habkost wrote:
> > > On Mon, Nov 02, 2015 at 05:26:42PM +0800, Haozhong Zhang wrote:
> > > > The value of the migrated vcpu
On 11/05/15 14:10, Eduardo Habkost wrote:
> On Mon, Nov 02, 2015 at 05:26:43PM +0800, Haozhong Zhang wrote:
> > Set vcpu's TSC rate to the migrated value if the user does not specify a
> > TSC rate by cpu option 'tsc-freq' and a migrated TSC rate does exist. If
>
On 11/06/15 13:12, Eduardo Habkost wrote:
> On Fri, Nov 06, 2015 at 10:32:24AM +0800, haozhong.zh...@intel.com wrote:
> > On 11/05/15 14:05, Eduardo Habkost wrote:
> > > On Thu, Nov 05, 2015 at 09:30:51AM +0800, Haozhong Zhang wrote:
> > > > On 11/04/1
5 14:05, Eduardo Habkost wrote:
> > > > > On Thu, Nov 05, 2015 at 09:30:51AM +0800, Haozhong Zhang wrote:
> > > > > > On 11/04/15 19:42, Eduardo Habkost wrote:
> > > [...]
> > > > > > > > +env->tsc_khz_saved = r;
> >
5 14:05, Eduardo Habkost wrote:
> > > > > On Thu, Nov 05, 2015 at 09:30:51AM +0800, Haozhong Zhang wrote:
> > > > > > On 11/04/15 19:42, Eduardo Habkost wrote:
> > > [...]
> > > > > > > > +env->tsc_khz_saved = r;
> >
On 11/11/15 12:16, Eduardo Habkost wrote:
> On Mon, Nov 02, 2015 at 05:26:41PM +0800, Haozhong Zhang wrote:
> > A new subsection 'vmstate_tsc_khz' is added to migrate vcpu's TSC
> > rate. For the backwards compatibility, this subsection is not migrated
> >
On 11/11/15 13:23, Eduardo Habkost wrote:
> On Wed, Nov 11, 2015 at 12:57:44AM +0800, Haozhong Zhang wrote:
> > On 11/09/15 14:01, Eduardo Habkost wrote:
> > > On Mon, Nov 09, 2015 at 08:33:55AM +0800, haozhong.zh...@intel.com wrote:
> > > > On 11/06/15 13:12, Eduar
On 11/11/15 12:54, Eduardo Habkost wrote:
> On Tue, Nov 10, 2015 at 09:08:58AM +0800, Haozhong Zhang wrote:
> > On 11/09/15 14:01, Eduardo Habkost wrote:
> > > On Mon, Nov 09, 2015 at 08:33:55AM +0800, haozhong.zh...@intel.com wrote:
> > > > On 11/06/15 13:12, Eduar
On 11/11/15 22:27, Haozhong Zhang wrote:
> On 11/11/15 12:16, Eduardo Habkost wrote:
[...]
> > > diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> > > index 2f8f396..858ed69 100644
> > > --- a/hw/i386/pc_q35.c
> > > +++ b/hw/i386/pc_q35.
te is
disabled on pc-*-2.4 and older machine types.
Signed-off-by: Haozhong Zhang
---
hw/i386/pc.c | 1 +
hw/i386/pc_piix.c | 1 +
hw/i386/pc_q35.c | 1 +
include/hw/i386/pc.h | 1 +
target-i386/cpu.c | 2 +-
target-i386/cpu.h | 1 +
target-i386/kvm.c | 26
On 11/13/15 13:21, Eduardo Habkost wrote:
> On Fri, Nov 13, 2015 at 10:23:54AM +0800, Haozhong Zhang wrote:
> > On 11/11/15 22:27, Haozhong Zhang wrote:
> > > On 11/11/15 12:16, Eduardo Habkost wrote:
> > [...]
> > > > > diff --git a/hw/i386/pc_q35.c b/h
SC rate as above.
* Move the setup of migrated TSC rate back to
do_kvm_cpu_synchronize_post_init().
Changes in v2:
* Add a pair of cpu options 'save-tsc-freq' and 'load-tsc-freq' to
control the migration of vcpu's TSC rate.
* Move all logic of setting TSC rate to target-i386.
If no user-specified TSC rate is present, we will try to set
env->tsc_khz to the value returned by KVM_GET_TSC_KHZ.
Signed-off-by: Haozhong Zhang
---
target-i386/kvm.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
in
On 11/16/15 11:39, Eduardo Habkost wrote:
> On Mon, Nov 16, 2015 at 04:04:07PM +0800, Haozhong Zhang wrote:
> > If no user-specified TSC rate is present, we will try to set
> > env->tsc_khz to the value returned by KVM_GET_TSC_KHZ.
> >
> > Signed-off-by: Haozhong Z
On 11/16/15 11:43, Eduardo Habkost wrote:
> On Mon, Nov 16, 2015 at 04:04:08PM +0800, Haozhong Zhang wrote:
> > This patch enables migrating vcpu's TSC rate. If KVM on the destination
> > machine supports TSC scaling, guest programs will observe a consistent
> > TSC
es in v2:
* Add a pair of cpu options 'save-tsc-freq' and 'load-tsc-freq' to
control the migration of vcpu's TSC rate.
* Move all logic of setting TSC rate to target-i386.
* Remove the duplicated TSC setup in kvm_arch_init_vcpu().
Haozhong Zhang (3):
target-i386: fal
te is
disabled on pc-*-2.4 and older machine types.
Signed-off-by: Haozhong Zhang
---
hw/i386/pc.c | 1 +
hw/i386/pc_piix.c | 1 +
hw/i386/pc_q35.c | 1 +
include/hw/i386/pc.h | 1 +
target-i386/cpu.c | 2 +-
target-i386/cpu.h | 1 +
target-i386/kvm.c | 4 ++
If no user-specified TSC rate is present, we will try to set
env->tsc_khz to the value returned by KVM_GET_TSC_KHZ.
Signed-off-by: Haozhong Zhang
---
target-i386/kvm.c | 12
1 file changed, 12 insertions(+)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 2a9953b..9e4d
-by: Haozhong Zhang
---
target-i386/kvm.c | 45 ++---
1 file changed, 38 insertions(+), 7 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 9e4d27f..6a1acb4 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -524,6 +524,41
On 11/16/15 13:35, Eduardo Habkost wrote:
> On Mon, Nov 16, 2015 at 10:30:08PM +0800, Haozhong Zhang wrote:
> > On 11/16/15 11:43, Eduardo Habkost wrote:
> > > On Mon, Nov 16, 2015 at 04:04:08PM +0800, Haozhong Zhang wrote:
> > > > This patch enables migrating
On 11/17/15 11:14, Eduardo Habkost wrote:
> On Tue, Nov 17, 2015 at 01:20:37PM +0800, Haozhong Zhang wrote:
> > If no user-specified TSC rate is present, we will try to set
> > env->tsc_khz to the value returned by KVM_GET_TSC_KHZ.
> >
> > Signed-off-by: Haozhong Z
On 11/17/15 11:32, Eduardo Habkost wrote:
> On Tue, Nov 17, 2015 at 01:20:38PM +0800, Haozhong Zhang wrote:
> > Following two changes are made to the TSC rate setting code in
> > kvm_arch_init_vcpu():
> > * The code is moved to a new function kvm_arch_set_tsc_khz().
&
On 11/17/15 11:40, Eduardo Habkost wrote:
> Hi,
>
> On Tue, Nov 17, 2015 at 01:20:39PM +0800, Haozhong Zhang wrote:
> > This patch enables migrating vcpu's TSC rate. If KVM on the destination
> > machine supports TSC scaling, guest programs will observe a consiste
_vcpu()
unconditionally, even though the TSC rate to be set is identical
to the value currently used by KVM.
Signed-off-by: Haozhong Zhang
---
target-i386/kvm.c | 40 +---
1 file changed, 33 insertions(+), 7 deletions(-)
diff --git a/target-i386/kv
te is
disabled on pc-*-2.4 and older machine types.
Signed-off-by: Haozhong Zhang
---
hw/i386/pc.c | 1 +
hw/i386/pc_piix.c | 1 +
hw/i386/pc_q35.c | 1 +
include/hw/i386/pc.h | 1 +
target-i386/cpu.c | 2 +-
target-i386/cpu.h | 1 +
target-i386/kvm.c | 22 +
pu options 'save-tsc-freq' and 'load-tsc-freq' to
control the migration of vcpu's TSC rate.
* Move all logic of setting TSC rate to target-i386.
* Remove the duplicated TSC setup in kvm_arch_init_vcpu().
Haozhong Zhang (3):
target-i386: fallback vcpu's TSC rate to va
If no user-specified TSC rate is present, we will try to set
env->tsc_khz to the value returned by KVM_GET_TSC_KHZ. This patch does
not change the current functionality of QEMU and just prepares for later
patches to enable migrating vcpu's TSC rate.
Signed-off-by: Haozhong Zhang
---
tar
On 11/26/15 12:19, Eduardo Habkost wrote:
> On Tue, Nov 24, 2015 at 11:33:57AM +0800, Haozhong Zhang wrote:
> > This patch enables migrating vcpu's TSC rate. If KVM on the destination
> > machine supports TSC scaling, guest programs will observe a consistent
> > TSC
#x27;header'
afterwards may be illegal.
This patch fixes this issue by storing an offset within table_data->data[]
(rather than an address) in 'header'.
Signed-off-by: Haozhong Zhang
Reviewed-by: Xiao Guangrong
---
hw/acpi/nvdimm.c | 8 +---
1 file changed, 5 insertions(+
If vcpu's TSC rate is not specified by the cpu option 'tsc-freq', we
will use the value returned by KVM_GET_TSC_KHZ; otherwise, we use the
user-specified value.
Signed-off-by: Haozhong Zhang
---
target-i386/kvm.c | 33 +
1 file changed, 33 inse
enabled and the migrated vcpu's TSC
rate will override the value specified by the cpu option
'tsc-freq'. Otherwise, the loading will be disabled.
The setting of vcpu's TSC rate in this patch duplicates the code in
kvm_arch_init_vcpu(), so we remove the latter one.
Signed-off-b
types, they can enable it by giving a new cpu option
'save-tsc-freq'.
Signed-off-by: Haozhong Zhang
---
include/hw/i386/pc.h | 5 +
target-i386/cpu.c | 1 +
target-i386/cpu.h | 2 ++
target-i386/machine.c | 19 +++
4 files changed, 27 insertions(+)
dif
SC rate and override the TSC rate given by the cpu
option 'tsc-freq'.
Changes in v2:
* Add a pair of cpu options 'save-tsc-freq' and 'load-tsc-freq' to
control the migration of vcpu's TSC rate.
* Move all logic of setting TSC rate to target-i386.
On Thu, Oct 22, 2015 at 04:45:21PM -0200, Eduardo Habkost wrote:
> On Tue, Oct 20, 2015 at 03:22:51PM +0800, Haozhong Zhang wrote:
> > This patchset enables QEMU to save/restore vcpu's TSC rate during the
> > migration. When cooperating with KVM which supports TSC scaling, gu
On Thu, Oct 22, 2015 at 04:11:37PM -0200, Eduardo Habkost wrote:
> On Tue, Oct 20, 2015 at 03:22:54PM +0800, Haozhong Zhang wrote:
> > Set vcpu's TSC rate to the migrated value (if any). If KVM supports TSC
> > scaling, guest programs will observe TSC increasing in the migrated
On Thu, Oct 22, 2015 at 04:11:37PM -0200, Eduardo Habkost wrote:
> On Tue, Oct 20, 2015 at 03:22:54PM +0800, Haozhong Zhang wrote:
> > Set vcpu's TSC rate to the migrated value (if any). If KVM supports TSC
> > scaling, guest programs will observe TSC increasing in the migrated
On Fri, Oct 23, 2015 at 08:35:20AM -0200, Marcelo Tosatti wrote:
> On Thu, Oct 22, 2015 at 04:45:21PM -0200, Eduardo Habkost wrote:
> > On Tue, Oct 20, 2015 at 03:22:51PM +0800, Haozhong Zhang wrote:
> > > This patchset enables QEMU to save/restore vcpu's TSC rate during th
On Fri, Oct 23, 2015 at 12:45:13PM -0200, Eduardo Habkost wrote:
> On Fri, Oct 23, 2015 at 10:27:27AM +0800, Haozhong Zhang wrote:
> > On Thu, Oct 22, 2015 at 04:45:21PM -0200, Eduardo Habkost wrote:
> > > On Tue, Oct 20, 2015 at 03:22:51PM +0800, Haozhong Zhang wrote:
>
On Fri, Oct 23, 2015 at 12:58:02PM -0200, Eduardo Habkost wrote:
> On Fri, Oct 23, 2015 at 11:14:48AM +0800, Haozhong Zhang wrote:
> > On Thu, Oct 22, 2015 at 04:11:37PM -0200, Eduardo Habkost wrote:
> > > On Tue, Oct 20, 2015 at 03:22:54PM +0800, Haozhong Zhang wrote:
> >
LMCE is disabled by default, but a cpu option 'lmce=on/off' is provided
to enable/disable it. Migration is only allowed between VCPUs with the
same lmce option.
Signed-off-by: Haozhong Zhang
---
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduard
This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
will be injected to only one VCPU rather than broadcast to all
VCPUs. As KVM reports LMCE support on Intel platforms, this features is
only available on Intel platforms.
Signed-off-by: Ashok Raj
Signed-off-by: Haozhong Zhang
_IA32_FEATURE_CONTROL_LMCE)
of MSR_IA32_FEATURE_CONTROL and bit 0 (MCG_EXT_CTL_LMCE_EN) of
MSR_IA32_MCG_EXT_CTL.
* Software can determine if a MCE is local to the current processor
thread by checking bit 2 (MCG_STATUS_LMCE) of MSR_IA32_MCG_STATUS.
Haozhong Zhang (2):
target-i386: KVM:
On 06/03/16 14:09, Haozhong Zhang wrote:
> This is v3 of LMCE patch series. Previous ones can be found at
> v2: https://lists.nongnu.org/archive/html/qemu-devel/2015-12/msg01731.html
> v1: https://lists.nongnu.org/archive/html/qemu-devel/2015-12/msg01651.html
> v0: https://list
On 06/03/16 17:57, Radim Krčmář wrote:
> 2016-06-03 14:09+0800, Haozhong Zhang:
> > This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> > will be injected to only one VCPU rather than broadcast to all
> > VCPUs. As KVM reports LMCE support on Intel platfo
On 06/04/16 12:15, Boris Petkov wrote:
> Haozhong Zhang wrote:
>
> >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> >will be injected to only one VCPU rather than broadcast to all
> >VCPUs. As KVM reports LMCE support on Intel platforms,
On 06/04/16 12:34, Boris Petkov wrote:
> Haozhong Zhang wrote:
>
> >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> >will be injected to only one VCPU rather than broadcast to all
> >VCPUs. As KVM reports LMCE support on Intel platforms,
On 06/04/16 18:03, Eduardo Habkost wrote:
> On Sat, Jun 04, 2016 at 12:34:39PM +0200, Boris Petkov wrote:
> > Haozhong Zhang wrote:
> >
> > >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> > >will be injected to only one VCPU rather tha
On 06/07/16 17:41, Haozhong Zhang wrote:
> On 06/04/16 18:03, Eduardo Habkost wrote:
> > On Sat, Jun 04, 2016 at 12:34:39PM +0200, Boris Petkov wrote:
> > > Haozhong Zhang wrote:
> > >
> > > >This patch adds the support to inject SRAR and SRAO as LMCE, i.
On 06/07/16 17:10, Eduardo Habkost wrote:
> On Fri, Jun 03, 2016 at 02:09:43PM +0800, Haozhong Zhang wrote:
> [...]
> > +
> > +if (cpu->enable_lmce) {
> > +if (lmce_supported()) {
> > +cenv->mcg_cap |= M
On 06/07/16 17:18, Eduardo Habkost wrote:
> On Fri, Jun 03, 2016 at 02:09:44PM +0800, Haozhong Zhang wrote:
> > LMCE is disabled by default, but a cpu option 'lmce=on/off' is provided
> > to enable/disable it. Migration is only allowed between VCPUs with the
> > sa
On 06/08/16 13:34, Paolo Bonzini wrote:
>
>
> On 05/06/2016 17:41, Haozhong Zhang wrote:
> > On 06/04/16 12:34, Boris Petkov wrote:
> >> Haozhong Zhang wrote:
> >>
> >>> This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> &
On 06/08/16 13:36, Paolo Bonzini wrote:
>
>
> On 03/06/2016 08:09, Haozhong Zhang wrote:
> > LMCE is disabled by default, but a cpu option 'lmce=on/off' is provided
> > to enable/disable it. Migration is only allowed between VCPUs with the
> > same lmce opti
On 06/08/16 13:32, Paolo Bonzini wrote:
>
>
> On 03/06/2016 17:57, Radim Krčmář wrote:
> >> > +cenv->msr_ia32_feature_control |=
> >> > +MSR_IA32_FEATURE_CONTROL_LMCE |
> >> > +MSR_IA32_FEATURE_CONTROL_LOCKED;
> > Locking right from the star
On 06/13/16 10:33, Paolo Bonzini wrote:
>
>
> On 13/06/2016 09:55, Haozhong Zhang wrote:
> > Currently, only VMX bits (bit 1 & 2), LMCE bit (bit 20) as well as
> > lock bit (bit 0) in MSR_IA32_FEATURE_CONTROL are used for guest. The
> > availability of features
On 06/13/16 12:07, Paolo Bonzini wrote:
>
>
> On 13/06/2016 12:01, Haozhong Zhang wrote:
> > > I would prefer to avoid having to change the firmware (SeaBIOS and OVMF)
> > > every time a new bit is added. Using fw_cfg makes it possible to
> > > develop the
setting bit 20 (MSR_IA32_FEATURE_CONTROL_LMCE)
of MSR_IA32_FEATURE_CONTROL and bit 0 (MCG_EXT_CTL_LMCE_EN) of
MSR_IA32_MCG_EXT_CTL.
* Software can determine if a MCE is local to the current processor
thread by checking bit 2 (MCG_STATUS_LMCE) of MSR_IA32_MCG_STATUS.
Ashok Raj (1):
tar
Minor code style changes]
Signed-off-by: Haozhong Zhang
---
target-i386/cpu.c | 23 +++
target-i386/cpu.h | 12
target-i386/kvm.c | 35 +++
3 files changed, 66 insertions(+), 4 deletions(-)
diff --git a/target-i386/cpu.c b/tar
Migration is only allowed between VCPUs with the same lmce option.
Signed-off-by: Haozhong Zhang
---
target-i386/machine.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/target-i386/machine.c b/target-i386/machine.c
index cb9adf2..00375a3 100644
--- a/target-i386
CONTROL and can be used by guest firmware (e.g. SeaBIOS).
Suggested-by: Paolo Bonzini
Signed-off-by: Haozhong Zhang
---
hw/i386/pc.c | 28
target-i386/cpu.h | 4
2 files changed, 32 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7198ed5.
On 06/16/16 11:50, Paolo Bonzini wrote:
>
>
> On 16/06/2016 08:06, Haozhong Zhang wrote:
> > +if (!lmce_supported()) {
> > +error_setg(&local_err, "KVM unavailable or LMCE not
> > supported");
> > +
On 06/16/16 11:51, Paolo Bonzini wrote:
>
>
> On 16/06/2016 08:06, Haozhong Zhang wrote:
> > Migration is only allowed between VCPUs with the same lmce option.
> >
> > Signed-off-by: Haozhong Zhang
> > ---
> > target-i386/machine.c | 25 ++
On 06/16/16 12:23, Paolo Bonzini wrote:
>
>
> On 16/06/2016 12:16, Haozhong Zhang wrote:
> > >
> > > > +has_msr_mcg_ext_ctl = true;
> > > > }
> > > >
> > > > c = cpuid_find_entry(&cpuid_data.cpuid, 0x800
On 06/16/16 12:41, Paolo Bonzini wrote:
>
>
> On 16/06/2016 12:29, Haozhong Zhang wrote:
> > On 06/16/16 11:51, Paolo Bonzini wrote:
> >>
> >>
> >> On 16/06/2016 08:06, Haozhong Zhang wrote:
> >>> Migration is only allowed between VCPU
On 06/16/16 11:52, Paolo Bonzini wrote:
>
>
> On 16/06/2016 08:06, Haozhong Zhang wrote:
> > It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
> > be set before some features (e.g. VMX and LMCE) can be used, which is
> > usually done by
n that MSR.
Signed-off-by: Haozhong Zhang
---
QEMU patch added fw_cfg file etc/msr_feature_control can be found
at [1]. Note I mistakenly used u32 as the type of file content in
that patch, which should be u64 and will be fixed.
[1] https://lists.nongnu.org/archive/html/qemu-devel/2016-06/msg
On 06/16/16 14:03, Paolo Bonzini wrote:
>
>
> On 16/06/2016 13:49, Haozhong Zhang wrote:
> > diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
> > index 8ed4380..640ee4c 100644
> > --- a/src/fw/paravirt.c
> > +++ b/src/fw/paravirt.c
> > @@ -1
On 06/16/16 16:37, Eduardo Habkost wrote:
> On Thu, Jun 16, 2016 at 02:06:19PM +0800, Haozhong Zhang wrote:
> > From: Ashok Raj
> >
> > This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> > are injected to only one VCPU rather than broadcast to al
On 06/16/16 14:58, Eduardo Habkost wrote:
> On Thu, Jun 16, 2016 at 07:40:20PM +0200, Paolo Bonzini wrote:
> >
> >
> > On 16/06/2016 19:36, Eduardo Habkost wrote:
> > >> >
> > >> > Eduardo said nice for this part in previous version [1], so we may wait
> > >> > for his comments?
> > >> >
> > >>
n that MSR.
Signed-off-by: Haozhong Zhang
---
Changes in v2:
* Call msr_feature_control_setup() before smp_setup().
* Use wrmsr_smp() instead of wrmsr() on BSP.
* Rename smp_mtrr and smp_mtrr_count to smp_msr and smp_msr_count
as they are not only used for MTRR now.
---
Makefile
On 06/17/16 11:26, Kevin O'Connor wrote:
> On Fri, Jun 17, 2016 at 03:20:10PM +0800, Haozhong Zhang wrote:
> > OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> > for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> > "etc/msr_
On 06/17/16 13:20, Eduardo Habkost wrote:
> On Fri, Jun 17, 2016 at 09:26:57AM +0800, Haozhong Zhang wrote:
> [...]
> > > > static void mce_init(X86CPU *cpu)
> > > > {
> > > > CPUX86State *cenv = &cpu->env;
> > > >
On 06/17/16 14:20, Eduardo Habkost wrote:
> On Fri, Jun 17, 2016 at 10:01:05AM +0800, Haozhong Zhang wrote:
> > On 06/16/16 14:58, Eduardo Habkost wrote:
> > > On Thu, Jun 16, 2016 at 07:40:20PM +0200, Paolo Bonzini wrote:
> > > >
> > > >
> >
On 06/17/16 13:21, Raj, Ashok wrote:
> On Fri, Jun 17, 2016 at 07:31:08PM +0200, Laszlo Ersek wrote:
> > >>
> > >> On 16/06/2016 08:06, Haozhong Zhang wrote:
> > >>> It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
> > &g
On 06/20/16 08:56, Paolo Bonzini wrote:
>
>
> On 20/06/2016 05:09, Haozhong Zhang wrote:
> > In the current nested VMX implementation in QEMU, setup
> > MSR_IA32_FEATURE_CONTROL is left to guest. So I think, for LMCE which
> > is another feature involving MSR_IA32_FEA
On 06/20/16 08:58, Paolo Bonzini wrote:
>
>
> On 20/06/2016 04:11, Haozhong Zhang wrote:
> >>> > > Does that mean we can automatically enable LMCE for "-cpu host"?
> >> >
> >> > We can automatically enable LMCE for &q
n that MSR.
Signed-off-by: Haozhong Zhang
Reviewed-by: Paolo Bonzini
---
Changes in v3:
* Move msr_feature_control_setup() to paravirt.c.
Changes in v2:
* Call msr_feature_control_setup() before smp_setup().
* Use wrmsr_smp() instead of wrmsr() on BSP.
* Rename smp_mtrr and smp_mtrr_count to s
CONTROL and can be used by guest firmware (e.g. SeaBIOS).
Suggested-by: Paolo Bonzini
Signed-off-by: Haozhong Zhang
Reviewed-by: Paolo Bonzini
---
hw/i386/pc.c | 29 +
target-i386/cpu.h | 4
2 files changed, 33 insertions(+)
diff --git a/hw/i386/pc.c b/hw/
If -cpu host is used, LMCE will be automatically enabled when it's
supported by host.
Signed-off-by: Haozhong Zhang
---
target-i386/cpu.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index cdab4f1..610554f 100644
--- a/target
TROL and bit 0 (MCG_EXT_CTL_LMCE_EN) of
MSR_IA32_MCG_EXT_CTL.
* Software can determine if a MCE is local to the current processor
thread by checking bit 2 (MCG_STATUS_LMCE) of MSR_IA32_MCG_STATUS.
Ashok Raj (1):
target-i386: KVM: add basic Intel LMCE support
Haozhong Zhang (3):
i386: publ
E_P from MCE_CAP_DEF
Add migration support for LMCE
Minor code style changes]
Signed-off-by: Haozhong Zhang
---
target-i386/cpu.c | 4 +++-
target-i386/cpu.h | 12
target-i386/kvm.c | 36 +---
target-i386/machine.c | 19
... to avoid guest errors due to LMCE configurations changes when
migrating from LMCE-enabled QEMU to LMCE-disabled QEMU.
Signed-off-by: Haozhong Zhang
---
target-i386/machine.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 71c0e4d
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