Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang
---
include/elf.h | 2 +
linux-user/elfload.c | 23 +
linux-user/main.c | 236
Some of architectures (e.g. tilegx), several syscall macros are not
supported, so switch them.
Signed-off-by: Chen Gang
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux-user/syscall.c b/linux
It is copied from Linux kernel "arch/tile/include/uapi/arch/
opcode_tilegx.h".
Signed-off-by: Chen Gang
---
target-tilegx/opcode_tilegx.h | 1406 +
1 file changed, 1406 insertions(+)
create mode 100644 target-tilegx/opcode_tilegx.h
diff --gi
Use 'inline' instead of '__inline', and also use 'uint64_t' instead of
"unsigned long long"
Signed-off-by: Chen Gang
---
target-tilegx/opcode_tilegx.h | 220 +-
1 file changed, 110 insertions(+), 110
The related copy is from Linux kernel "arch/tile/include/uapi/arch/
spr_def_64.h".
Signed-off-by: Chen Gang
---
target-tilegx/spr_def_64.h | 216 +
1 file changed, 216 insertions(+)
create mode 100644 target-tilegx/spr_def_64.h
diff --gi
It implements minimized cpu features for linux-user.
Signed-off-by: Chen Gang
---
target-tilegx/cpu.c | 143 +++
target-tilegx/cpu.h | 171
2 files changed, 314 insertions(+)
create mode 100644 target
The related instructions are exception, cntlz, cnttz, and shufflebytes.
Signed-off-by: Chen Gang
---
target-tilegx/helper.c | 73 ++
target-tilegx/helper.h | 4 +++
2 files changed, 77 insertions(+)
create mode 100644 target-tilegx/helper.c
Generate related tcg instructions, and qemu tilegx can finish running
"Hello world". The elf64 binary can be static or shared.
Signed-off-by: Chen Gang
---
target-tilegx/translate.c | 2787 +
1 file changed, 2787 insertions(+)
create m
Add related configuration, make files for tilegx. Now, qemu tilegx can
pass building, and finish running "Hello world" static/shared elf64
binary.
Signed-off-by: Chen Gang
---
configure | 2 ++
default-configs/tilegx-linux-user.mak | 1 +
target-tilegx/Mak
Here I just mean when Qemu realizes IGD is passed through but without
that appropriate option set, Qemu can post something to explicitly
notify user that this option is needed in his case. But it may be a lazy
idea.
In any case I think the additions of such warnings in qemu are a
separate to the
>From pcie spec, the bits attributes are RW1CS in Correctable
Error Status Register, so this patch fix a wrong definition
for PCI_ERR_COR_STATUS register with w1cmask type.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/
e to parse extended capability.
2. add global property for piix4 to disable vfio aer cap.
v1-v2:
1. turn on SERR# for bridge control register in firmware.
2. initilize aer capability for vfio device.
3. fix some trivial bug.
Chen Fan (9):
pcie_aer: fix typos in pcie_aer_inject_error com
add 'x-aer' option to disable aer capability if user
want.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index db4ba23..5471437 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -156,6 +156,8 @@ type
Refer to "PCI Express Base Spec3.0", this comments can't
fit the description in spec, so we should fix them.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 1
extend pcie_aer_init arguments to adjust vfio device.
Signed-off-by: Chen Fan
---
hw/pci-bridge/ioh3420.c| 3 ++-
hw/pci-bridge/xio3130_downstream.c | 3 ++-
hw/pci-bridge/xio3130_upstream.c | 3 ++-
hw/pci/pcie_aer.c | 7 ---
include/hw/pci/pcie_aer.h
For vfio pcie device, we could expose the extanded capability on
PCIE bus. in order to avoid config space broken, we introduce
a copy config for parsing extended caps. and rebuild the pcie
extended config space.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 83
For vfio device, we need to propagate the aer error to
Guest OS. we use the pcie_aer_msg() to send aer error
to guest.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
include/hw/pci/pcie_aer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pcie_aer.c b
Calling pcie_aer_init to initilize aer related registers for
vfio device, then reload physical related registers to expose
device capability.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/hw/vfio
-off-by: Chen Fan
---
hw/vfio/pci.c | 36 ++--
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 5471437..5669c55 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3241,18 +3241,42 @@ static void vfio_put_device
Signed-off-by: Chen Fan
---
include/hw/pci/pci.h | 2 +-
include/hw/pci/pcie_aer.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index bdee464..b82de15 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -137,7
On 02/27/2015 06:18 AM, Alex Williamson wrote:
On Thu, 2015-02-26 at 14:46 +0800, Chen Fan wrote:
On 02/11/2015 12:39 AM, Alex Williamson wrote:
On Tue, 2015-02-10 at 15:03 +0800, Chen Fan wrote:
add a new "aercap" feature in vfio device, for controlling
whether expose aer
Campbell,
Are you free to look at my reply?
Thanks
Tiejun
On 2015/3/2 9:20, Chen, Tiejun wrote:
Here I just mean when Qemu realizes IGD is passed through but without
that appropriate option set, Qemu can post something to explicitly
notify user that this option is needed in his case. But it
They are based on Linux kernel tilegx architecture for 64 bit binary,
also based on tilegx ABI reference document.
Signed-off-by: Chen Gang
---
linux-user/tilegx/syscall.h| 80
linux-user/tilegx/syscall_nr.h | 278
linux-user/tilegx
It is the configure and build system support for TILE-Gx (tilegx will be
used in configure and real sub-directory name), and at present, it is
linux-user only.
Signed-off-by: Chen Gang
---
configure | 3 +
default-configs/tilegx-linux-user.mak | 1 +
target
ned-off-by: Chen Gang
---
include/elf.h| 2 ++
linux-user/elfload.c | 23
linux-user/main.c| 74
3 files changed, 99 insertions(+)
diff --git a/include/elf.h b/include/elf.h
index a516584..139b22d 100644
--- a/inc
1716: pop%rbp
0x7fcc44c71717: retq
Load elf64 tilegx successfully
reach code start position: [00010f60] _start
[root@localhost qemu]# echo $?
0
[root@localhost qemu]#
Chen Gang (6):
target-tilegx: Firstly add TILE-Gx with minimized features
linux-user: tilegx: Firstl
For tilegx, several syscall macros are not supported, so switch them to
avoid building break.
Signed-off-by: Chen Gang
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux-user/syscall.c b/linux
They are for target features within qemu which independent from outside.
Signed-off-by: Chen Gang
---
linux-user/tilegx/target_cpu.h | 35 +++
linux-user/tilegx/target_signal.h | 28 ++
linux-user/tilegx/target_structs.h | 48
Add tilegx architecture in "syscall_defs.h", all related features (ioctrl,
and stat) are based on Linux kernel tilegx 64-bit implementation.
Signed-off-by: Chen Gang
---
linux-user/syscall_defs.h | 38 ++
1 file changed, 34 insertions(+), 4 deletion
On 03/06/2015 02:17 AM, Eduardo Habkost wrote:
On Fri, Feb 13, 2015 at 06:25:24PM +0800, Zhu Guihua wrote:
From: Chen Fan
ICC bus was invented only to provide hotplug capability to
CPU and APIC because at the time being hotplug was available only for
BUS attached devices.
Now this patch is
e
and build_info.u.gfx_passthru_kind to IGD
----
Tiejun Chen (2):
libxl: introduce libxl__is_igd_vga_passthru
libxl: introduce gfx_passthru_kind
tools/libxl/libxl_dm.c | 13 +
.
Signed-off-by: Tiejun Chen
---
tools/libxl/libxl_internal.h | 2 +
tools/libxl/libxl_pci.c | 124 +++
2 files changed, 126 insertions(+)
diff --git a/tools/libxl/libxl_internal.h b/tools/libxl/libxl_internal.h
index 934465a..8b952b8 100644
--- a
at table to need
to pass that option to qemu. But if gfx_passthru_kind = "igd" we always
force to pass that.
Signed-off-by: Tiejun Chen
---
tools/libxl/libxl_dm.c | 13 +
tools/libxl/libxl_types.idl | 6 ++
tools/libxl/xl_cmdimpl.c| 19 +--
3
On 2015/3/6 17:08, Tiejun Chen wrote:
Although we already have 'gfx_passthru' in b_info, this doesn' suffice
after we want to handle IGD specifically. Now we define a new field of
type, gfx_passthru_kind, to indicate we're trying to pass IGD. Actually
this means we can ben
avoid cpu_index equals comat_index which would
cause migration fails, this reason is that find_se() always compares
instance_id
with se->instance_id or se->alias_id when do migration.
Thanks,
Chen
+int compat_index = cc->get_compat_arch_id(cpu);
+
+if (qdev_get_vmsd(DEVIC
is
not stable (gmail in China is not stable).
And if the patches can pass checking, please add me as the maintainer,
and let Andreas, Chris, Richard, and Peter as Reviewed-by.
Thanks.
On 3/6/15 04:22, Chen Gang wrote:
> After load elf64 tilegx binary for linux-user, the working flow reaches
&g
is
not stable (gmail in China is not stable).
And if the patches can pass checking, please add me as the maintainer,
and let Andreas, Chris, Richard, and Peter as Reviewed-by.
Thanks.
On 3/6/15 04:22, Chen Gang wrote:
> After load elf64 tilegx binary for linux-user, the working flow reaches
&g
-n"
"grep _OPCODE_Y0 opcode_tilegx.h | awk '{print $3, $1}' | sort -n"
"grep _OPCODE_Y1 opcode_tilegx.h | awk '{print $3, $1}' | sort -n"
"grep _OPCODE_Y2 opcode_tilegx.h | awk '{print $3, $1}' | sort -n"
Signed-off-by: Chen
ping...
On 03/02/2015 03:16 PM, Chen Fan wrote:
For now, for vfio pci passthough devices when qemu receives
an error from host aer report, there just terminate the guest,
but usually user want to know what error occurred but stop the
guest, so this patches add aer capability support for vfio
On 2015/3/6 20:28, Wei Liu wrote:
On Fri, Mar 06, 2015 at 05:08:21PM +0800, Tiejun Chen wrote:
When we're working to support IGD GFX passthrough with qemu
upstream, instead of "-gfx_passthru" we'd like to make that
a machine option, "-machine xxx,igd-passthru=on".
On 2015/3/6 20:40, Wei Liu wrote:
On Fri, Mar 06, 2015 at 05:08:22PM +0800, Tiejun Chen wrote:
While working with qemu, IGD is a specific device in the case of pass through
so we need to identify that to handle more later. Here we define a table to
record all IGD types currently we can support
On 2015/3/6 20:55, Wei Liu wrote:
On Fri, Mar 06, 2015 at 05:08:23PM +0800, Tiejun Chen wrote:
Although we already have 'gfx_passthru' in b_info, this doesn' suffice
after we want to handle IGD specifically. Now we define a new field of
type, gfx_passthru_kind, to indicate we&#x
On 2015/3/6 20:59, Wei Liu wrote:
On Fri, Mar 06, 2015 at 05:18:36PM +0800, Chen, Tiejun wrote:
On 2015/3/6 17:08, Tiejun Chen wrote:
Although we already have 'gfx_passthru' in b_info, this doesn' suffice
after we want to handle IGD specifically. Now we define a ne
On 2015/3/6 23:53, Konrad Rzeszutek Wilk wrote:
On Fri, Mar 06, 2015 at 05:08:21PM +0800, Tiejun Chen wrote:
When we're working to support IGD GFX passthrough with qemu
upstream, instead of "-gfx_passthru" we'd like to make that
Could you also include in the cover lette
On 2015/3/9 18:17, Wei Liu wrote:
On Mon, Mar 09, 2015 at 02:45:36PM +0800, Chen, Tiejun wrote:
[...]
+exit (1);
+}
+} else if (!xlu_cfg_get_string(config, "gfx_passthru", &buf, 0)) {
+if (libxl_gfx_passthru_kind_from_string
On 03/10/2015 04:34 AM, Alex Williamson wrote:
On Mon, 2015-03-02 at 15:16 +0800, Chen Fan wrote:
For now, for vfio pci passthough devices when qemu receives
an error from host aer report, there just terminate the guest,
but usually user want to know what error occurred but stop the
guest, so
Chen Fan (3):
pcie_aer: fix typos in pcie_aer_inject_error comment
aer: fix a wrong init PCI_ERR_COR_STATUS w1cmask type register
pci: fix several trivial typos in comment
hw/pci/pcie_aer.c | 8
include/hw/pci/pci.h | 2 +-
include/hw/pci/pcie_aer.h | 2 +-
3 files
>From pcie spec, the bits attributes are RW1CS in Correctable
Error Status Register, so this patch fix a wrong definition
for PCI_ERR_COR_STATUS register with w1cmask type.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/
Refer to "PCI Express Base Spec3.0", this comments can't
fit the description in spec, so we should fix them.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 1
Signed-off-by: Chen Fan
---
include/hw/pci/pci.h | 2 +-
include/hw/pci/pcie_aer.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index bdee464..b82de15 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -137,7
Cc: qemu-trivial
On 03/10/2015 09:49 AM, Chen Fan wrote:
Chen Fan (3):
pcie_aer: fix typos in pcie_aer_inject_error comment
aer: fix a wrong init PCI_ERR_COR_STATUS w1cmask type register
pci: fix several trivial typos in comment
hw/pci/pcie_aer.c | 8
include/hw
GD
And note actually that option "-gfx_passthru" is just introduced to
work for qemu-xen-traditional so we should get this away from
libxl__build_device_model_args_new() in the case of qemu upstream.
Tiejun Chen (2):
.
Signed-off-by: Tiejun Chen
---
tools/libxl/libxl_internal.h | 2 +
tools/libxl/libxl_pci.c | 124 +++
2 files changed, 126 insertions(+)
diff --git a/tools/libxl/libxl_internal.h b/tools/libxl/libxl_internal.h
index 934465a..c97c62d 100644
--- a
at table to need
to pass that option to qemu. But if gfx_passthru_kind = "igd" we always
force to pass that.
And "-gfx_passthru" is just introduced to work for qemu-xen-traditional
so we should get this away from libxl__build_device_model_args_new() in
the case of qemu up
On 03/10/2015 04:29 AM, Alex Williamson wrote:
On Mon, 2015-03-02 at 15:16 +0800, Chen Fan wrote:
extend pcie_aer_init arguments to adjust vfio device.
Some discussion of why vfio wants this would be useful.
qemu treats vfio device as an emulated device.
and these attributes of aer can be
On 03/10/2015 04:28 AM, Alex Williamson wrote:
On Mon, 2015-03-02 at 15:16 +0800, Chen Fan wrote:
For vfio pcie device, we could expose the extanded capability on
s/extanded/extended/
PCIE bus. in order to avoid config space broken, we introduce
a copy config for parsing extended caps. and
On 03/10/2015 04:29 AM, Alex Williamson wrote:
On Mon, 2015-03-02 at 15:16 +0800, Chen Fan wrote:
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal the eventfd registered by this
vfio device, the results in the qemu eventfd handler getting
invoked
On 03/10/2015 04:29 AM, Alex Williamson wrote:
On Mon, 2015-03-02 at 15:16 +0800, Chen Fan wrote:
add 'x-aer' option to disable aer capability if user
want.
I'm generally one to favor using the x- flag, but we need to figure out
if we need to make this be a supported option o
+
+if (b_info->u.hvm.gfx_passthru_kind ==
+LIBXL_GFX_PASSTHRU_KIND_DEFAULT) {
+if (libxl__is_igd_vga_passthru(gc, guest_config))
+machinearg = GCSPRINTF("%s,igd-passthru=on", machinearg);
+} else if (b_info->u.hvm.gfx_passthru_kind ==
+
-off-by: Chen Fan
---
hw/vfio/pci.c | 34 --
1 file changed, 28 insertions(+), 6 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 0a515b6..8966c49 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3240,18 +3240,40 @@ static void vfio_put_device
For vfio pcie device, we could expose the extended capability on
PCIE bus. in order to avoid config space broken, we introduce
a copy config for parsing extended caps. and rebuild the pcie
extended config space.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 73
For vfio device, we need to propagate the aer error to
Guest OS. we use the pcie_aer_msg() to send aer error
to guest.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
include/hw/pci/pcie_aer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pcie_aer.c b
pcie_aer_init was used to emulate an aer capability for pcie device,
but for vfio device, the aer config space size is mutable and is not
always equal to PCI_ERR_SIZEOF(0x48). it depends on where the TLP Prefix
register required, so here we add a size argument.
Signed-off-by: Chen Fan
---
hw
e to parse extended capability.
2. add global property for piix4 to disable vfio aer cap.
v1-v2:
1. turn on SERR# for bridge control register in firmware.
2. initilize aer capability for vfio device.
3. fix some trivial bug.
Chen Fan (7):
vfio: add pcie extanded capability support
a
add 'x-aer' property to let user able to decide whether expose
the aer capability.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 8966c49..0517091 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
for piix4 chipset, we don't need to expose aer, so introduce
PC_I440FX_COMPAT for all piix4 machines to disable aercap,
and add HW_COMPAT_2_2 to disable aercap for all lower
than 2.3.
Signed-off-by: Chen Fan
---
hw/i386/pc_piix.c | 9 +
hw/i386/pc_q35.c| 4
inclu
Calling pcie_aer_init to initilize aer related registers for
vfio device, then reload physical related registers to expose
device capability.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 45 -
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git
On 03/10/2015 04:29 AM, Alex Williamson wrote:
On Mon, 2015-03-02 at 15:16 +0800, Chen Fan wrote:
extend pcie_aer_init arguments to adjust vfio device.
Some discussion of why vfio wants this would be useful.
I remain this patch at the latest v5. and add the 'size' argument,
becaus
On 03/10/2015 10:57 PM, Michael S. Tsirkin wrote:
On Tue, Mar 10, 2015 at 09:34:58AM +0300, Michael Tokarev wrote:
10.03.2015 04:49, Chen Fan пишет:
Refer to "PCI Express Base Spec3.0", this comments can't
fit the description in spec, so we should fix them.
Signed-off-by: Che
I shall send a new patch, next. This patch will be obsoleted.
Thanks.
On 3/8/15 08:54, Chen Gang wrote:
> According to "arch/tile/include/uapi/arch/opcode_tilegx.h" in Linux
> kernel source code, qemu can parse all opcode:
>
> "grep _OPCODE_X0 opcode_tilegx.h | awk
Tilegx Qemu can decode bundle, disassemble code, and generate tcg code
for 1st TB block (__start). Then directly jump to __libc_start_main (2nd
TB block).
Signed-off-by: Chen Gang
---
target-tilegx/cpu-qom.h |2 +
target-tilegx/cpu.c |4 -
target-tilegx/cpu.h | 22
I don't think you can abort here, since a user can set
b_info->u.hvm.gfx_passthru_kind to default. You would need to return an
error.
Then, looks I should do this,
LOG(ERROR, "No supported IGD to passthru,"
" or please force set gfx_passthru=\"igd\".\
there are somethings about misuse register bit, so here fix them.
Chen Fan (2):
pcie: correct mistaken register bit for End-End TLP Prefix Blocking
aer: fix wrong check on expose aer tlp prefix log
hw/pci/pcie.c | 2 +-
hw/pci/pcie_aer.c | 2 +-
include/hw/pci
from pcie spec 7.8.17, the End-End TLP Prefix Blocking bit local
is 15(e.g. 0x8000) in device control 2 register.
Signed-off-by: Chen Fan
---
hw/pci/pcie.c | 2 +-
include/hw/pci/pcie_regs.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci/pcie.c b/hw
when specify TLP Prefix log as using pcie_aer_inject_error,
the TLP prefix log is always discarded. because the check
is incorrect, the End-End TLP Prefix Supported bit
(PCI_EXP_DEVCAP2_EETLPP) should be in Device Capabilities 2 Register.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
1
Firstly, thank you very much for your reviewing, and I shall send patch
v3 within this week end (2015-03-15).
On 3/14/15 02:20, Richard Henderson wrote:
> On 03/12/2015 09:06 AM, Chen Gang wrote:
>> +#define TILEGX_GEN_SAVE_PREP(rdst) \
>> +dc->tmp_regcur->idx
On 3/14/15 08:22, Richard Henderson wrote:
> On 03/13/2015 04:07 PM, Chen Gang wrote:
>>> UNARY_RRR_0_OPCODE_X0.
>>>
>>>> +if ((get_UnaryOpcodeExtension_X0(bundle) == 0x03) && !rsrc &&
>>>> !rdst) {
>>>
>>>
QEMU TILE-Gx can decode bundle, disassemble code, and generate tcg code
for 1st TB block (__start). Then directly jump to __libc_start_main (2nd
TB block).
In __libc_start_main, it can continue executing to the first function
call _dl_aux_init().
Signed-off-by: Chen Gang
---
target-tilegx/cpu
At present, I finished the first system call successfully (it is uname
called by glibc).
If no additional reply of this thread within 3 days, I shall send a new
patch which will include system call implementation.
Thanks.
On 3/14/15 14:03, Chen Gang wrote:
> QEMU TILE-Gx can decode bun
On 3/16/15 00:50, Andreas Färber wrote:
> Am 15.03.2015 um 15:19 schrieb Chen Gang:
>> If no additional reply of this thread within 3 days, I shall send a new
>> patch which will include system call implementation.
>
> Please use a proper subject then, saying what it do
On 3/16/15 07:45, Peter Maydell wrote:
> On 14 March 2015 at 06:03, Chen Gang wrote:
>> QEMU TILE-Gx can decode bundle, disassemble code, and generate tcg code
>> for 1st TB block (__start). Then directly jump to __libc_start_main (2nd
>> TB block).
>>
>> In _
On 3/16/15 07:44, Peter Maydell wrote:
> On 15 March 2015 at 23:08, Chen Gang wrote:
>> On 3/16/15 00:50, Andreas Färber wrote:
>>> Am 15.03.2015 um 15:19 schrieb Chen Gang:
>>>> If no additional reply of this thread within 3 days, I shall send a new
>>>
On 2015/3/13 18:11, Ian Campbell wrote:
On Fri, 2015-03-13 at 09:39 +0800, Chen, Tiejun wrote:
I don't think you can abort here, since a user can set
b_info->u.hvm.gfx_passthru_kind to default. You would need to
return an error.
Then, looks I should do this,
LOG(ERROR, "No sup
On 03/14/2015 06:25 AM, Alex Williamson wrote:
On Thu, 2015-03-12 at 18:23 +0800, Chen Fan wrote:
pcie_aer_init was used to emulate an aer capability for pcie device,
but for vfio device, the aer config space size is mutable and is not
always equal to PCI_ERR_SIZEOF(0x48). it depends on where
On 03/14/2015 06:38 AM, Alex Williamson wrote:
On Thu, 2015-03-12 at 18:23 +0800, Chen Fan wrote:
for piix4 chipset, we don't need to expose aer, so introduce
PC_I440FX_COMPAT for all piix4 machines to disable aercap,
and add HW_COMPAT_2_2 to disable aercap for all lower
than 2.3.
440
On 03/14/2015 06:38 AM, Alex Williamson wrote:
On Thu, 2015-03-12 at 18:23 +0800, Chen Fan wrote:
for piix4 chipset, we don't need to expose aer, so introduce
PC_I440FX_COMPAT for all piix4 machines to disable aercap,
and add HW_COMPAT_2_2 to disable aercap for all lower
than 2.3.
440
Cc: Michael S. Tsirkin
On 03/12/2015 06:23 PM, Chen Fan wrote:
For now, for vfio pci passthough devices when qemu receives
an error from host aer report, there just terminate the guest,
but usually user want to know what error occurred but stop the
guest, so this patches add aer capability
On 03/14/2015 06:34 AM, Alex Williamson wrote:
On Thu, 2015-03-12 at 18:23 +0800, Chen Fan wrote:
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal the eventfd registered by this
vfio device, the results in the qemu eventfd handler getting
invoked
On 03/16/2015 11:52 AM, Alex Williamson wrote:
On Mon, 2015-03-16 at 11:05 +0800, Chen Fan wrote:
On 03/14/2015 06:34 AM, Alex Williamson wrote:
On Thu, 2015-03-12 at 18:23 +0800, Chen Fan wrote:
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal
If I remember the context correctly this is in the autodetect case,
so I think shouldn't mention IGD. Something like "Unable to detect
graphics passthru kind, please set gfx_passthru_kind. See xl.cfg(5)
for more
s/gfx_passthru_kind/gfx_passthru, right? Because actually we always get
'gfx_passthr
ICC bus was invented only to provide hotplug capability to
CPU and APIC because at the time being hotplug was available only for
BUS attached devices.
Now this patch is to drop ICC bus impl, and switch to bus-less
CPU+APIC hotplug, handling them in the same manner as pc-dimm.
Signed-off-by: Chen
ICC bus impl has been droped, so all icc related files are not useful
any more; delete them.
Signed-off-by: Chen Fan
---
default-configs/i386-softmmu.mak | 1 -
default-configs/x86_64-softmmu.mak | 1 -
hw/cpu/Makefile.objs | 2 -
hw/cpu/icc_bus.c | 118
in Haswell
desktop with Latest Xen + Qemu upstream.
----
Tiejun Chen (2):
xen, gfx passthrough: create intel isa bridge
xen, gfx passthrough: create host bridge to passthrough
Yang Zhang (3):
xen, gfx passthrough: basic graphics passthrough support
xen, gfx passthrough: supp
: Yang Zhang
Signed-off-by: Tiejun Chen
Cc: Allen Kay
---
v3:
* Fix some typos.
* Improve some return paths.
v2:
* Nothing is changed.
hw/xen/xen_pt_graphics.c | 63
1 file changed, 63 insertions(+)
diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen
Implement that pci host bridge to specific to passthrough. Actually
thsi just inherit the standard one.
Signed-off-by: Tiejun Chen
---
v3:
* Just fix this patch head description typo.
v2:
* New patch.
hw/pci-host/piix.c | 56 --
1 file
Chen
Cc: Weidong Han
---
v3:
* Fix some typos.
* Add more comments to make that readable.
* Improve some return paths.
v2:
* retrieve VGA bios from sysfs properly.
* redefine some function name.
hw/xen/Makefile.objs | 2 +-
hw/xen/xen-host-pci-device.c | 5 +
hw/xen/xen-host-pci
by: Tiejun Chen
Cc: Jean Guyader
---
v3:
* Fix some typos.
* Add more comments to make that readable.
* To unmap igd_opregion when call xen_pt_unregister_vga_regions().
* Improve some return paths.
* We need to map 3 pages for opregion as hvmloader set.
* Force to convert igd_guest/host_opoe
Yang Zhang
Signed-off-by: Tiejun Chen
Cc:Weidong Han
---
v3:
* Improve comments to make that readable.
v2:
* To introduce is_igd_passthrough() to make sure we touch physical host bridge
only in IGD case.
hw/xen/xen_pt.h | 4 ++
hw/xen/xen_pt_graph
> Tiejun Chen
> Sent: Monday, May 26, 2014 5:37 PM
> To: nthony.per...@citrix.com; stefano.stabell...@eu.citrix.com;
> m...@redhat.com; kelly.zyta...@amd.com
> Cc: peter.mayd...@linaro.org; xen-de...@lists.xensource.com; Kay, Allen M;
> qemu-devel@nongnu.org; nth...@codemonkey.
in Haswell
desktop with Latest Xen + Qemu upstream.
----
Tiejun Chen (2):
xen, gfx passthrough: create intel isa bridge
xen, gfx passthrough: create host bridge to passthrough
Yang Zhang (3):
xen, gfx passthrough: basic graphics passthrough support
xen, gfx passthrough: supp
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