renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/timer/renesas_cmt.h
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
---
target/rx/translate.c | 2433
target/rx/insns.decode
On Thu, 11 Apr 2019 19:15:59 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Yoshinori,
>
> On 4/1/19 4:03 PM, Yoshinori Sato wrote:
> > Hello.
> > This patch series is added Renesas RX target emulation.
> >
> > Update review comments.
> >
> > My git
On Thu, 11 Apr 2019 19:09:38 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Yoshinori,
>
> Note about the patch subject:
> - typo in regiserfields (missing 't') -> registerfields
> - I'd simply use "hw/registerfields: Add 8bit and 16bit register macros&q
Signed-off-by: Yoshinori Sato
---
target/rx/gdbstub.c | 112
target/rx/monitor.c | 38
target/rx/Makefile.objs | 11 +
3 files changed, 161 insertions(+)
create mode 100644 target/rx/gdbstub.c
create mode 100644
-kernel zImage -dtb rx-qemu.dtb -append "earlycon"
Changes v6.
Add FIELD_DP8 and FIELD_DP16 to hw/registerfields.h.
Fixed registerfield support in timer and serial emulation.
Yoshinori Sato (12):
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
tar
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/intc/rx_icu.h | 49 +++
hw/intc/rx_icu.c | 373
Signed-off-by: Yoshinori Sato
---
configure | 8
default-configs/rx-softmmu.mak | 7 +++
include/sysemu/arch_init.h | 1 +
arch_init.c| 2 ++
hw/Kconfig | 1 +
5 files changed, 19 insertions(+)
create mode 100644
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
---
target/rx/translate.c | 2433
target/rx/insns.decode
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
---
include/hw/registerfields.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
index 2659a58737..f6bf911990
Signed-off-by: Yoshinori Sato
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 56139ac8ab..99d3428f04 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -272,6 +272,13 @@ F: include/hw/riscv/
F: linux-user/host/riscv32/
F
Signed-off-by: Yoshinori Sato
---
target/rx/cpu-qom.h | 52
target/rx/cpu.h | 197
target/rx/cpu.c | 232
3 files changed, 481 insertions(+)
create mode 100644 target/rx/cpu
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/timer/renesas_cmt.h
Signed-off-by: Yoshinori Sato
---
target/rx/helper.h| 31
target/rx/helper.c| 148
target/rx/op_helper.c | 481 ++
3 files changed, 660 insertions(+)
create mode 100644 target/rx/helper.h
create mode 100644 target
Signed-off-by: Yoshinori Sato
---
include/disas/bfd.h |5 +
target/rx/disas.c | 1481 +++
2 files changed, 1486 insertions(+)
create mode 100644 target/rx/disas.c
diff --git a/include/disas/bfd.h b/include/disas/bfd.h
index 41b61c85f9
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/char/renesas_sci.h | 45 ++
hw/char/renesas_sci.c | 341
rx62n - RX62N cpu.
rxqemu - QEMU virtual target.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx.h| 7 ++
include/hw/rx/rx62n.h | 54
hw/rx/rx62n.c | 226 ++
hw/rx/rxqemu.c| 100 ++
hw/rx
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
---
include/hw/registerfields.h | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
On Fri, 24 May 2019 00:08:00 +0900,
Richard Henderson wrote:
>
> Note that the ld == 3 case handled by prt_ldmi is decoded as
> XCHG_rr and cannot appear here.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sato
> ---
> target/rx/disas.c | 8 +---
erson
Reviewed-by: Yoshinori Sato
> ---
> target/rx/disas.c | 154 +-
> 1 file changed, 55 insertions(+), 99 deletions(-)
>
> diff --git a/target/rx/disas.c b/target/rx/disas.c
> index 8cada4825d..64342537ee 100644
> --- a/targ
On Fri, 24 May 2019 00:08:03 +0900,
Richard Henderson wrote:
>
> There are so many different forms of each RX instruction
> that it will be very useful to be able to look at the bytes
> to see on which path a bug may lie.
>
> Signed-off-by: Richard Henderson
Reviewed-
On Fri, 24 May 2019 00:08:01 +0900,
Richard Henderson wrote:
>
> Many of the multi-part prints have been eliminated by previous
> patches. Eliminate the rest of them.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sato
> ---
> t
On Fri, 24 May 2019 00:07:59 +0900,
Richard Henderson wrote:
>
> This has consistency with prt_ri(). It loads all data before
> beginning output. It uses exactly one call to prt() to emit
> the full instruction.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sat
On Fri, 24 May 2019 00:08:02 +0900,
Richard Henderson wrote:
>
> Collected, to be used in the next patch.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sato
> ---
> target/rx/disas.c | 62 ---
> 1 file changed,
On Fri, 24 May 2019 00:07:57 +0900,
Richard Henderson wrote:
>
> Here's a sample of the new output, taken from u-boot.bin:
>
> IN:
> 0xfff8000a: fb 12 00 01 00 00 mov.l #0x0100, r1
> 0xfff80010: fb 32 f0 13 00 00 mov.l #0x13f0, r3
> 0xfff80016: 43 13
On Tue, 28 May 2019 02:47:40 +0900,
Aleksandar Markovic wrote:
>
> On May 27, 2019 5:44 PM, "Yoshinori Sato"
> wrote:
> >
> > On Fri, 24 May 2019 00:07:57 +0900,
> > Richard Henderson wrote:
> > >
> > > Here's a sample of the new out
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff -
From: Philippe Mathieu-Daudé
While the VIRT machine can use different microcontrollers,
the RX62N microcontroller is tied to the RX62N CPU core.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 8
1 file changed, 8 insertions(+)
diff --git a
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tes
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.
t_ldmi for XCHG_mr disassembly
target/rx: Emit all disassembly in one prt()
target/rx: Collect all bytes during disassembly
target/rx: Dump bytes for each insn during disassembly
hw/rx: Honor -accel qtest
Yoshinori Sato (12):
MAINTAINERS: Add RX
qemu/bitops.h: Add extract8 and extract16
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Ph
v21 changes
Use cpu_env
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
Signed-off-by: Yoshinori Sato
---
target/rx/monitor.c | 38 --
target/rx/Makefile.objs | 1 -
2 files changed, 39 deletions(-)
delete mode 100644 target/rx/monitor.c
diff --git a/target/rx/monitor.c b/target/rx/monitor.c
deleted file mode 100644
index
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp>
Tested-by: Philippe Ma
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
From: Richard Henderson
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-8
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
v21 changes
Add cpu-param.h
Remove CPU_COMMON
rx_load_image move to rx-virt.
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
pick ed65c02993 target/rx: Add RX to SysEmuTarget
pick 01372568ae tests: Add rx to machin
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
v21 changes.
rx_load_image move to rx-virt.c
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Mess
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Review
On Fri, 01 Feb 2019 06:08:49 +0900,
Richard Henderson wrote:
>
> I'm not sure how much simplication could be had for "simple"
> variable-length ISAs like ARM thumb2 or RISC-V.
>
> But the recently posted RX port is more complicated than those.
> For me, what makes RX more difficult is that there
On Fri, 08 Mar 2019 10:24:23 +0900,
Richard Henderson wrote:
>
> On 3/1/19 10:21 PM, Yoshinori Sato wrote:
> > My git repository is bellow.
> > git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git
>
> Somehow patch 1 did not arrive, so I am reviewing based on
> rebasing
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
---
include/hw/registerfields.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
index 2659a58737..f6bf911990
rx62n - RX62N cpu.
rxqemu - QEMU virtual target.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx.h| 7 ++
include/hw/rx/rx62n.h | 54
hw/rx/rx62n.c | 226 ++
hw/rx/rxqemu.c| 100 ++
hw/rx
"earlycon"
Changes v3
Using Register API.
Using bitops function.
Fix interrupt handling.
Improve insns.decode and translate.c
cleanup implementation.
cleanup psw status operation.
Yoshinori Sato (12):
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/char/renesas_sci.h | 45 ++
hw/char/renesas_sci.c | 335
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/intc/rx_icu.h | 49 +++
hw/intc/rx_icu.c | 373
Signed-off-by: Yoshinori Sato
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 85d7d764e5..046dbd8eb6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -272,6 +272,13 @@ F: include/hw/riscv/
F: linux-user/host/riscv32/
F
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
---
target/rx/translate.c | 2305
target/rx/insns.decode
Signed-off-by: Yoshinori Sato
---
configure | 8
default-configs/rx-softmmu.mak | 7 +++
include/sysemu/arch_init.h | 1 +
arch_init.c| 2 ++
hw/Kconfig | 1 +
5 files changed, 19 insertions(+)
create mode 100644
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/timer/renesas_cmt.h
Signed-off-by: Yoshinori Sato
---
target/rx/gdbstub.c | 112
target/rx/monitor.c | 38
target/rx/Makefile.objs | 11 +
3 files changed, 161 insertions(+)
create mode 100644 target/rx/gdbstub.c
create mode 100644
Signed-off-by: Yoshinori Sato
---
include/disas/bfd.h |5 +
target/rx/disas.c | 1512 +++
2 files changed, 1517 insertions(+)
create mode 100644 target/rx/disas.c
diff --git a/include/disas/bfd.h b/include/disas/bfd.h
index 41b61c85f9
Signed-off-by: Yoshinori Sato
---
target/rx/cpu-qom.h | 52
target/rx/cpu.h | 201 ++
target/rx/cpu.c | 225
3 files changed, 478 insertions(+)
create mode 100644 target/rx/cpu
Signed-off-by: Yoshinori Sato
---
target/rx/helper.h| 35
target/rx/helper.c| 147 +
target/rx/op_helper.c | 557 ++
3 files changed, 739 insertions(+)
create mode 100644 target/rx/helper.h
create mode 100644 target/rx
Hi.
I found some problem in tested RX instructions.
It is usable in RX instructions, but I think that there
is a better fix because I am not familiar with Python.
I fixed three point.
- Added ctx to !function args.
- Fixed group operaiton. varinsns required width field.
- Fixed symbol in decode_lo
On Thu, 21 Mar 2019 10:35:07 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:05 AM, Yoshinori Sato wrote:
> > OK. fixed another way.
> > But RX big-endian mode only data access.
> > So operand value always little-endian order.
>
> Oh that is convenient.
> Theref
On Thu, 21 Mar 2019 10:43:37 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:27 AM, Yoshinori Sato wrote:
> > Hi.
> > I found some problem in tested RX instructions.
> > It is usable in RX instructions, but I think that there
> > is a better fix because I am not
rx62n - RX62N cpu.
rxqemu - QEMU virtual target.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx.h| 7 ++
include/hw/rx/rx62n.h | 54
hw/rx/rx62n.c | 226 ++
hw/rx/rxqemu.c| 100 ++
hw/rx
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/intc/rx_icu.h | 49 +++
hw/intc/rx_icu.c | 373
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
---
include/hw/registerfields.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
index 2659a58737..f6bf911990
Signed-off-by: Yoshinori Sato
---
target/rx/helper.h| 31
target/rx/helper.c| 148
target/rx/op_helper.c | 481 ++
3 files changed, 660 insertions(+)
create mode 100644 target/rx/helper.h
create mode 100644 target
Signed-off-by: Yoshinori Sato
---
target/rx/gdbstub.c | 112
target/rx/monitor.c | 38
target/rx/Makefile.objs | 11 +
3 files changed, 161 insertions(+)
create mode 100644 target/rx/gdbstub.c
create mode 100644
ix invalid operand check.
Yoshinori Sato (12):
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
target/rx: Miscellaneous files
hw/intc: RX62N interrupt controller (ICUa)
hw/timer: RX62N internal timer modules
hw/char: RX6
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/char/renesas_sci.h | 45 ++
hw/char/renesas_sci.c | 335
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/timer/renesas_cmt.h
Signed-off-by: Yoshinori Sato
---
include/disas/bfd.h |5 +
target/rx/disas.c | 1486 +++
2 files changed, 1491 insertions(+)
create mode 100644 target/rx/disas.c
diff --git a/include/disas/bfd.h b/include/disas/bfd.h
index 41b61c85f9
Signed-off-by: Yoshinori Sato
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 85d7d764e5..046dbd8eb6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -272,6 +272,13 @@ F: include/hw/riscv/
F: linux-user/host/riscv32/
F
Signed-off-by: Yoshinori Sato
---
target/rx/cpu-qom.h | 52
target/rx/cpu.h | 195 +++
target/rx/cpu.c | 232
3 files changed, 479 insertions(+)
create mode 100644 target/rx/cpu
Signed-off-by: Yoshinori Sato
---
configure | 8
default-configs/rx-softmmu.mak | 7 +++
include/sysemu/arch_init.h | 1 +
arch_init.c| 2 ++
hw/Kconfig | 1 +
5 files changed, 19 insertions(+)
create mode 100644
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
---
target/rx/translate.c | 2421
target/rx/insns.decode
On Fri, 22 Mar 2019 04:39:29 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:16 AM, Yoshinori Sato wrote:
> > +static const char *cond[] = {
> > +"eq", "ne", "c", "nc", "gtu", "leu", "pz", "n
On Fri, 22 Mar 2019 04:28:03 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:16 AM, Yoshinori Sato wrote:
> > +#define FPSW_MASK 0xfc007cff
> > +#define FPSW_RM_MASK 0x0003
> > +#define FPSW_DN (1 << 8)
>
> It's slightly confusing to have this a
On Fri, 22 Mar 2019 02:17:35 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:16 AM, Yoshinori Sato wrote:
> > +void rx_cpu_unpack_psw(CPURXState *env, int all)
> > +{
> > +if (env->psw_pm == 0) {
> > +env->psw_ipl = extract32(env->
On Thu, 21 Mar 2019 14:40:11 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:15 AM, Yoshinori Sato wrote:
> > +/* [ri, rb] */
> > +static inline void rx_gen_regindex(DisasContext *ctx, TCGv mem,
>
> Please drop all of the inline markers.
> Let the compiler choose whi
On Tue, 26 Mar 2019 00:50:53 +0900,
Richard Henderson wrote:
>
> On 3/25/19 2:38 AM, Yoshinori Sato wrote:
> >>> +static bool trans_EMUL_mr(DisasContext *ctx, arg_EMUL_mr *a)
> >>> +{
> >>> +TCGv val, mem;
> >>> +mem = tcg_temp_new();
On Tue, 26 Mar 2019 00:50:53 +0900,
Richard Henderson wrote:
>
> On 3/25/19 2:38 AM, Yoshinori Sato wrote:
> >>> +static bool trans_EMUL_mr(DisasContext *ctx, arg_EMUL_mr *a)
> >>> +{
> >>> +TCGv val, mem;
> >>> +mem = tcg_temp_new();
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx.h| 7 ++
include/hw/rx/rx62n.h | 94
hw/rx/rx-virt.c | 105 ++
hw/rx/rx62n.c | 238
Signed-off-by: Yoshinori Sato
---
include/disas/dis-asm.h |5 +
target/rx/disas.c | 1480 +++
2 files changed, 1485 insertions(+)
create mode 100644 target/rx/disas.c
diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
index
On Thu, 16 May 2019 01:48:29 +0900,
Richard Henderson wrote:
>
> On 5/13/19 11:14 PM, Yoshinori Sato wrote:
> > This patch series is added Renesas RX target emulation.
> >
> > I fixed the ROM address because v11 was incorrect.
> >
> > My git repository
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
---
include/hw/registerfields.h | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/include/hw
Signed-off-by: Yoshinori Sato
Tested-by: Philippe Mathieu-Daudé
Using only CONFIG_RX=y:
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
configure | 8
default-configs/rx-softmmu.mak | 3 +++
include/sysemu/arch_init.h | 1
x-qemu.dtb -append "earlycon"
Changes for v12.
- None
Yoshinori Sato (12):
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
hw/intc: RX62N interrupt controller (ICUa)
hw/timer: RX62N internal timer modules
hw/char: RX62N
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a73a61a546..ef6a02702e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -272,6 +272,13 @@ F: include/hw/riscv/
F
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
---
include/qemu/bitops.h | 38 ++
1 file changed, 38 insertions(+)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index 3f0926cf40..764f9d1ea0 100644
--- a/include/qemu/bitops.h
+++ b
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
---
include/disas/dis-asm.h |5 +
target/rx/disas.c | 1480 +++
2 files changed, 1485 insertions(+)
create mode 100644 target/rx/disas.c
diff
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
---
target/rx/cpu.h | 227
target/rx/cpu.c | 222 ++
target/rx/gdbstub.c | 112 ++
target/rx
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
---
include/hw/intc/rx_icu.h | 57 +++
hw/intc/rx_icu.c | 376
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
Signed-off-by: Yoshinori Sato
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/rx/rx.h| 7 ++
include/hw/rx/rx62n.h | 94
hw/rx/rx-virt.c | 105 ++
hw
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
---
target/rx/helper.h| 31
target/rx/helper.c| 148
target/rx/op_helper.c | 481 ++
3 files changed, 660 insertions(+)
create mode 100644 target/rx
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
---
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