From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
v23 changes.
Add missing includes.
v21 changes.
rx_load_image move to rx-virt.c
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe M
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
[PMD: Use newer QOM style, split cpu-qom.h, restrict access
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Removed tlb_fil
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Review
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp>
Tested-by: Philippe Ma
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tes
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
Signed-off-by: Yoshinori Sato
---
qapi/machine.json | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/machine.json b/qapi/machine.json
index ca26779f1a..70398c521f 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -28,7 +28,7 @@
'data' : [ 'a
From: Philippe Mathieu-Daudé
While the VIRT machine can use different microcontrollers,
the RX62N microcontroller is tied to the RX62N CPU core.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 8
1 file changed, 8 insertions(+)
diff --git a
target/rx: Replace operand with prt_ldmi in disassembler
target/rx: Use prt_ldmi for XCHG_mr disassembly
target/rx: Emit all disassembly in one prt()
target/rx: Collect all bytes during disassembly
target/rx: Dump bytes for each insn during disassembly
hw/rx: Honor -accel qtest
Yoshinor
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Removed tlb_fil
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Ph
v21 changes
Add cpu-param.h
Remove CPU_COMMON
rx_load_image move to rx-virt.
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
pick ed65c02993 target/rx: Add RX to SysEmuTarget
pick 01372568ae tests: Add rx to machin
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-8
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Review
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
v23 changes.
Add missing includes.
v21 changes.
rx_load_image move to rx-virt.c
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe M
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c
On Sat, 17 Aug 2019 16:36:06 +0900,
Yoshinori Sato wrote:
>
> Hello.
> This patch series is added Renesas RX target emulation.
>
> Changes for v22.
> Added some include.
>
> Changes for v21.
> rebase latest master.
> Remove unneeded hmp_info_tlb.
>
>
On Wed, 21 Aug 2019 19:23:09 +0900,
Philippe Mathieu-Daudé wrote:
>
> On 8/17/19 9:36 AM, Yoshinori Sato wrote:
> > Signed-off-by: Yoshinori Sato
> > ---
> > target/rx/monitor.c | 38 --
> > target/rx/Makefile.objs |
On Mon, 14 Oct 2019 20:57:36 +0900,
Ping.
Yoshinori Sato wrote:
>
> Hello.
> This patch series is added Renesas RX target emulation.
>
> Changes for v25.
> Update commit message.
> Squashed qapi/machine.json changes.
>
> Changes for v24.
> Add note for qapi/mach
OK.
No problem.
I'm waiting for the merge.
Thanks.
---
Yoshinori Sato
f (tmp != env->regs[2]) {
> break;
> }
> -}
> +} while (env->regs[3] != 0);
> env->psw_z = env->regs[3];
> env->psw_c = (tmp <= env->regs[2]);
> }
> --
> 2.18.2
>
>
It look
On Mon, 20 Apr 2020 18:18:39 +0900,
Pan Nengyuan wrote:
>
>
>
> On 4/20/2020 4:50 PM, Yoshinori Sato wrote:
> > On Mon, 20 Apr 2020 14:49:59 +0900,
> > Pan Nengyuan wrote:
> >>
> >> We got the following compile-time warnings(gcc7.3):
> >>
re
> >> +
> >> +SH4 Hardware
> >> +M: Aurelien Jarno
> >> +M: Philippe Mathieu-Daudé
> >
> > That's fine for me, and just to be clear I don't mind being demoted to a
> > reviewer or even removed from there. I do not really
t;>
> >>> Having both, an "M:" entry and "S: Orphan" in a section sounds weird.
> >>> Magnus, are you still interested in these sections? If not, I think the
> >>> "M:" line should be removed...?
> >>
> >> Concur
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff -
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Ph
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tes
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
g
target/rx: Replace operand with prt_ldmi in disassembler
target/rx: Use prt_ldmi for XCHG_mr disassembly
target/rx: Emit all disassembly in one prt()
target/rx: Collect all bytes during disassembly
target/rx: Dump bytes for each insn during disassembly
hw/rx: Honor -accel qtest
Yoshinor
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp>
Tested-by: Philippe Ma
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
[PMD: Use newer QOM style, split cpu-qom.h, restrict access
From: Richard Henderson
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
From: Philippe Mathieu-Daudé
While the VIRT machine can use different microcontrollers,
the RX62N microcontroller is tied to the RX62N CPU core.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/rx
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-8
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-9-ys...@users.sourceforge.jp>
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Removed tlb_fil
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Review
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
pick ed65c02993 target/rx: Add RX to SysEmuTarget
pick 01372568ae tests: Add rx to machin
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c
Describe emulated target specification. And two examples.
Signed-off-by: Yoshinori Sato
---
qemu-doc.texi | 44
1 file changed, 44 insertions(+)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 33b9597b1d..d80a9c64f7 100644
--- a/qemu-doc.texi
+++ b
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff -
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tes
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Ph
isassembly
hw/rx: Honor -accel qtest
Yoshinori Sato (12):
MAINTAINERS: Add RX
qemu/bitops.h: Add extract8 and extract16
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
hw/intc: RX62N interrupt controller (ICUa)
hw/timer: RX62
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/rx/rx-virt.c b/hw/rx/rx-virt.c
index 6cf7936201..4ee6647728 100644
--- a/hw/rx/rx-virt.c
+++ b/hw/rx/rx-virt.c
@@ -90,8 +90,10 @@ static void rxvirt_init(MachineState
From: Richard Henderson
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp>
Tested-by: Philippe Ma
Describe emulated target specification. And two examples.
Signed-off-by: Yoshinori Sato
---
qemu-doc.texi | 44
1 file changed, 44 insertions(+)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 33b9597b1d..d80a9c64f7 100644
--- a/qemu-doc.texi
+++ b
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
From: Philippe Mathieu-Daudé
While the VIRT machine can use different microcontrollers,
the RX62N microcontroller is tied to the RX62N CPU core.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/rx
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
[PMD: Use newer QOM style, split cpu-qom.h, restrict access
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
pick ed65c02993 target/rx: Add RX to SysEmuTarget
pick 01372568ae tests: Add rx to machin
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Removed tlb_fil
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-9-ys...@users.sourceforge.jp>
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-8
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Review
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
On Mon, 24 Feb 2020 17:51:30 +0900,
Philippe Mathieu-Daudé wrote:
>
> On 2/23/20 2:27 PM, Yoshinori Sato wrote:
> > Signed-off-by: Yoshinori Sato
> > ---
> > hw/rx/rx-virt.c | 6 --
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
ly
hw/rx: Honor -accel qtest
Yoshinori Sato (12):
MAINTAINERS: Add RX
qemu/bitops.h: Add extract8 and extract16
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
hw/intc: RX62N interrupt controller (ICUa)
hw/timer: RX62N inte
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff -
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Ph
From: Richard Henderson
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tes
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
[PMD: Use newer QOM style, split cpu-qom.h, restrict access
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
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