On 2024/1/31 22:40, Joel Granados wrote:
On Mon, Jan 15, 2024 at 06:37:35PM +0800, Zhenzhong Duan wrote:
From: Yi Liu
Intel VT-d 3.0 introduces scalable mode, and it has a bunch of capabilities
related to scalable mode translation, thus there are multiple combinations.
While this vIOMMU
On 2024/3/14 05:06, Cédric Le Goater wrote:
Make sure variable contents is freed if scanf fails.
Cc: Eric Auger
Cc: Yi Liu
Cc: Zhenzhong Duan
Fixes: CID 1540007
Fixes: 5ee3dc7af785 ("vfio/iommufd: Implement the iommufd backend")
Signed-off-by: Cédric Le Goater
---
hw/vfio/iom
Kolothum Thodi ; Yi
Liu ; alex.william...@redhat.com; coh...@redhat.com;
qemu-devel@nongnu.org
Cc: da...@gibson.dropbear.id.au; th...@redhat.com; far...@linux.ibm.com;
mjros...@linux.ibm.com; akrow...@linux.ibm.com; pa...@linux.ibm.com;
jjhe...@linux.ibm.com; jasow...@redhat.com; k
the hwpt) it should be returned by
the vfio attach ioctl.
yes, hwpt_id is returned by the vfio attach ioctl and recorded in
qemu. You can query page table related capabilities with this id.
https://lore.kernel.org/kvm/20220414104710.28534-16-yi.l@intel.com/
--
Regards,
Yi Liu
Hi Zhangfei,
On 2022/5/11 22:17, zhangfei@foxmail.com wrote:
On 2022/5/10 下午10:08, Yi Liu wrote:
On 2022/5/10 20:45, Jason Gunthorpe wrote:
On Tue, May 10, 2022 at 08:35:00PM +0800, Zhangfei Gao wrote:
Thanks Yi and Eric,
Then will wait for the updated iommufd kernel for the PCI MMIO
Hi Zhangfei,
On 2022/5/12 17:01, zhangfei@foxmail.com wrote:
Hi, Yi
On 2022/5/11 下午10:17, zhangfei@foxmail.com wrote:
On 2022/5/10 下午10:08, Yi Liu wrote:
On 2022/5/10 20:45, Jason Gunthorpe wrote:
On Tue, May 10, 2022 at 08:35:00PM +0800, Zhangfei Gao wrote:
Thanks Yi and Eric
On 2022/5/18 15:22, zhangfei@foxmail.com wrote:
On 2022/5/17 下午4:55, Yi Liu wrote:
Hi Zhangfei,
On 2022/5/12 17:01, zhangfei@foxmail.com wrote:
Hi, Yi
On 2022/5/11 下午10:17, zhangfei@foxmail.com wrote:
On 2022/5/10 下午10:08, Yi Liu wrote:
On 2022/5/10 20:45, Jason Gunthorpe
From: Eric Auger
Using a VFIODevice handle local variable to improve the code readability.
no functional change intended
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/pci.c | 49 +
1 file changed, 25 insertions(+), 24 deletions
The three patches were part of iommufd RFC series, sent separately per
Kevin's suggestion.
https://lore.kernel.org/kvm/bn9pr11mb5276085cdf750807005a775b8c...@bn9pr11mb5276.namprd11.prod.outlook.com/
Regards,
Yi Liu
Eric Auger (2):
hw/vfio/pci: fix vfio_pci_hot_reset_result trace point
Rename VFIOGuestIOMMU iommu field into iommu_mr. Then it becomes clearer
it is an IOMMU memory region.
no functional change intended
Signed-off-by: Yi Liu
---
hw/vfio/common.c | 16
include/hw/vfio/vfio-common.h | 2 +-
2 files changed, 9 insertions(+), 9
From: Eric Auger
Properly output the errno string.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 9fd9faee1d..4a66376be6 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
On 2022/4/29 14:29, David Gibson wrote:
On Thu, Apr 14, 2022 at 03:46:59AM -0700, Yi Liu wrote:
Qomify the VFIOContainer object which acts as a base class for a
container. This base class is derived into the legacy VFIO container
and later on, into the new iommufd based container.
You
On 2022/10/31 17:15, Jason Wang wrote:
On Mon, Oct 31, 2022 at 2:43 PM Michael S. Tsirkin wrote:
On Fri, Oct 28, 2022 at 09:49:36PM +0800, Yi Liu wrote:
On 2022/10/28 14:14, Jason Wang wrote:
This patch introduce ECAP_PASID via "x-pasid-mode". Based on the
existing support for sca
addr, is_write);
+goto error;
+}
page_mask = vtd_slpt_level_page_mask(level);
access_flags = IOMMU_ACCESS_FLAG(reads, writes);
--
Regards,
Yi Liu
*/
return false;
}
return (VTD_PE_GET_TYPE(&pe) == VTD_SM_PASID_ENTRY_PT);
--
Regards,
Yi Liu
he code to avoid using ret variable
---
hw/i386/intel_iommu.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
Reviewed-by: Yi Liu
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 6524c2ee32..271de995be 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/int
/intel_iommu.c | 42 --
1 file changed, 28 insertions(+), 14 deletions(-)
Reviewed-by: Yi Liu
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 9fe5a222eb..9029ee98f4 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -49,17 +49,6
te fail for wait desc hi
0x%"PRIx64" lo 0x%"PRIx64
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index e49fff2a6c..46d973e629 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -97,11 +97,13 @@ struct VTDPASIDEntry {
struct VTDAddressSpace {
PCIBus *bus;
uint8_t devfn;
+uint32_t pasid;
AddressSpace as;
IOMMUMemoryRegion iommu;
MemoryRegion root; /* The root container of the device */
MemoryRegion nodmar;/* The alias of shared nodmar MR */
MemoryRegion iommu_ir; /* Interrupt region: 0xfeeX */
+MemoryRegion iommu_ir_fault; /* Interrupt region for catching fault */
IntelIOMMUState *iommu_state;
VTDContextCacheEntry context_cache_entry;
QLIST_ENTRY(VTDAddressSpace) next;
@@ -113,6 +115,7 @@ struct VTDAddressSpace {
struct VTDIOTLBEntry {
uint64_t gfn;
uint16_t domain_id;
+uint32_t pasid;
uint64_t slpte;
uint64_t mask;
uint8_t access_flags;
@@ -261,6 +264,7 @@ struct IntelIOMMUState {
uint8_t aw_bits;/* Host/IOVA address width (in bits) */
bool dma_drain; /* Whether DMA r/w draining enabled */
bool dma_translation; /* Whether DMA translation supported */
+bool pasid; /* Whether to support PASID */
/*
* Protects IOMMU states in general. Currently it protects the
@@ -272,6 +276,7 @@ struct IntelIOMMUState {
/* Find the VTD Address space associated with the given bus pointer,
* create a new one if none exists
*/
-VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn);
+VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus,
+ int devfn, unsigned int pasid);
#endif
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index eb94e7e85c..5653175957 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -28,6 +28,8 @@ enum PCIBusFlags {
PCI_BUS_CXL = 0x0004,
};
+#define PCI_NO_PASID UINT32_MAX
+
struct PCIBus {
BusState qbus;
enum PCIBusFlags flags;
--
Regards,
Yi Liu
ddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid)
+{
+uint8_t bus_num = PCI_BUS_NUM(sid);
+VTDAddressSpace *vtd_as = s->vtd_as_cache[bus_num];
+
+if (vtd_as &&
+(sid == PCI_BUILD_BDF(pci_bus_num(vtd_as->bus), vtd_as->devfn))) {
this checks sid
From: Eric Auger
Imported from https://github.com/luxis1999/iommufd/tree/iommufd-v5.17-rc6
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
linux-headers/linux/iommufd.h | 223 ++
linux-headers/linux/vfio.h| 84 +
2 files changed, 307
d iommu_type;
QLIST_HEAD(, VFIOGroup) group_list;
};
Co-authored-by: Eric Auger
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
v1 -> v2:
- Remove QOM for VFIOContainer object, use callback instead per David's
comment.
- Rename container-obj.c/.h to be container-base.c/.h
---
hw/vfi
From: Eric Auger
Update the script to import iommufd.h
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
scripts/update-linux-headers.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index 839a5ec614
/container-base: Introduce [attach/detach]_device container
callbacks
vfio/container-base: Introduce VFIOContainer reset callback
backends/iommufd: Introduce the iommufd object
vfio/as: Allow the selection of a given iommu backend
Yi Liu (5):
vfio/common: Split common.c into common.c, cont
From: Eric Auger
Let the vfio-platform device use vfio_attach_device() and
vfio_detach_device(), hence hiding the details of the used
IOMMU backend.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/platform.c | 42 ++
1 file changed, 2
ation to a place that is not backend-specific
(first vfio address space created instead of the first group).
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/as.c | 18 ++
hw/vfio/container-base.c | 9 +
hw/vfio/c
tatic functions, local to container.c.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/ccw.c | 118 --
hw/vfio/container.c | 8 +--
include/hw/vfio/vfio-common.h | 4 --
3 files changed, 32 insertions(+), 98 deletions(-)
diff
: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/container.c | 65 +++
hw/vfio/pci.c | 50 +++
include/hw/vfio/vfio-common.h | 2 ++
3 files changed, 72 insertions(+), 45 deletions(-)
diff --git a/hw/vfio/container.c b
From: Eric Auger
Let the vfio-ap device use vfio_attach_device() and
vfio_detach_device(), hence hiding the details of the used
IOMMU backend.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/ap.c | 62
1 file changed, 9
/dev/vfio/devices/vfioX may not exist. In that case it is still possible
to open /dev/char/$major:$minor instead. Add helper function to abstract
the cdev open.
Suggested-by: Jason Gunthorpe
Signed-off-by: Yi Liu
---
MAINTAINERS | 6 +
include/qemu/char_dev.h | 16
that only a subset of the container class callbacks is implemented.
Co-authored-by: Eric Auger
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
v1 -> v2:
- arbitrarily set bcontainer->pgsizes to 4K to fix interoperability
with virtio-iommu (Nicolin)
- add tear down in iommufd_attach_d
the first iommufd container to other iommufd containers within the
address space. For legacy containers, IOVA mapping is done by
VFIO_IOMMU_MAP_DMA.
Signed-off-by: Yi Liu
---
hw/vfio/as.c | 117 ++
hw/vfio/container-base.c | 13
From: Eric Auger
Let's turn attach/detach_device as container callbacks. That way,
their implementation can be easily customized for a given backend.
For the time being, only the legacy container is supported.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio
: Yi Liu
Suggested-by: Alex Williamson
---
MAINTAINERS | 7 ++
backends/Kconfig | 5 +
backends/iommufd.c | 265 +++
backends/meson.build | 1 +
backends/trace-events| 12 ++
include/sysemu/iommufd.h | 47 +++
qapi
Note the /dev/iommu device may have been pre-opened by a
management tool such as libvirt. This mode is no more considered
for the legacy backend. So let's remove the "TODO" comment.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
Suggested-by: Alex Williamson
---
hw/vfio/as.c |
cture reports
capability via the cap/ecap registers. The new fault reasons in this
patch is meaningful only when the ecap.SMTS bit is set. So bumping version
does not mean too much about the introduction of new capabilities. @Jason,
given the above statements, can we reconsider if it is necessary to bump
up the version number?
--
Regards,
Yi Liu
On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present
does it need a fix tag since it overrides the other fields?
Reviewed-by: Yi Liu
Signed-o
On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
VTDIOTLBPageInvInfo.mask is used in binary operations with addresses.
Revi
th FN flag. Is it? Have you already seen a wait
descriptor that only has FN flag set but no SW nor IF flag?
} else {
error_report_once("%s: invalid wait desc: hi=%"PRIx64", lo=%"PRIx64
" (unknown type)", __func__, inv_desc->hi,
--
Regards,
Yi Liu
nable stage-1
translation' (rfc2) by Zhenzhong Duan and Yi Liu.
Here we focus on the implementation of ATS support in the IOMMU and on a
PCI-level
API for ATS to be used by virtual devices.
This work is based on the VT-d specification version 4.1 (March 2023).
Here is a link to a GitHub
On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
From: Clement Mathieu--Drif
This series belongs to a list of series that add SVM support for VT-d.
As a starting point, we use the series called 'intel_iommu: Enable stage-1
translation' (rfc2) by Zhenzhong Duan and Yi Liu.
Here w
On 2024/7/2 23:29, CLEMENT MATHIEU--DRIF wrote:
On 02/07/2024 15:33, Yi Liu wrote:
Caution: External email. Do not open attachments or click links,
unless this email comes from a known sender and you know the content
is safe.
On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
From: Clément
*flptep = flpte;
-*flpte_level = level;
return 0;
}
addr = vtd_get_pte_addr(flpte, aw_bits);
-level--;
+(*flpte_level)--;
}
}
--
Regards,
Yi Liu
AP_WIDTH_SHIFT 8
#define PCI_PASID_CTRL0x06/* PASID control register */
#define PCI_PASID_CTRL_ENABLE0x0001 /* Enable bit */
#define PCI_PASID_CTRL_EXEC 0x0002 /* Exec permissions Enable */
--
Regards,
Yi Liu
, no_write, result,
+ result_length, err_count);
+}
+
void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
IOMMUTLBEvent *event)
{
--
Regards,
Yi Liu
ATHIEU--DRIF wrote:
From: Clement Mathieu--Drif
This series belongs to a list of series that add SVM support for VT-d.
As a starting point, we use the series called 'intel_iommu: Enable stage-1
translation' (rfc2) by Zhenzhong Duan and Yi Liu.
Here we focus on the implementation of ATS
On 2024/7/4 12:36, CLEMENT MATHIEU--DRIF wrote:
On 03/07/2024 14:32, Yi Liu wrote:
Caution: External email. Do not open attachments or click links,
unless this email comes from a known sender and you know the content
is safe.
Hi, thanks for your review! very efficient!
Hi CMD,
I've
794,7 @@ struct MemoryRegion {
bool unmergeable;
uint8_t dirty_log_mask;
bool is_iommu;
+bool no_dma;
RAMBlock *ram_block;
Object *owner;
/* owner as TYPE_DEVICE. Used for re-entrancy checks in MR access hotpath
*/
--
Regards,
Yi Liu
problem for now as bits[11:9]
is zero for all current invalidation types. But it will break if newer
type occupies bits[11:9].
Fix it by take bits[11:9] into type and make reserved bits check accurate.
s/take/taking/
Reviewed-by: Yi Liu
There is another fix you may add. In vtd_process_inv_desc(), it
On 2024/8/13 15:44, Zhenzhong Duan wrote:
In vtd_process_inv_desc(), VTD_INV_DESC_PC and VTD_INV_DESC_PIOTLB are
bypassed without scalable mode check. These two types are not valid
in legacy mode and we should report error.
Suggested-by: Yi Liu
Signed-off-by: Zhenzhong Duan
---
hw/i386
safe.
In vtd_process_inv_desc(), VTD_INV_DESC_PC and VTD_INV_DESC_PIOTLB are
bypassed without scalable mode check. These two types are not valid
in legacy mode and we should report error.
Suggested-by: Yi Liu
Signed-off-by: Zhenzhong Duan
---
hw/i386/intel_iommu.c | 22 +++---
, /*Invalid PASID table entry */
how about making the comment line aligned? Either one line or two lines.
Besides this, lgtm.
Reviewed-by: Yi Liu
/* Output address in the interrupt address range for scalable mode */
VTD_FR_SM_INTERRUPT_ADDR = 0x87,
diff --git a/hw/i386
emulation")
Suggested-by: Yi Liu
Signed-off-by: Zhenzhong Duan
Reviewed-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
Reviewed-by: Yi Liu
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index c52912f
make scalable mode
work")
4a4f219e8a10 would be better. :)
Suggested-by: Yi Liu
Signed-off-by: Zhenzhong Duan
Reviewed-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
---
hw/i386/intel_iommu.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git
return -VTD_FR_FS_BIT_UPDATE_FAILED;
+}
*flptep = flpte;
*flpte_level = level;
return 0;
--
Regards,
Yi Liu
uot;,"
+ "pasid=0x%" PRIx32 ")", __func__, iova, pasid);
+return -VTD_FR_FS_NON_CANONICAL;
+}
+
while (true) {
offset = vtd_iova_level_offset(iova, level);
flpte = vtd_get_pte(addr, offset);
--
Regards,
Yi Liu
t;ecap |= VTD_ECAP_SMTS | VTD_ECAP_SRS | VTD_ECAP_SLTS;
}
--
Regards,
Yi Liu
48BIT) && s->scalable_modern) {
+error_setg(errp, "Supported values for aw-bits are: %d",
+ VTD_HOST_AW_48BIT);
call out it is for scalable modern.:)
+return false;
+}
+
if (s->scalable_mode && !s->dma_drain) {
error_setg(errp, "Need to set dma_drain for scalable mode");
return false;
--
Regards,
Yi Liu
break;
case VTD_INV_DESC_PIOTLB:
+trace_vtd_inv_desc("p-iotlb", inv_desc.val[1], inv_desc.val[0]);
+if (!vtd_process_piotlb_desc(s, &inv_desc)) {
+return false;
+}
break;
case VTD_INV_DESC_WAIT:
--
Regards,
Yi Liu
n false;
+}
+return true;
+}
+
static bool vtd_process_inv_iec_desc(IntelIOMMUState *s,
VTDInvDesc *inv_desc)
{
@@ -2775,6 +2852,10 @@ static bool
vtd_process_inv_desc(IntelIOMMUState *s)
break;
case VTD_INV_DESC_PIOTLB:
+trace_vtd_inv_desc("p-iotlb", inv_desc.val[1], inv_desc.val[0]);
+if (!vtd_process_piotlb_desc(s, &inv_desc)) {
+return false;
+}
break;
case VTD_INV_DESC_WAIT:
--
Regards,
Yi Liu
--
Regards,
Yi Liu
vIOMMU when comes to support passthrough devices.
Yes, we already have this check, see
https://github.com/yiliu1765/qemu/commit/b7ac7ce3a2e21eb1b3172743ee6f73e80fe67b3a
good to know it. :) Will you fail the VM if the device's iommu does not
support FS1GP or just mask out the FS1GP?
--
Regards,
Yi Liu
gt;iommu, 0, event);
+}
+ }
}
static bool vtd_process_piotlb_desc(IntelIOMMUState *s,
--
Regards,
Yi Liu
's suggestion,
only vIOMMU properties can control them.
I see. yeah, it makes sense.
--
Regards,
Yi Liu
e the translation request."
sorry for a typo. s/request/result/
--
Regards,
Yi Liu
or existing
container.
yes, as long as the input of iommufd_device_init() are available in the new
place. And remember to destroy it if the code failed after initializing
iommufd_device.
--
Regards,
Yi Liu
e for such migration.
But I'm not sure if there is a real scenario migrating to old qemu,
why not just update qemu on destination?
Thanks
Zhenzhong
--
Regards,
Yi Liu
iommu_ir; /* Interrupt region: 0xfeeX */
+MemoryRegion iommu_ir_fault; /* Interrupt region for catching fault */
IntelIOMMUState *iommu_state;
VTDContextCacheEntry context_cache_entry;
QLIST_ENTRY(VTDAddressSpace) next;
@@ -113,6 +115,7 @@ struct VTDAddressSpace {
struct VTDIOTLBEntry {
uint64_t gfn;
uint16_t domain_id;
+uint32_t pasid;
uint64_t slpte;
uint64_t mask;
uint8_t access_flags;
@@ -260,6 +263,7 @@ struct IntelIOMMUState {
bool buggy_eim; /* Force buggy EIM unless eim=off */
uint8_t aw_bits;/* Host/IOVA address width (in bits) */
bool dma_drain; /* Whether DMA r/w draining enabled */
+bool pasid; /* Whether to support PASID */
/*
* Protects IOMMU states in general. Currently it protects the
@@ -271,6 +275,7 @@ struct IntelIOMMUState {
/* Find the VTD Address space associated with the given bus pointer,
* create a new one if none exists
*/
-VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn);
+VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus,
+ int devfn, unsigned int pasid);
#endif
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 347440d42c..cbfcf0b770 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -26,6 +26,8 @@ enum PCIBusFlags {
PCI_BUS_EXTENDED_CONFIG_SPACE = 0x0002,
};
+#define PCI_NO_PASID UINT32_MAX
+
struct PCIBus {
BusState qbus;
enum PCIBusFlags flags;
--
Regards,
Yi Liu
calable mode
vIOMMU support was following 3.0 spec, while RPS is added in 3.1. Needs
to be fixed.
Thanks
return false;
}
return (VTD_PE_GET_TYPE(&pe) == VTD_SM_PASID_ENTRY_PT);
--
2.25.1
--
Regards,
Yi Liu
On 2022/3/29 12:54, Jason Wang wrote:
在 2022/3/28 下午4:45, Yi Liu 写道:
On 2022/3/21 13:54, Jason Wang wrote:
This patch introduce ECAP_PASID via "x-pasid-mode". Based on the
existing support for scalable mode, we need to implement the following
missing parts:
1) tag VTDAddress
From: Eric Auger
Properly output the errno string.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 67a183f17b..e26e65bb1f 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
vfio/pci: Add an iommufd option
Yi Liu (6):
vfio/common: Rename VFIOGuestIOMMU::iommu into ::iommu_mr
vfio/common: Split common.c into common.c, container.c and as.c
vfio: Add base object for VFIOContainer
hw/iommufd: Creation
vfio/iommufd: Implement iommufd backend
vfio/iommufd
From: Eric Auger
Update the script to import iommufd.h
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
scripts/update-linux-headers.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index 839a5ec614
ation to a place that is not backend-specific
(first vfio address space created instead of the first group).
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/as.c | 18 ++
hw/vfio/container-obj.c | 13 +
hw/vfio/c
Rename VFIOGuestIOMMU iommu field into iommu_mr. Then it becomes clearer
it is an IOMMU memory region.
no functional change intended
Signed-off-by: Yi Liu
---
hw/vfio/common.c | 16
include/hw/vfio/vfio-common.h | 2 +-
2 files changed, 9 insertions(+), 9
From: Eric Auger
Using a VFIODevice handle local variable to improve the code readability.
no functional change intended
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/pci.c | 49 +
1 file changed, 25 insertions(+), 24 deletions
From: Eric Auger
Imported from https://github.com/luxis1999/iommufd/tree/iommufd-v5.17-rc6
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
linux-headers/linux/iommufd.h | 223 ++
linux-headers/linux/vfio.h| 84 +
2 files changed, 307
From: Eric Auger
Let's turn attach/detach_device as container callbacks. That way,
their implementation can be easily customized for a given backend.
For the time being, only the legacy container is supported.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio
: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/container.c | 65 +++
hw/vfio/pci.c | 50 +++
include/hw/vfio/vfio-common.h | 2 ++
3 files changed, 72 insertions(+), 45 deletions(-)
diff --git a/hw/vfio/container.c b
From: Eric Auger
Let the vfio-platform device use vfio_attach_device() and
vfio_detach_device(), hence hiding the details of the used
IOMMU backend.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/platform.c | 42 ++
1 file changed, 2
Introduce iommufd utility library which can be compiled out with
CONFIG_IOMMUFD configuration. This code is bound to be called by
several subsystems: vdpa, and vfio.
Co-authored-by: Eric Auger
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
MAINTAINERS | 7 ++
hw
the first iommufd container to other iommufd containers within the
address space. For legacy containers, IOVA mapping is done by
VFIO_IOMMU_MAP_DMA.
Signed-off-by: Yi Liu
---
hw/vfio/as.c | 117 +++
hw/vfio/container-obj.c | 17
prereg_listener;
unsigned iommu_type;
QLIST_HEAD(, VFIOGroup) group_list;
};
Co-authored-by: Eric Auger
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/as.c | 48 +++---
hw/vfio/container-obj.c | 195 +++
hw
From: Eric Auger
Now we support two types of iommu backends, let's add the capability
to select one of them. This is based on a VFIODevice auto/on/off
iommu_be field. This field is likely to be forced to a given value or
set by a device option.
Signed-off-by: Eric Auger
Signed-off-by: Y
From: Eric Auger
This auto/on/off option allows the user to force a the select
the iommu BE (iommufd or legacy).
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/pci.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
From: Eric Auger
Let the vfio-ap device use vfio_attach_device() and
vfio_detach_device(), hence hiding the details of the used
IOMMU backend.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/ap.c | 62
1 file changed, 9
tatic functions, local to container.c.
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/ccw.c | 118 --
hw/vfio/container.c | 8 +--
include/hw/vfio/vfio-common.h | 4 --
3 files changed, 32 insertions(+), 98 deletions(-)
diff
that only a subset of the container class callbacks is implemented.
Co-authored-by: Eric Auger
Signed-off-by: Eric Auger
Signed-off-by: Yi Liu
---
hw/vfio/as.c | 2 +-
hw/vfio/iommufd.c| 545 +++
hw/vfio/meson.
//github.com/luxis1999/qemu/tree/qemu-for-5.17-rc6-vm-rfcv1
[4] https://lore.kernel.org/kvm/0-v1-a8faf768d202+125dd-
vfio_mdev_no_group_...@nvidia.com/
Following is probably more relevant to [4]:
https://lore.kernel.org/all/10-v1-33906a626da1+16b0-vfio_kvm_no_group_...@nvidia.com/
absolutely.:-) thanks.
Thanks
Kevin
--
Regards,
Yi Liu
Hi Jason,
On 2022/4/22 22:58, Jason Gunthorpe wrote:
On Thu, Apr 14, 2022 at 03:47:07AM -0700, Yi Liu wrote:
+static int vfio_get_devicefd(const char *sysfs_path, Error **errp)
+{
+long int vfio_id = -1, ret = -ENOTTY;
+char *path, *tmp = NULL;
+DIR *dir;
+struct dirent *dent
gt;> That's one case of incompatibility, but the IOMMU attach group callback
>> can fail in a variety of ways."
Though, it is not so important that it is urgent (and copy makes it
work better anyhow), qemu can stay as it is.
yes. as a start, keep it would be simpler.
Jason
--
Regards,
Yi Liu
On 2024/7/4 12:30, CLEMENT MATHIEU--DRIF wrote:
On 03/07/2024 14:14, Yi Liu wrote:
Caution: External email. Do not open attachments or click links,
unless this email comes from a known sender and you know the content
is safe.
On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
From: Clément
truct VTDIOTLBPageInvInfo VTDIOTLBPageInvInfo;
--
2.45.2
--
Regards,
Yi Liu
" (unknown type)", __func__, inv_desc->hi,
--
Regards,
Yi Liu
cie_regs.h | 4 +
system/memory.c| 49 ++
10 files changed, 604 insertions(+), 2 deletions(-)
--
Regards,
Yi Liu
the sentence. :)
Fixes: 1b2b12376c ("intel-iommu: PASID support")
you need more digits per the result of "grep Fixes
docs/devel/submitting-a-patch.rst".
docs/devel/submitting-a-patch.rst:add an additional line with "Fixes:
Signed-off-by: Clément Mathieu--Drif
Reviewed-by
On 2024/7/5 13:13, CLEMENT MATHIEU--DRIF wrote:
On 05/07/2024 05:03, Yi Liu wrote:
Caution: External email. Do not open attachments or click links,
unless this email comes from a known sender and you know the content
is safe.
On 2024/5/30 20:24, CLEMENT MATHIEU--DRIF wrote:
This series
Signed-off-by: Yi Liu
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6725913c8b..61724b91d8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3656,6 +3656,7 @@ F: tests/uefi-test-tools/
VT-d Emulation
M: Michael S. Tsirkin
R: Jason Wang
+R
ot;Fixes tag" is not needed.
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
Reviewed-by: Zhenzhong Duan
---
hw/i386/intel_iommu_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index f8cf
nt64_t mask;
};
typedef struct VTDIOTLBPageInvInfo VTDIOTLBPageInvInfo;
--
Regards,
Yi Liu
L; level < VTD_SL_PML4_LEVEL; level++) {
key.gfn = vtd_get_iotlb_gfn(addr, level);
--
Regards,
Yi Liu
nt32_t pasid;
uint64_t addr;
-uint8_t mask;
+uint64_t mask;
};
typedef struct VTDIOTLBPageInvInfo VTDIOTLBPageInvInfo;
--
Regards,
Yi Liu
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