[PULL 01/17] Hexagon (target/hexagon) Restore --disable-hexagon-idef-parser build

The --disable-hexagon-idef-parser configuration was broken by this patch 2feacf60c23ba6 (target/hexagon: Drop tcg_temp_free from C code) That config is not tested by CI Fix is simple: Mark a few TCGv variables as unused Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id

[PULL 04/17] Hexagon (target/hexagon) Add overrides for jumpr31 instructions

: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-2-tsimp...@quicinc.com> --- target/hexagon/gen_tcg.h | 15 ++- target/hexagon/genptr.c | 9 - 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/target/hexagon/gen_tcg.h b/

[PULL 12/17] Hexagon (tests/tcg/hexagon) Remove __builtin from scatter_gather

Replace __builtin_* with inline assembly The __builtin's are subject to change with different compiler releases, so might break Mark arrays as aligned when accessed as HVX vectors Clean up comments Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Messa

[PULL 08/17] Hexagon (target/hexagon) Analyze packet before generating TCG

d the intermediate step of writing to hex_new_value. Note that other checks will also be needed (e.g., no instructions can raise an exception). Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-6-tsimp...@quicinc.com> --- target/hexagon/

[PULL 07/17] Hexagon (target/hexagon) Add overrides for dealloc-return instructions

SL2_return_fnew This patch eliminates the last helper that uses write_new_pc, so we remove it from op_helper.c Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-5-tsimp...@quicinc.com> --- target/hexagon/gen_tcg.h | 53 ++

[PULL 14/17] Hexagon (target/hexagon) Change subtract from zero to change sign

The F2_sffms instruction [r0 -= sfmpy(r1, r2)] doesn't properly handle -0. Previously we would negate the input operand by subtracting from zero. Instead, we negate by changing the sign bit. Test case added to tests/tcg/hexagon/fpstuff.c Signed-off-by: Taylor Simpson Reviewed-by:

[PULL 09/17] Hexagon (target/hexagon) Don't set pkt_has_store_s1 when not needed

: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-7-tsimp...@quicinc.com> --- target/hexagon/translate.h | 1 + target/hexagon/attribs_def.h.inc| 1 + target/hexagon/translate.c | 6 +- target/hexagon/gen_analyze_funcs.py | 5 +

[PULL 00/17] Hexagon (target/hexagon) updates

n) updates Anton Johansson (1): target/hexagon/idef-parser: Remove unused code paths Richard Henderson (1): target/hexagon/idef-parser: Elide mov in gen_pred_assign Taylor Simpson (15): Hexagon (target/hexagon) Restore --disable-hexagon-idef-pa

[PULL 16/17] Hexagon (target/hexagon) Reduce manipulation of slot_cancelled

new_r2,r2 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 new_r2,tmp0 br $L2 set_label $L1 set_label $L2 mov_i32 r2,new_r2 Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-14-tsimp...@quicinc.com> --- target/h

[PULL 02/17] target/hexagon/idef-parser: Elide mov in gen_pred_assign

From: Richard Henderson Merge mov with andi. Suggested-by: Taylor Simpson Signed-off-by: Richard Henderson Signed-off-by: Taylor Simpson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Taylor Simpson Message-Id: <20230306225724.2105263-1-richard.hender...@linaro.org> --- target/h

[PULL 05/17] Hexagon (target/hexagon) Add overrides for callr

Add overrides for J2_callr J2_callrt J2_callrf Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-3-tsimp...@quicinc.com> --- target/hexagon/gen_tcg.h | 6 ++ target/hexagon/macros.h | 12 +--- target/hexagon/genptr.c

[PULL 15/17] Hexagon (target/hexagon) Remove gen_log_predicated_reg_write[_pair]

r_i32 slot_cancelled,slot_cancelled,$0x8 set_label $L2 mov_i32 r2,new_r2 We'll remove the unnecessary manipulation of slot_cancelled in a subsequent patch. Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-13-tsimp...@quicinc.com> --- target/h

[PULL 03/17] target/hexagon/idef-parser: Remove unused code paths

From: Anton Johansson Removes code paths used by COF instructions, which are no longer processed by idef-parser. Tested-by: Taylor Simpson Reviewed-by: Taylor Simpson Signed-off-by: Taylor Simpson Signed-off-by: Anton Johansson Message-Id: <20230131223133.8592-1-a...@rev.ng> ---

[PULL 11/17] Hexagon (tests/tcg/hexagon) Update preg_alias.c

Add control registers (c4, c5) to clobbers list Made possible by new toolchain container Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-9-tsimp...@quicinc.com> --- tests/tcg/hexagon/preg_alias.c | 10 +- 1 file changed, 5 insertions

[PULL 13/17] Hexagon (tests/tcg/hexagon) Enable HVX tests

Made possible by new toolchain container Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-11-tsimp...@quicinc.com> --- tests/tcg/hexagon/Makefile.target | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/tes

[PULL 06/17] Hexagon (target/hexagon) Add overrides for endloop1/endloop01

Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-4-tsimp...@quicinc.com> --- target/hexagon/gen_tcg.h | 4 +++ target/hexagon/genptr.c | 78 2 files changed, 82 insertions(+) diff --git a/target/h

[PULL 17/17] Hexagon (target/hexagon) Improve code gen for predicated HVX instructions

reg_write[_pair] is called It's only needed for special operands VxxV and VyV Remove gen_log_qreg_write Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-15-tsimp...@quicinc.com> --- target/hexagon/cpu.h

[PATCH] Hexagon (target/hexagon) Fix shadow variable when idef-parser is off

Adding -Werror=shadow=compatible-local causes Hexagon not to build when idef-parser is off. The "label" variable in CHECK_NOSHUF_PRED shadows a variable in the surrounding code. Signed-off-by: Taylor Simpson --- target/hexagon/macros.h | 6 +++--- 1 file changed, 3 insertions(+), 3

[PATCH 3/9] Hexagon (target/hexagon) Make generators object oriented - gen_helper_protos

Signed-off-by: Taylor Simpson --- target/hexagon/gen_helper_protos.py | 184 target/hexagon/hex_common.py| 15 +-- 2 files changed, 55 insertions(+), 144 deletions(-) diff --git a/target/hexagon/gen_helper_protos.py b/target/hexagon/gen_helper_protos.py

[PATCH 0/9] Hexagon (target/hexagon) Make generators object oriented

See commit message in second patch Taylor Simpson (9): Hexagon (target/hexagon) Clean up handling of modifier registers Hexagon (target/hexagon) Make generators object oriented - gen_tcg_funcs Hexagon (target/hexagon) Make generators object oriented - gen_helper_protos Hexagon

[PATCH 5/9] Hexagon (target/hexagon) Make generators object oriented - gen_idef_parser_funcs

Signed-off-by: Taylor Simpson --- target/hexagon/gen_idef_parser_funcs.py | 20 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/target/hexagon/gen_idef_parser_funcs.py b/target/hexagon/gen_idef_parser_funcs.py index f4518e653f..550a48cb7b 100644 --- a/target

[PATCH 8/9] Hexagon (target/hexagon) Remove unused WRITES_PRED_REG attribute

This is the only remaining use of the is_written function. We will remove it in the subsequent commit. Signed-off-by: Taylor Simpson --- target/hexagon/attribs_def.h.inc | 1 - target/hexagon/hex_common.py | 11 --- 2 files changed, 12 deletions(-) diff --git a/target/hexagon

[PATCH 6/9] Hexagon (target/hexagon) Make generators object oriented - gen_op_regs

Signed-off-by: Taylor Simpson --- target/hexagon/gen_op_regs.py | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/hexagon/gen_op_regs.py b/target/hexagon/gen_op_regs.py index a8a7712129..7b7b33895a 100755 --- a/target/hexagon/gen_op_regs.py +++ b/target/hexagon

[PATCH 2/9] Hexagon (target/hexagon) Make generators object oriented - gen_tcg_funcs

regid (e.g., is_read) This patch creates the class hierarchy in hex_common and converts gen_tcg_funcs.py. The other scripts will be converted in subsequent patches in this series. Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg_funcs.py | 583 +++- t

[PATCH 1/9] Hexagon (target/hexagon) Clean up handling of modifier registers

to the modifier register specified in the instruction. We create a TCGv variable "CS" to hold the value to pass to the helper. Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h| 9 - target/hexagon/macros.h | 3 +-- target/he

[PATCH 7/9] Hexagon (target/hexagon) Make generators object oriented - gen_analyze_funcs

This patch conflicts with https://lists.gnu.org/archive/html/qemu-devel/2023-11/msg00729.html If that series goes in first, we'll rework this patch and vice versa. Signed-off-by: Taylor Simpson --- target/hexagon/gen_analyze_funcs.py | 163 +--- target/he

[PATCH 9/9] Hexagon (target/hexagon) Remove dead functions from hex_common.py

These functions are no longer used after making the generators object oriented. Signed-off-by: Taylor Simpson --- target/hexagon/hex_common.py | 51 1 file changed, 51 deletions(-) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py

[PATCH 4/9] Hexagon (target/hexagon) Make generators object oriented - gen_helper_funcs

Signed-off-by: Taylor Simpson --- target/hexagon/gen_helper_funcs.py | 400 +++-- target/hexagon/hex_common.py | 58 - 2 files changed, 151 insertions(+), 307 deletions(-) diff --git a/target/hexagon/gen_helper_funcs.py b/target/hexagon/gen_helper_funcs.py

[PATCH v2 3/3] Hexagon (target/hexagon) Remove old dectree.py

Now that we are using QEMU decodetree.py, remove the old decoder Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.h| 2 - target/hexagon/decode.c | 344 target/hexagon/gen_dectree_import.c | 49 target/hexagon/opcodes.c

[PATCH v2 2/3] Hexagon (target/hexagon) Use QEMU decodetree (16-bit instructions)

1, s2). Extend gen_trans_funcs.py to handle all instructions rather than filter by instruction class. There is a g_assert_not_reached() in decode_insns() in decode.c to verify we never try to use the old decoder on 16-bit instructions. Signed-off-by: Taylor Simpson --- target/hexagon/decode.c

[PATCH v2 0/3] Hexagon (target/hexagon) Use QEMU decodetree

Replace the old Hexagon dectree.py with QEMU decodetree Taylor Simpson (3): Hexagon (target/hexagon) Use QEMU decodetree (32-bit instructions) Hexagon (target/hexagon) Use QEMU decodetree (16-bit instructions) Hexagon (target/hexagon) Remove old dectree.py target/hexagon/decode.h

[PATCH v2 1/3] Hexagon (target/hexagon) Use QEMU decodetree (32-bit instructions)

d-off-by: Taylor Simpson --- target/hexagon/decode.h | 5 +- target/hexagon/decode.c | 54 - target/hexagon/translate.c| 4 +- target/hexagon/README | 13 +- target/hexagon/gen_decodetree.py | 193 ++ target/he

[PATCH v2 6/9] Hexagon (target/hexagon) Make generators object oriented - gen_op_regs

Reviewed-by: Brian Cain Signed-off-by: Taylor Simpson --- target/hexagon/gen_op_regs.py | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/hexagon/gen_op_regs.py b/target/hexagon/gen_op_regs.py index a8a7712129..7b7b33895a 100755 --- a/target/hexagon/gen_op_regs.py

[PATCH v2 1/9] Hexagon (target/hexagon) Clean up handling of modifier registers

to the modifier register specified in the instruction. We create a TCGv variable "CS" to hold the value to pass to the helper. Reviewed-by: Brian Cain Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h| 9 - target/hexagon/macros.h

[PATCH v2 3/9] Hexagon (target/hexagon) Make generators object oriented - gen_helper_protos

Signed-off-by: Taylor Simpson --- target/hexagon/gen_helper_protos.py | 149 ++-- target/hexagon/hex_common.py| 7 -- 2 files changed, 8 insertions(+), 148 deletions(-) diff --git a/target/hexagon/gen_helper_protos.py b/target/hexagon/gen_helper_protos.py

[PATCH v2 0/9] Hexagon (target/hexagon) Make generators object oriented

See commit message in second patch Changes in v2 Address feedback from Brian Cain - Consolidate logic to create helper arg lists Taylor Simpson (9): Hexagon (target/hexagon) Clean up handling of modifier registers Hexagon (target/hexagon) Make generators object oriented

[PATCH v2 2/9] Hexagon (target/hexagon) Make generators object oriented - gen_tcg_funcs

regid (e.g., is_read) This patch creates the class hierarchy in hex_common and converts gen_tcg_funcs.py. The other scripts will be converted in subsequent patches in this series. Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg_funcs.py | 571 ++- target/he

[PATCH v2 9/9] Hexagon (target/hexagon) Remove dead functions from hex_common.py

These functions are no longer used after making the generators object oriented. Signed-off-by: Taylor Simpson --- target/hexagon/hex_common.py | 51 1 file changed, 51 deletions(-) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py

[PATCH v2 7/9] Hexagon (target/hexagon) Make generators object oriented - gen_analyze_funcs

This patch conflicts with https://lists.gnu.org/archive/html/qemu-devel/2023-11/msg00729.html If that series goes in first, we'll rework this patch and vice versa. Signed-off-by: Taylor Simpson --- target/hexagon/gen_analyze_funcs.py | 163 +--- target/he

[PATCH v2 5/9] Hexagon (target/hexagon) Make generators object oriented - gen_idef_parser_funcs

Signed-off-by: Taylor Simpson --- target/hexagon/gen_idef_parser_funcs.py | 20 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/target/hexagon/gen_idef_parser_funcs.py b/target/hexagon/gen_idef_parser_funcs.py index f4518e653f..550a48cb7b 100644 --- a/target

[PATCH v2 8/9] Hexagon (target/hexagon) Remove unused WRITES_PRED_REG attribute

This is the only remaining use of the is_written function. We will remove it in the subsequent commit. Signed-off-by: Taylor Simpson --- target/hexagon/attribs_def.h.inc | 1 - target/hexagon/hex_common.py | 11 --- 2 files changed, 12 deletions(-) diff --git a/target/hexagon

[PATCH v2 4/9] Hexagon (target/hexagon) Make generators object oriented - gen_helper_funcs

Signed-off-by: Taylor Simpson --- target/hexagon/gen_helper_funcs.py | 368 + target/hexagon/hex_common.py | 48 +++- 2 files changed, 103 insertions(+), 313 deletions(-) diff --git a/target/hexagon/gen_helper_funcs.py b/target/hexagon/gen_helper_funcs.py

[RFC PATCH] Hexagon (target/hexagon) Make generators object oriented

y calls to hex_common.bad_register - We can remove the functions in hex_common that use regtype/regid (e.g., is_read) Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg_funcs.py | 568 +++- target/hexagon/hex_common.py| 467 ++ 2 files changed, 509

[PATCH 2/3] Hexagon (target/hexagon) Enable more short-circuit packets (scalar core)

binBoZeeZ311a.bin Description: test/plain

[PATCH 1/3] Hexagon (target/hexagon) Analyze reads before writes

binJqsrgMI63R.bin Description: test/plain

[PATCH 0/3] Hexagon (target/hexagon) Enable more short-circuit packets

binQUp8uBOBfS.bin Description: test/plain

[PATCH 3/3] Hexagon (target/hexagon) Enable more short-circuit packets (HVX)

binstlsT1oUDf.bin Description: test/plain

[PATCH 1/3] Hexagon (target/hexagon) Analyze reads before writes

analysis for short-circuiting the packet semantics in a subsequent commit Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 24 ++- target/hexagon/README | 7 +- target/hexagon/gen_analyze_funcs.py | 221 +++- 3 files changed, 111

[PATCH 3/3] Hexagon (target/hexagon) Enable more short-circuit packets (HVX)

Look for read-after-write instead of overlap of reads and writes HVX instructions with helpers have pass-by-reference semantics, so we check for overlaps of reads and writes within the same instruction. Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 88

[PATCH 0/3] Hexagon (target/hexagon) Enable more short-circuit packets

can read from either the destination register or a temporary location. HVX instructions with generated helpers require special handling. The semantics of the helpers are pass-by-reference, so we still need the overlap check for these. Taylor Simpson (3): Hexagon (target/hexagon) Analyze reads

[PATCH 2/3] Hexagon (target/hexagon) Enable more short-circuit packets (scalar core)

$0x7f976443 Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 13 +++-- target/hexagon/translate.c | 19 +++ target/hexagon/gen_tcg_funcs.py | 2 +- 3 files changed, 11 insertions(+), 23 deletions(-) diff --git a/target/hexagon/translate.h b

RE: [PATCH v7 01/13] target/hexagon: update MAINTAINERS for idef-parser

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 01/13

RE: [PATCH v7 09/13] target/hexagon: import lexer for idef-parser

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 09/13] target/h

RE: [PATCH v7 05/13] target/hexagon: introduce new helper functions

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 05/13] targe

RE: [PATCH v7 05/13] target/hexagon: introduce new helper functions

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 05/13] targe

RE: [PATCH v7 02/13] target/hexagon: import README for idef-parser

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 02/13] target/he

RE: [PATCH v7 03/13] target/hexagon: make slot number an unsigned

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 03/13] target/h

RE: [PATCH v7 07/13] target/hexagon: prepare input for the idef-parser

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 07/13] targe

RE: [PATCH v7 11/13] target/hexagon: call idef-parser functions

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 11/13] target/h

RE: [PATCH v7 07/13] target/hexagon: prepare input for the idef-parser

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 07/13] targe

RE: [PATCH v7 12/13] target/hexagon: import additional tests

> -Original Message- > From: Anton Johansson > Sent: Friday, December 17, 2021 2:01 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; Taylor Simpson ; Brian Cain > ; bab...@rev.ng; ni...@rev.ng; > richard.hender...@linaro.org > Subject: [PATCH v7 12/13] target/he

RE: [RFC PATCH v2 00/67] Hexagon patch series

I know everyone is heads-down working on the 5.0 release, and I realize this is a lot of code. However, I would really appreciate some feedback on it. Is there anything I can do to make it easier to review? Thanks, Taylor > -Original Message- > From: Taylor Simpson > Sen

[RFC PATCH v2 03/67] Hexagon ELF Machine Definition

Define EM_HEXAGON 164 Signed-off-by: Taylor Simpson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h b/include/elf.h index 8fbfe60..d51e7d4 100644 --- a/include/elf.h +++ b/include/elf.h

[RFC PATCH v2 09/67] Hexagon architecture types

Define types used in files imported from the Hexagon architecture library Signed-off-by: Taylor Simpson --- target/hexagon/hex_arch_types.h | 42 + 1 file changed, 42 insertions(+) create mode 100644 target/hexagon/hex_arch_types.h diff --git a/target

[RFC PATCH v2 13/67] Hexagon register map

Certain operand types represent a non-contiguous set of values. For example, the compound compare-and-jump instruction can only access registers R0-R7 and R16-23. This table represents the mapping from the encoding to the actual values. Signed-off-by: Taylor Simpson --- target/hexagon/regmap.h

[RFC PATCH v2 05/67] Hexagon register names

Signed-off-by: Taylor Simpson --- target/hexagon/hex_regs.h | 99 +++ 1 file changed, 99 insertions(+) create mode 100644 target/hexagon/hex_regs.h diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h new file mode 100644 index 000

[RFC PATCH v2 24/67] Hexagon generator phase 2 - opcodes_def_generated.h

Gives a list of all the opcodes Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 12 1 file changed, 12 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index 3f52ef3..107e1e8 100755 --- a/target/hexagon/do_qemu.py +++ b/target/hexagon

[RFC PATCH v2 02/67] Hexagon README

Gives an introduction and overview to the Hexagon target Signed-off-by: Taylor Simpson --- target/hexagon/README | 296 ++ 1 file changed, 296 insertions(+) create mode 100644 target/hexagon/README diff --git a/target/hexagon/README b/target

[RFC PATCH v2 15/67] Hexagon instruction printing

Signed-off-by: Taylor Simpson --- target/hexagon/printinsn.h | 26 + target/hexagon/printinsn.c | 91 ++ 2 files changed, 117 insertions(+) create mode 100644 target/hexagon/printinsn.h create mode 100644 target/hexagon/printinsn.c diff

[RFC PATCH v2 10/67] Hexagon instruction and packet types

The insn_t and packet_t are the interface between instruction decoding and TCG code generation Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 133 ++ 1 file changed, 133 insertions(+) create mode 100644 target/hexagon/insn.h diff

[RFC PATCH v2 21/67] Hexagon generator phase 1 - C preprocessor for semantics

Run the C preprocessor across the instruction definition files and macro definitoin file to expand macros and prepare the semantics_generated.pyinc file. The resulting file contains one entry with the semantics for each instruction and one line with the instruction attributes associated with eac

[RFC PATCH v2 11/67] Hexagon register fields

Declare bitfields within registers such as user status register (USR) Signed-off-by: Taylor Simpson --- target/hexagon/reg_fields.h | 40 +++ target/hexagon/reg_fields_def.h | 109 target/hexagon/reg_fields.c | 28 +++ 3

[RFC PATCH v2 27/67] Hexagon generator phase 2 - printinsn-generated.h

Data for printing (disassembling) each instruction (format string + operands) Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 151 ++ 1 file changed, 151 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py

[RFC PATCH v2 25/67] Hexagon generator phase 2 - op_attribs_generated.h

Lists all the attributes associated with each instruction Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 13 + 1 file changed, 13 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index 107e1e8..499f0e0 100755 --- a/target/hexagon

[RFC PATCH v2 12/67] Hexagon instruction attributes

Signed-off-by: Taylor Simpson --- target/hexagon/attribs.h | 32 target/hexagon/attribs_def.h | 404 +++ 2 files changed, 436 insertions(+) create mode 100644 target/hexagon/attribs.h create mode 100644 target/hexagon/attribs_def.h diff --git

[RFC PATCH v2 07/67] Hexagon CPU Scalar Core Helpers

The majority of helpers are generated. Define the helper functions needed then include the generated file Signed-off-by: Taylor Simpson --- target/hexagon/helper.h| 37 target/hexagon/op_helper.c | 434 + 2 files changed, 471 insertions

[RFC PATCH v2 29/67] Hexagon generater phase 4 - Decode tree

Python script that emits the decode tree in dectree_generated.h. Tested-by: Philippe Mathieu-Daudé --- target/hexagon/dectree.py | 353 ++ 1 file changed, 353 insertions(+) create mode 100755 target/hexagon/dectree.py diff --git a/target/hexagon/dect

[RFC PATCH v2 33/67] Hexagon instruction classes

Used to determine legal VLIW slots for each instruction Signed-off-by: Taylor Simpson --- target/hexagon/iclass.h | 46 + target/hexagon/iclass.c | 107 2 files changed, 153 insertions(+) create mode 100644 target/hexagon

[RFC PATCH v2 14/67] Hexagon instruction/packet decode

extenders Separate subinsn's into two instructions Break compare-jumps into two instructions Create instructions for :endloop Signed-off-by: Taylor Simpson --- target/hexagon/decode.h | 39 +++ target/hexagon/decode.c | 769 t

[RFC PATCH v2 44/67] Hexagon TCG generation - step 06

Override memop instructions Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 60 +++ 1 file changed, 60 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h index a6cbce0..00647cb 100644 --- a

[RFC PATCH v2 17/67] Hexagon arch import - macro definitions

Imported from the Hexagon architecture library imported/macros.def Scalar core macro definitions The macro definition files specify instruction attributes that are applied to each instruction that reverences the macro. Signed-off-by: Taylor Simpson --- target/hexagon/imported

[RFC PATCH v2 23/67] Hexagon generator phase 2 - qemu_wrap_generated.h

Gives a default definition of fWRAP_ for each instruction Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 14 ++ 1 file changed, 14 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index 6f0e376..3f52ef3 100755 --- a/target/hexagon

[RFC PATCH v2 31/67] Hexagon macros to interface with the generator

Various forms of declare, read, write, free Signed-off-by: Taylor Simpson --- target/hexagon/macros.h | 363 1 file changed, 363 insertions(+) create mode 100644 target/hexagon/macros.h diff --git a/target/hexagon/macros.h b/target/hexagon

[RFC PATCH v2 20/67] Hexagon instruction utility functions

Utility functions called by various instructions Signed-off-by: Taylor Simpson --- target/hexagon/arch.h | 62 target/hexagon/conv_emu.h | 50 +++ target/hexagon/fma_emu.h | 30 ++ target/hexagon/arch.c | 663 + target/hexagon/conv_emu.c | 369

[RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h

For each instruction we create DEF_HELPER function prototype TCG code to generate call to helper Helper definition Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 769 ++ 1 file changed, 769 insertions(+) create mode 100755

[RFC PATCH v2 28/67] Hexagon generator phase 3 - C preprocessor for decode tree

Run the C preprocessor across the instruction definition and encoding files to expand macros and prepare the iset.py file. The resulting fill contains python data structures used to build the decode tree. Tested-by: Philippe Mathieu-Daudé --- target/hexagon/gen_dectree_import.c | 205 ++

[RFC PATCH v2 35/67] Hexagon TCG generation helpers - step 2

Helpers for load-locked/store-conditional Signed-off-by: Taylor Simpson --- target/hexagon/genptr_helpers.h | 52 + 1 file changed, 52 insertions(+) diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h index d8d5d95..c0e4c39

[RFC PATCH v2 37/67] Hexagon TCG generation helpers - step 4

Helpers referenced in macros.h Signed-off-by: Taylor Simpson --- target/hexagon/genptr_helpers.h | 67 + 1 file changed, 67 insertions(+) diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h index 0e2d7b9..9917d72 100644 --- a

[RFC PATCH v2 30/67] Hexagon opcode data structures

Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.h | 67 +++ target/hexagon/opcodes.c | 217 +++ 2 files changed, 284 insertions(+) create mode 100644 target/hexagon/opcodes.h create mode 100644 target/hexagon/opcodes.c diff

[RFC PATCH v2 41/67] Hexagon TCG generation - step 03

Override predicated load instructions Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 235 ++ 1 file changed, 235 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h index 6a69fc6..20d8584

[RFC PATCH v2 34/67] Hexagon TCG generation helpers - step 1

Helpers for reading and writing registers Helpers for getting and setting parts of values (e.g., set bit) Signed-off-by: Taylor Simpson --- target/hexagon/genptr_helpers.h | 337 1 file changed, 337 insertions(+) create mode 100644 target/hexagon

[RFC PATCH v2 01/67] Hexagon Maintainers

Add Taylor Simpson as the Hexagon target maintainer Signed-off-by: Taylor Simpson --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 36d94c1..85fc0ae 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -172,6 +172,14 @@ F: include/hw/cris/ F

[RFC PATCH v2 45/67] Hexagon TCG generation - step 07

Override dczeroa, allocframe, and return instructions Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 209 ++ 1 file changed, 209 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h index

[RFC PATCH v2 55/67] Hexagon HVX support in gdbstub

Signed-off-by: Taylor Simpson --- target/hexagon/gdbstub.c | 62 1 file changed, 62 insertions(+) diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c index e678aea..79a4f33 100644 --- a/target/hexagon/gdbstub.c +++ b/target/hexagon

[RFC PATCH v2 43/67] Hexagon TCG generation - step 05

Override predicated store instructions Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 54 +++ 1 file changed, 54 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h index fdcc517..a6cbce0

[RFC PATCH v2 08/67] Hexagon GDB Stub

GDB register read and write routines Signed-off-by: Taylor Simpson --- target/hexagon/cpu.c | 3 +++ target/hexagon/gdbstub.c | 49 2 files changed, 52 insertions(+) create mode 100644 target/hexagon/gdbstub.c diff --git a/target/hexagon

[RFC PATCH v2 39/67] Hexagon TCG generation - step 01

Include the generated files and set up the data structures Signed-off-by: Taylor Simpson --- target/hexagon/genptr.h | 25 + target/hexagon/genptr.c | 59 + 2 files changed, 84 insertions(+) create mode 100644 target/hexagon

[RFC PATCH v2 32/67] Hexagon macros referenced in instruction semantics

Signed-off-by: Taylor Simpson --- target/hexagon/macros.h | +++ 1 file changed, insertions(+) diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h index b8f8d9f..2101a01 100644 --- a/target/hexagon/macros.h +++ b/target/hexagon

[RFC PATCH v2 06/67] Hexagon Disassembler

The Hexagon disassembler calls disassemble_hexagon to decode a packet and format it for printing Signed-off-by: Taylor Simpson --- include/disas/dis-asm.h | 1 + disas/hexagon.c | 62 + disas/Makefile.objs | 1 + 3 files changed, 64

[RFC PATCH v2 51/67] Hexagon translation

Read the instruction memory Create a packet data structure Generate TCG code for the start of the packet Invoke the generate function for each instruction Generate TCG code for the end of the packet Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 82 + target/hexagon

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