RE: [PULL 00/11] Hexagon bug fixes and performance improvement

OK. I wasn't sure if performance improvements would be considered new features or not. Taylor > -Original Message- > From: Stefan Hajnoczi > Sent: Thursday, November 10, 2022 7:07 PM > To: Taylor Simpson > Cc: qemu-devel@nongnu.org; richard.hender...@linaro.org;

RE: [PULL 00/11] Hexagon bug fixes and performance improvement

> -Original Message- > From: Stefan Hajnoczi > Sent: Tuesday, November 15, 2022 10:52 AM > To: Taylor Simpson > Cc: qemu-devel@nongnu.org; richard.hender...@linaro.org; > phi...@linaro.org; peter.mayd...@linaro.org; Brian Cain > ; Matheus Bernardino (QUIC) &g

RE: [PATCH for-8.0 05/19] target/hexagon: Convert to 3-phase reset

> -Original Message- > From: Peter Maydell > Sent: Thursday, November 24, 2022 5:50 AM > To: qemu-devel@nongnu.org > Cc: Peter Maydell ; Michael Rolnik > ; Edgar E. Iglesias ; Taylor > Simpson ; Song Gao ; > Xiaojuan Yang ; Laurent Vivier > ; Philippe Mathi

RE: hexagon docker test failure

> -Original Message- > From: Richard Henderson > Sent: Tuesday, July 26, 2022 10:41 AM > To: Taylor Simpson > Cc: qemu-devel > Subject: hexagon docker test failure > > Hi Taylor, > > One of your recent hexagon testsuite changes is incompatible with the &

RE: hexagon docker test failure

> -Original Message- > From: Richard Henderson > Sent: Tuesday, July 26, 2022 11:42 AM > To: Taylor Simpson > Cc: qemu-devel > Subject: Re: hexagon docker test failure > > On 7/26/22 10:23, Taylor Simpson wrote: > > > >> -Original Me

[PATCH] Hexagon (tests/tcg/hexagon) add compiler options to EXTRA_CFLAGS

The cross_cc_cflags_hexagon in configure are not getting passed to the Hexagon cross compiler. Set EXTRA_CFLAGS in tests/tcg/hexagon/Makefile.target. Suggested-by: Richard Henderson Signed-off-by: Taylor Simpson --- tests/tcg/hexagon/Makefile.target | 1 + 1 file changed, 1 insertion(+) diff

RE: [PATCH] configure: pass correct cflags to container-based cross compilers

> -Original Message- > From: Richard Henderson > Sent: Thursday, July 28, 2022 5:11 PM > To: Paolo Bonzini ; qemu-devel@nongnu.org > Cc: Taylor Simpson > Subject: Re: [PATCH] configure: pass correct cflags to container-based cross > compilers > > On 7/28/22

[PULL 1/3] Hexagon (target/hexagon) make VyV operands use a unique temp

/hexagon/hvx_misc.c Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson Message-Id: <20220718230320.2-2-tsimp...@quicinc.com> --- tests/tcg/hexagon/hvx_misc.c| 45 + target/hexagon/gen_tcg_funcs.py | 9 +++ 2 files changed, 49 insertions

[PULL 0/3] Hexagon bug fixes and test improvements

2) Fixes a bug in a test case 3) Adds reference file for float_convd test case -------- Taylor Simpson (3): Hexagon (target/hexagon) make VyV operands use a unique temp Hexagon (tests/tcg/hexagon) Fix alignment in load_unpack.c

[PULL 2/3] Hexagon (tests/tcg/hexagon) Fix alignment in load_unpack.c

The increment used in :brev tests was causing unaligned addresses Change the increment and the relevant expected values Signed-off-by: Taylor Simpson Acked-by: Richard Henderson Message-Id: <20220718230320.2-3-tsimp...@quicinc.com> --- tests/tcg/hexagon/load_unpack.c | 14 +++

[PULL 3/3] Hexagon (tests/tcg/hexagon) reference file for float_convd

The test is in tests/tcg/multiarch/float_convd.c Signed-off-by: Taylor Simpson Acked-by: Richard Henderson Message-Id: <20220718230320.2-4-tsimp...@quicinc.com> --- tests/tcg/hexagon/float_convd.ref | 988 ++ 1 file changed, 988 insertions(+) create mode

RE: [PATCH v11 12/15] target/hexagon: prepare frontend for parser

> -Original Message- > From: Anton Johansson > Sent: Thursday, August 4, 2022 5:56 AM > To: qemu-devel@nongnu.org > Cc: a...@rev.ng; a...@rev.ng; bab...@rev.ng; ni...@rev.ng; Taylor Simpson > ; Brian Cain ; Michael Lambert > ; richard.hender...@linaro.org; >

[PATCH 2/9] Hexagon (target/hexagon) Mark new_read_idx in trans functions

Check that the value matches opcode_reginfo Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 3 ++- target/hexagon/decode.c | 2 ++ target/hexagon/mmvec/decode_ext_mmvec.c | 2 ++ target/hexagon/gen_trans_funcs.py | 15 ++- 4 files

[PATCH 6/9] Hexagon (target/hexagon) Remove uses of op_regs_generated.h.inc

Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.h| 4 -- target/hexagon/decode.c | 57 +++-- target/hexagon/mmvec/decode_ext_mmvec.c | 34 +++ target/hexagon/opcodes.c| 28 4 files changed, 13

[PATCH 7/9] Hexagon (target/hexagon) Remove gen_op_regs.py

Signed-off-by: Taylor Simpson --- target/hexagon/README | 1 - target/hexagon/gen_op_regs.py | 125 -- target/hexagon/meson.build| 14 +--- 3 files changed, 2 insertions(+), 138 deletions(-) delete mode 100755 target/hexagon/gen_op_regs.py diff

[PATCH 0/9] Hexagon (target/hexagon) Clean up .new decode and scripts

remove the script and meson.build code that creates shortcode_generated.h.inc. The data structure that includes it is not used. We remove hex_common.read_attribs_file. The Python data structures built during this step are not used. Taylor Simpson (9): Hexagon (target/hexagon) Add is_old/is_new

[PATCH 9/9] Hexagon (target/hexagon) Remove hex_common.read_attribs_file

The attribinfo data structure is not used Adjust the command-line arguments to the python scripts Add hex_common.read_common_files for TCG/helper generation scripts Signed-off-by: Taylor Simpson --- target/hexagon/gen_analyze_funcs.py | 21 ++- target/hexagon/gen_helper_funcs.py

[PATCH 3/9] Hexagon (target/hexagon) Mark dest_idx in trans functions

Check that the value matches opcode_reginfo/opcode_wregs Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 1 + target/hexagon/decode.c | 2 ++ target/hexagon/mmvec/decode_ext_mmvec.c | 2 ++ target/hexagon/gen_trans_funcs.py | 4 4 files

[PATCH 1/9] Hexagon (target/hexagon) Add is_old/is_new to Register class

Signed-off-by: Taylor Simpson --- target/hexagon/hex_common.py | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index 195620c7ec..4bacef223f 100755 --- a/target/hexagon/hex_common.py +++ b/target

[PATCH 4/9] Hexagon (target/hexagon) Mark has_pred_dest in trans functions

Check that the value matches opcode_wregs Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 1 + target/hexagon/decode.c | 3 +++ target/hexagon/gen_trans_funcs.py | 4 3 files changed, 8 insertions(+) diff --git a/target/hexagon/insn.h b/target/hexagon

[PATCH 8/9] Hexagon (target/hexagon) Remove gen_shortcode.py

This data structure is not used Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.c| 7 target/hexagon/README | 1 - target/hexagon/gen_shortcode.py | 63 - target/hexagon/meson.build | 10 -- 4 files changed, 81 deletions

[PATCH 5/9] Hexagon (tests/tcg/hexagon) Test HVX .new read from high half of pair

Make sure the decoding of HVX .new is correctly handling this case Signed-off-by: Taylor Simpson --- tests/tcg/hexagon/hvx_misc.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/tests/tcg/hexagon/hvx_misc.c b/tests/tcg/hexagon/hvx_misc.c index b45170acd1

[PATCH v2 7/9] Hexagon (target/hexagon) Remove gen_op_regs.py

Signed-off-by: Taylor Simpson --- target/hexagon/README | 1 - target/hexagon/gen_op_regs.py | 125 -- target/hexagon/meson.build| 14 +--- 3 files changed, 2 insertions(+), 138 deletions(-) delete mode 100755 target/hexagon/gen_op_regs.py diff

[PATCH v2 0/9] Clean up .new decode and scripts

Bernardino Mark Philippe's Reviewed-by on patch 01 Update example comment in gen_trans_funcs.py Taylor Simpson (9): Hexagon (target/hexagon) Add is_old/is_new to Register class Hexagon (target/hexagon) Mark new_read_idx in trans functions Hexagon (target/hexagon) Mark dest_idx in

[PATCH v2 6/9] Hexagon (target/hexagon) Remove uses of op_regs_generated.h.inc

Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.h| 4 -- target/hexagon/decode.c | 57 +++-- target/hexagon/mmvec/decode_ext_mmvec.c | 34 +++ target/hexagon/opcodes.c| 28 4 files changed, 13

[PATCH v2 5/9] Hexagon (tests/tcg/hexagon) Test HVX .new read from high half of pair

Make sure the decoding of HVX .new is correctly handling this case Signed-off-by: Taylor Simpson --- tests/tcg/hexagon/hvx_misc.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/tests/tcg/hexagon/hvx_misc.c b/tests/tcg/hexagon/hvx_misc.c index b45170acd1

[PATCH v2 4/9] Hexagon (target/hexagon) Mark has_pred_dest in trans functions

Check that the value matches opcode_wregs Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 1 + target/hexagon/decode.c | 3 +++ target/hexagon/gen_trans_funcs.py | 5 + 3 files changed, 9 insertions(+) diff --git a/target/hexagon/insn.h b/target/hexagon

[PATCH v2 1/9] Hexagon (target/hexagon) Add is_old/is_new to Register class

Signed-off-by: Taylor Simpson Reviewed-by: Philippe Mathieu-Daudé --- target/hexagon/hex_common.py | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index 195620c7ec..4bacef223f 100755 --- a/target

[PATCH v2 2/9] Hexagon (target/hexagon) Mark new_read_idx in trans functions

Check that the value matches opcode_reginfo Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 3 ++- target/hexagon/decode.c | 2 ++ target/hexagon/mmvec/decode_ext_mmvec.c | 2 ++ target/hexagon/gen_trans_funcs.py | 15 ++- 4 files

[PATCH v2 9/9] Hexagon (target/hexagon) Remove hex_common.read_attribs_file

The attribinfo data structure is not used Adjust the command-line arguments to the python scripts Add hex_common.read_common_files for TCG/helper generation scripts Signed-off-by: Taylor Simpson --- target/hexagon/gen_analyze_funcs.py | 21 ++- target/hexagon/gen_helper_funcs.py

[PATCH v2 3/9] Hexagon (target/hexagon) Mark dest_idx in trans functions

Check that the value matches opcode_reginfo/opcode_wregs Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 1 + target/hexagon/decode.c | 2 ++ target/hexagon/mmvec/decode_ext_mmvec.c | 2 ++ target/hexagon/gen_trans_funcs.py | 6 ++ 4 files

[PATCH v2 8/9] Hexagon (target/hexagon) Remove gen_shortcode.py

This data structure is not used Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.c| 7 target/hexagon/README | 1 - target/hexagon/gen_shortcode.py | 63 - target/hexagon/meson.build | 10 -- 4 files changed, 81 deletions

[PATCH v3 3/3] Hexagon (target/hexagon) Only pass env to generated helper when needed

d: 1543 total, 550 with env Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Tested-by: Anton Johansson --- target/hexagon/gen_tcg.h| 5 - target/hexagon/gen_helper_protos.py | 12 ++-- target/hexagon/hex_common.py| 23 ++- 3 fi

[PATCH v3 2/3] Hexagon (target/hexagon) Pass SP explicitly to helpers that need it

Rather than reading SP from the env, pass it explicitly Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Tested-by: Anton Johansson --- target/hexagon/macros.h | 2 +- target/hexagon/attribs_def.h.inc | 3 ++- target/hexagon/hex_common.py | 11 +++ 3 files

[PATCH v3 0/3] Hexagon (target/hexagon) Only pass env to generated helper when needed

in v2 - Separate patches to pass P0 and SP explicitly to helpers that need it - Add the TCG_CALL_NO_RWG_SE flag to any non-HVX helpers that don't get ptr to env Taylor Simpson (3): Hexagon (target/hexagon) Pass P0 explicitly to helpers that need it Hexagon (target/hexagon) Pa

[PATCH v3 1/3] Hexagon (target/hexagon) Pass P0 explicitly to helpers that need it

Rather than reading P0 from the env, pass it explicitly Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Tested-by: Anton Johansson --- target/hexagon/macros.h | 4 ++-- target/hexagon/hex_common.py | 12 +++- 2 files changed, 13 insertions(+), 3 deletions(-) diff

[PATCH v2 1/3] Hexagon (target/hexagon) Analyze reads before writes

analysis for short-circuiting the packet semantics in a subsequent commit Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 26 +++- target/hexagon/README | 9 +++-- target/hexagon/gen_analyze_funcs.py | 34 ++-- target/hexagon/hex_common.py

[PATCH v2 0/3] Hexagon (target/hexagon) Enable more short-circuit packets

patch https://lists.gnu.org/archive/html/qemu-devel/2023-12/msg01211.html Taylor Simpson (3): Hexagon (target/hexagon) Analyze reads before writes Hexagon (target/hexagon) Enable more short-circuit packets (scalar core) Hexagon (target/hexagon) Enable more short-circuit packets (HVX

[PATCH v2 2/3] Hexagon (target/hexagon) Enable more short-circuit packets (scalar core)

$0x7f976443 Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 13 +++-- target/hexagon/translate.c | 21 - 2 files changed, 11 insertions(+), 23 deletions(-) diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h index f06d71fc53

[PATCH v2 3/3] Hexagon (target/hexagon) Enable more short-circuit packets (HVX)

Look for read-after-write instead of overlap of reads and writes HVX instructions with helpers have pass-by-reference semantics, so we check for overlaps of reads and writes within the same instruction. Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 88

[PATCH] Hexagon (target/hexagon) Only pass env to generated helper when needed

ition" error from the compiler, so we write overrides for them. With this change, the number of helpers with env argument is idef-parser enabled:329 total, 23 with env idef-parser disabled: 1543 total, 553 with env Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h

[PATCH v2 0/3] Hexagon (target/hexagon) Only pass env to generated helper when needed

TCG_CALL_NO_RWG_SE flag to any non-HVX helpers that don't get ptr to env Taylor Simpson (3): Hexagon (target/hexagon) Pass P0 explicitly to helpers that need it Hexagon (target/hexagon) Pass SP explicitly to helpers that need it Hexagon (target/hexagon) Only pass env to generated helper when n

[PATCH v2 3/3] Hexagon (target/hexagon) Only pass env to generated helper when needed

d: 1543 total, 550 with env Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h| 3 +++ target/hexagon/gen_helper_protos.py | 10 +- target/hexagon/hex_common.py| 23 ++- 3 files changed, 30 insertions(+), 6 deletions(-) diff --git a

[PATCH v2 2/3] Hexagon (target/hexagon) Pass SP explicitly to helpers that need it

Rather than reading SP from the env, pass it explicitly Signed-off-by: Taylor Simpson --- target/hexagon/macros.h | 2 +- target/hexagon/attribs_def.h.inc | 1 + target/hexagon/hex_common.py | 11 +++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/target

[PATCH v2 1/3] Hexagon (target/hexagon) Pass P0 explicitly to helpers that need it

Rather than reading P0 from the env, pass it explicitly Signed-off-by: Taylor Simpson --- target/hexagon/macros.h | 2 +- target/hexagon/hex_common.py | 10 ++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h index

RE: QEMU for Qualcomm Hexagon - KVM Forum talk and code available

to common code. The implication of having the common code changes late is that code would compile and run only at the end of the series. Thanks, Taylor -Original Message- From: Qemu-devel On Behalf Of Taylor Simpson Sent: Thursday, November 14, 2019 6:54 PM To: Richard Henderson ; Ale

RE: [PATCH] Add minimal Hexagon target - First in a series of patches - linux-user changes + linux-user/hexagon + skeleton of target/hexagon - Files in target/hexagon/imported are from another project

When the other team makes changes to the code (either to fix bugs or add features), it will be easier to identify the changes and bring them into qemu. Taylor -Original Message- From: Aleksandar Markovic Sent: Thursday, November 21, 2019 1:20 PM To: Taylor Simpson Cc: Laurent Vivier ;

RE: [PATCH] Add minimal Hexagon target - First in a series of patches - linux-user changes + linux-user/hexagon + skeleton of target/hexagon - Files in target/hexagon/imported are from another project

considered the gold standard - more so than the PDF manual. Any changes to that code, including reformatting, would put qemu at risk of not accurately emulating the processor. Taylor -Original Message- From: Aleksandar Markovic Sent: Thursday, November 21, 2019 2:45 PM To: Taylor S

RE: [PATCH 0/4] linux-user: fix use of SIGRTMIN

l@nongnu.org > Cc: Josh Kunz ; milos.stojano...@rt-rk.com; Matus Kysel > ; Aleksandar Markovic rk.com>; Marlies Ruck ; Laurent Vivier > ; Peter Maydell ; Taylor > Simpson ; Riku Voipio > Subject: [PATCH 0/4] linux-user: fix use of SIGRTMIN > > This series fixes the problem of

RE: [PATCH 2/4] linux-user: cleanup signal.c

> -Original Message- > From: Laurent Vivier > Sent: Saturday, February 1, 2020 6:28 AM > To: qemu-devel@nongnu.org > Cc: Josh Kunz ; milos.stojano...@rt-rk.com; Matus Kysel > ; Aleksandar Markovic rk.com>; Marlies Ruck ; Laurent Vivier > ; Peter Maydell ;

RE: [PATCH 3/4] linux-user: fix TARGET_NSIG and _NSIG uses

> -Original Message- > From: Laurent Vivier > Sent: Saturday, February 1, 2020 6:28 AM > To: qemu-devel@nongnu.org > Cc: Josh Kunz ; milos.stojano...@rt-rk.com; Matus Kysel > ; Aleksandar Markovic rk.com>; Marlies Ruck ; Laurent Vivier > ; Peter Maydell ;

RE: [PATCH 4/4] linux-user: fix use of SIGRTMIN

> -Original Message- > From: Laurent Vivier > Sent: Saturday, February 1, 2020 6:28 AM > To: qemu-devel@nongnu.org > Cc: Josh Kunz ; milos.stojano...@rt-rk.com; Matus Kysel > ; Aleksandar Markovic rk.com>; Marlies Ruck ; Laurent Vivier > ; Peter Maydell ;

RE: [PATCH v2 4/4] linux-user: fix use of SIGRTMIN

Reviewed-by: Taylor Simson > -Original Message- > From: Laurent Vivier > Sent: Tuesday, February 4, 2020 11:11 AM > To: qemu-devel@nongnu.org > Cc: Peter Maydell ; Josh Kunz > ; Laurent Vivier ; Aleksandar > Markovic ; Matus Kysel > ; Riku Voipio ; Taylor Simpson

[PATCH] Add support for a helper with 7 arguments

Currently, helpers can only take up to 6 arguments. This patch adds the capability for up to 7 arguments. I have tested it with the Hexagon port that I am preparing for submission. Signed-off-by: Taylor Simpson --- include/exec/helper-gen.h | 13 + include/exec/helper-head.h

RE: [PATCH] Add support for a helper with 7 arguments

half Of Richard > Henderson > Sent: Thursday, February 6, 2020 4:29 AM > To: Taylor Simpson ; qemu-devel@nongnu.org > Cc: Paolo Bonzini > Subject: Re: [PATCH] Add support for a helper with 7 arguments > > -

RE: [PATCH] Add support for a helper with 7 arguments

> -Original Message- > From: Richard Henderson On Behalf Of Richard > Henderson > Sent: Thursday, February 6, 2020 9:35 AM > To: Taylor Simpson ; qemu-devel@nongnu.org > Cc: Paolo Bonzini > Subject: Re: [PATCH] Add support for a helper with 7 arguments > > &

RE: [PATCH] Add support for a helper with 7 arguments

> -Original Message- > From: Richard Henderson > Sent: Thursday, February 6, 2020 6:28 PM > To: Taylor Simpson ; Richard Henderson > ; qemu-devel@nongnu.org > Cc: Paolo Bonzini > Subject: Re: [PATCH] Add support for a helper with 7 arguments > > On 2/6/20 5:

RE: [PATCH] Add support for a helper with 7 arguments

> -Original Message- > From: Richard Henderson > Sent: Friday, February 7, 2020 2:53 AM > To: Taylor Simpson ; Richard Henderson > ; qemu-devel@nongnu.org > Cc: Paolo Bonzini > Subject: Re: [PATCH] Add support for a helper with 7 arguments > > On 2/7/20 4:

RE: [PATCH] Add support for a helper with 7 arguments

> -Original Message- > From: Richard Henderson > > But I encourage you to re-think your purely mechanical approach to the > hexagon > port. It seems to me that you should be doing much more during the > translation > phase so that you can minimize the number of helpers that you require.

RE: [PATCH] Add support for a helper with 7 arguments

> On 2/7/20 12:43 PM, Taylor Simpson wrote: > > > >> -Original Message- > >> From: Richard Henderson > >> > >> But I encourage you to re-think your purely mechanical approach to the > >> hexagon port. It seems to me that you should

RE: [PATCH] Add support for a helper with 7 arguments

> -Original Message- > From: Richard Henderson > Sent: Sunday, February 9, 2020 12:18 PM > To: Taylor Simpson ; Richard Henderson > ; qemu-devel@nongnu.org > Cc: Paolo Bonzini > Subject: Re: [PATCH] Add support for a helper with 7 arguments > We can optimiz

RE: [PATCH] Add support for a helper with 7 arguments

> -Original Message- > From: Taylor Simpson > Sent: Sunday, February 9, 2020 2:51 PM > To: Richard Henderson ; Richard Henderson > ; qemu-devel@nongnu.org > Cc: Paolo Bonzini > Subject: RE: [PATCH] Add support for a helper with 7 arguments > > > How

[RFC PATCH 01/66] Hexagon Maintainers

Add Taylor Simpson as the Hexagon target maintainer Signed-off-by: Taylor Simpson --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index e72b5e5..f48c564 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -172,6 +172,14 @@ F: include/hw/cris/ F

[RFC PATCH 20/66] Hexagon generator phase 1 - C preprocessor for semantics

each macro. Signed-off-by: Taylor Simpson --- target/hexagon/gen_semantics.c | 92 ++ 1 file changed, 92 insertions(+) create mode 100644 target/hexagon/gen_semantics.c diff --git a/target/hexagon/gen_semantics.c b/target/hexagon/gen_semantics.c new file

[RFC PATCH 02/66] Hexagon ELF Machine Definition

Define EM_HEXAGON 164 Signed-off-by: Taylor Simpson --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h b/include/elf.h index 8fbfe60..d51e7d4 100644 --- a/include/elf.h +++ b/include/elf.h @@ -170,6 +170,8 @@ typedef struct mips_elf_abiflags_v0 { #define

[RFC PATCH 23/66] Hexagon generator phase 2 - opcodes_def_generated.h

Gives a list of all the opcodes Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 12 1 file changed, 12 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index 43acdd7..5439964 100755 --- a/target/hexagon/do_qemu.py +++ b/target/hexagon

[RFC PATCH 07/66] Hexagon GDB Stub

GDB register read and write routines Signed-off-by: Taylor Simpson --- target/hexagon/cpu.c | 3 +++ target/hexagon/gdbstub.c | 49 2 files changed, 52 insertions(+) create mode 100644 target/hexagon/gdbstub.c diff --git a/target/hexagon

[RFC PATCH 12/66] Hexagon register map

Certain operand types represent a non-contiguous set of values. For example, the compound compare-and-jump instruction can only access registers R0-R7 and R16-23. This table represents the mapping from the encoding to the actual values. Signed-off-by: Taylor Simpson --- target/hexagon/regmap.h

[RFC PATCH 04/66] Hexagon register names

Signed-off-by: Taylor Simpson --- target/hexagon/hex_regs.h | 97 +++ 1 file changed, 97 insertions(+) create mode 100644 target/hexagon/hex_regs.h diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h new file mode 100644 index 000

[RFC PATCH 09/66] Hexagon architecture types

Define types used in files imported from the Hexagon architecture library Signed-off-by: Taylor Simpson --- target/hexagon/hex_arch_types.h | 42 + 1 file changed, 42 insertions(+) create mode 100644 target/hexagon/hex_arch_types.h diff --git a/target

[RFC PATCH 05/66] Hexagon Disassembler

The Hexagon disassembler calls disassemble_hexagon to decode a packet and format it for printing Signed-off-by: Taylor Simpson --- disas/Makefile.objs | 1 + disas/hexagon.c | 56 + include/disas/dis-asm.h | 1 + 3 files changed, 58

[RFC PATCH 14/66] Hexagon instruction printing

Signed-off-by: Taylor Simpson --- target/hexagon/printinsn.c | 93 ++ target/hexagon/printinsn.h | 26 + 2 files changed, 119 insertions(+) create mode 100644 target/hexagon/printinsn.c create mode 100644 target/hexagon/printinsn.h diff

[RFC PATCH 24/66] Hexagon generator phase 2 - op_attribs_generated.h

Lists all the attributes associated with each instruction Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 13 + 1 file changed, 13 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index 5439964..f297931 100755 --- a/target/hexagon

[RFC PATCH 10/66] Hexagon register fields

Declare bitfields within registers such as user status register (USR) Signed-off-by: Taylor Simpson --- target/hexagon/reg_fields.c | 28 +++ target/hexagon/reg_fields.h | 40 +++ target/hexagon/reg_fields_def.h | 109 3

[RFC PATCH 22/66] Hexagon generator phase 2 - qemu_wrap_generated.h

Gives a default definition of fWRAP_ for each instruction Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 14 ++ 1 file changed, 14 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index 992dbc3..43acdd7 100755 --- a/target/hexagon

[RFC PATCH 03/66] Hexagon CPU Scalar Core Definition

Add CPU state header, CPU definitions and initialization routines Signed-off-by: Taylor Simpson --- target/hexagon/cpu-param.h | 26 target/hexagon/cpu.c | 304 + target/hexagon/cpu.h | 165 target/hexagon

[RFC PATCH 26/66] Hexagon generator phase 2 - printinsn-generated.h

Data for printing (disassembling) each instruction (format string + operands) Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 151 ++ 1 file changed, 151 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py

[RFC PATCH 21/66] Hexagon generator phase 2 - qemu_def_generated.h

For each instruction we create DEF_HELPER function prototype TCG code to generate call to helper Helper definition Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 773 ++ 1 file changed, 773 insertions(+) create mode 100755

[RFC PATCH 18/66] Hexagon instruction class definitions

Imported from the Hexagon architecture library Signed-off-by: Taylor Simpson --- target/hexagon/imported/iclass.def | 52 ++ 1 file changed, 52 insertions(+) create mode 100644 target/hexagon/imported/iclass.def diff --git a/target/hexagon/imported

[RFC PATCH 25/66] Hexagon generator phase 2 - op_regs_generated.h

Lists the register and immediate operands for each instruction Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 86 +++ 1 file changed, 86 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index f297931

[RFC PATCH 36/66] Hexagon TCG generation helpers - step 4

Helpers referenced in macros.h Signed-off-by: Taylor Simpson --- target/hexagon/genptr_helpers.h | 67 + 1 file changed, 67 insertions(+) diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h index 27f965a..85b449a 100644 --- a

[RFC PATCH 11/66] Hexagon instruction attributes

Signed-off-by: Taylor Simpson --- target/hexagon/attribs.h | 32 target/hexagon/attribs_def.h | 404 +++ 2 files changed, 436 insertions(+) create mode 100644 target/hexagon/attribs.h create mode 100644 target/hexagon/attribs_def.h diff --git

[RFC PATCH 08/66] Hexagon instruction and packet types

The insn_t and packet_t are the interface between instruction decoding and TCG code generation Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 133 ++ 1 file changed, 133 insertions(+) create mode 100644 target/hexagon/insn.h diff

[RFC PATCH 29/66] Hexagon opcode data structures

Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.c | 223 +++ target/hexagon/opcodes.h | 67 ++ 2 files changed, 290 insertions(+) create mode 100644 target/hexagon/opcodes.c create mode 100644 target/hexagon/opcodes.h diff

[RFC PATCH 13/66] Hexagon instruction/packet decode

extenders Separate subinsn's into two instructions Break compare-jumps into two instructions Create instructions for :endloop Signed-off-by: Taylor Simpson --- target/hexagon/decode.c | 773 target/hexagon/decode.h | 39 +++ t

[RFC PATCH 06/66] Hexagon CPU Scalar Core Helpers

The majority of helpers are generated. Define the helper functions needed then include the generated file Signed-off-by: Taylor Simpson --- target/hexagon/helper.h| 37 target/hexagon/op_helper.c | 432 + 2 files changed, 469 insertions

[RFC PATCH 39/66] Hexagon TCG generation - step 02

Override load instructions Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c | 1 + target/hexagon/helper_overrides.h | 404 ++ 2 files changed, 405 insertions(+) create mode 100644 target/hexagon/helper_overrides.h diff --git a/target

[RFC PATCH 43/66] Hexagon TCG generation - step 06

Override memop instructions Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 60 +++ 1 file changed, 60 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h index 9791d33..f023442 100644 --- a

[RFC PATCH 46/66] Hexagon TCG generation - step 09

Override instructions to speed up qemu Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 97 +++ 1 file changed, 97 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h index e544dd5..52e4a47

[RFC PATCH 00/66] Hexagon patch series

cture-niccolo-izzo-revng-taylor-simpson-qualcomm-innovation-center The patches up to and including "Hexagon build infractructure" implement the base Hexagon core and the remainder add HVX. Once the build infrastructure patch is applied, you can build and qemu will execute non-HVX Hexagon progr

[RFC PATCH 49/66] Hexagon TCG generation - step 12

Override miscellaneous instructions identified during profiling Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 296 ++ 1 file changed, 296 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon

[RFC PATCH 28/66] Hexagon generater phase 4 - Decode tree

Python script that emits the decode tree in dectree_generated.h. Signed-off-by: Taylor Simpson --- target/hexagon/dectree.py | 354 ++ 1 file changed, 354 insertions(+) create mode 100755 target/hexagon/dectree.py diff --git a/target/hexagon

[RFC PATCH 45/66] Hexagon TCG generation - step 08

Override mathematical operations with more than one definition Signed-off-by: Taylor Simpson --- target/hexagon/helper_overrides.h | 30 ++ 1 file changed, 30 insertions(+) diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h index

[RFC PATCH 16/66] Hexagon arch import - macro definitions

Imported from the Hexagon architecture library imported/macros.def Scalar core macro definitions The macro definition files specify instruction attributes that are applied to each instruction that reverences the macro. Signed-off-by: Taylor Simpson --- target/hexagon/imported

[RFC PATCH 53/66] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition

HVX is a set of wide vector instructions. Machine state includes vector registers (VRegs) vector predicate registers (QRegs) temporary registers for packet semantics store buffer (masked stores and scatter/gather) Signed-off-by: Taylor Simpson --- target/hexagon/cpu.c

[RFC PATCH 33/66] Hexagon TCG generation helpers - step 1

Helpers for reading and writing registers Helpers for getting and setting parts of values (e.g., set bit) Signed-off-by: Taylor Simpson --- target/hexagon/genptr_helpers.h | 323 1 file changed, 323 insertions(+) create mode 100644 target/hexagon

[RFC PATCH 66/66] Hexagon HVX build infrastructure

Signed-off-by: Taylor Simpson --- target/hexagon/Makefile.objs | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/target/hexagon/Makefile.objs b/target/hexagon/Makefile.objs index efcf510..3ff59e4 100644 --- a/target/hexagon/Makefile.objs +++ b/target/hexagon

[RFC PATCH 35/66] Hexagon TCG generation helpers - step 3

Helpers for store instructions Signed-off-by: Taylor Simpson --- target/hexagon/genptr_helpers.h | 77 + 1 file changed, 77 insertions(+) diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h index b780522..27f965a 100644 --- a

[RFC PATCH 51/66] Hexagon Linux user emulation

Implementation of Linux user emulation for RISC-V Some common files modified in addition to new files in linux-user/hexagon Signed-off-by: Taylor Simpson --- linux-user/elfload.c| 16 ++ linux-user/hexagon/cpu_loop.c | 173 ++ linux-user/hexagon/signal.c

[RFC PATCH 64/66] Hexagon HVX TCG generation

Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c | 1 + target/hexagon/genptr_helpers.h | 189 2 files changed, 190 insertions(+) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 30319b5..3da0018 100644 --- a/target

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