Re: [PATCH 1/5] hw/arm/smmuv3: Apply address mask to linear strtab base address

Hello Eric, On 05/12/2019 09:42, Auger Eric wrote: > Not related to this patch but I noticed SMMU_BASE_ADDR_MASK should be > 0xffc0 and not 0xffe0. I can fix it separately or if you > respin, you may fix it as well? Good catch, thank you. I'll fix it in the next version. Looking

[PATCH v2 0/6] hw/arm/smmuv3: Correct stream ID and event address handling

an incorrect position. These patches correct the QEMU SMMUv3 behavior to match the specification (and the behavior that I observed in our hardware). Linux guests normally will not notice these issues, but other SMMUv3 driver implementations might. Simon Veith (6): hw/arm/smmuv3: Apply address

[PATCH v2 1/6] hw/arm/smmuv3: Apply address mask to linear strtab base address

stream ID space. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Acked-by: Eric Auger --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index

[PATCH v2 2/6] hw/arm/smmuv3: Correct SMMU_BASE_ADDR_MASK value

be explicitly treated as zero. Update the SMMU_BASE_ADDR_MASK value to mask out bits [63:52] and [5:0]. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- hw/arm/smmuv3-internal.h | 2 +- 1 file changed, 1

[PATCH v2 5/6] hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro

0070C, sections 7.3.12 through 7.3.16. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Acked-by: Eric Auger --- hw/arm/smmuv3-internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3

[PATCH v2 3/6] hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE

: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- Changed in v2: * Also check that stream ID is strictly lower than the table size hw/arm/smmuv3.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index

[PATCH v2 4/6] hw/arm/smmuv3: Align stream table base address to table size

0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- Changed in v2: * Now using MAKE_64BIT_MASK() * Eliminated unnecessary branches by using MAX() * Removed unnecessary range check against DMA_ADDR_BITS hw/arm/smmuv3.c | 18

[PATCH v2 6/6] hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position

the EVT_SET_ADDR2 macro instead, which is the macro intended for writing to these words. ref. ARM IHI 0070C, section 7.3.4. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Acked-by: Eric Auger --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion

[PATCH v3 2/6] hw/arm/smmuv3: Correct SMMU_BASE_ADDR_MASK value

be explicitly treated as zero. Update the SMMU_BASE_ADDR_MASK value to mask out bits [63:52] and [5:0]. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- hw/arm/smmuv3-internal.h | 2 +- 1 file changed, 1

[PATCH v3 4/6] hw/arm/smmuv3: Align stream table base address to table size

0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- Changed in v2: * Now using MAKE_64BIT_MASK() * Eliminated unnecessary branches by using MAX() * Removed unnecessary range check against DMA_ADDR_BITS hw/arm/smmuv3.c | 18

[PATCH v3 1/6] hw/arm/smmuv3: Apply address mask to linear strtab base address

stream ID space. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Acked-by: Eric Auger --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index

[PATCH v3 0/6] hw/arm/smmuv3: Correct stream ID and event address handling

mission mishap that confused Patchew Simon Veith (6): hw/arm/smmuv3: Apply address mask to linear strtab base address hw/arm/smmuv3: Correct SMMU_BASE_ADDR_MASK value hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE hw/arm/smmuv3: Align stream table base address to table size

[PATCH v3 6/6] hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position

the EVT_SET_ADDR2 macro instead, which is the macro intended for writing to these words. ref. ARM IHI 0070C, section 7.3.4. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Acked-by: Eric Auger --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion

[PATCH v3 3/6] hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE

: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- Changed in v2: * Also check that stream ID is strictly lower than the table size hw/arm/smmuv3.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index

[PATCH v3 5/6] hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro

0070C, sections 7.3.12 through 7.3.16. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Acked-by: Eric Auger --- hw/arm/smmuv3-internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3

[PATCH 1/5] hw/arm/smmuv3: Apply address mask to linear strtab base address

stream ID space. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index e2fbb83..eef9a18

[PATCH 0/5] hw/arm/smmuv3: Correct stream ID and event address handling

an incorrect position. These patches correct the QEMU SMMUv3 behavior to match the specification (and the behavior that I observed in our hardware). Linux guests normally will not notice these issues, but other SMMUv3 driver implementations might. Simon Veith (5): hw/arm/smmuv3: Apply address

[PATCH 4/5] hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro

0070C, sections 7.3.12 through 7.3.16. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- hw/arm/smmuv3-internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index d190181

[PATCH 2/5] hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE

this limit as well to match the hardware behavior of raising C_BAD_STREAMID events in case the limit is exceeded. ref. ARM IHI 0070C, section 6.3.24. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- hw/arm/smmuv3.c | 8 ++-- 1 file changed, 6

[PATCH 3/5] hw/arm/smmuv3: Align stream table base address to table size

0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- hw/arm/smmuv3.c | 29 + 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index aad4639..2d6c275

[PATCH 5/5] hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position

the EVT_SET_ADDR2 macro instead, which is the macro intended for writing to these words. ref. ARM IHI 0070C, section 7.3.4. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff