roduce machine capability cap-dawr1 to enable/disable
the feature. By default, 2nd DAWR is OFF for guests even
when host kvm supports it. User has to manually enable it
with -machine cap-dawr1=on if he wishes to use it.
- Split the header file changes into separate patch. (Sync
heade
ature bit in guest DT using cap-dawr1 machine capability.
Signed-off-by: Ravi Bangoria
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr.c |7 ++-
hw/ppc/spapr_caps.c| 36
hw/ppc/spapr_hcall.c | 25 -
include/h
Extend the existing watchpoint facility from TCG DAWR0 emulation
to DAWR1 on POWER10.
Signed-off-by: Shivaprasad G Bhat
---
target/ppc/cpu.c | 45 --
target/ppc/cpu.h |8 +-
target/ppc/cpu_init.c| 15 +++
target/ppc
Thanks for the review Nick!
On 1/23/24 17:36, Nicholas Piggin wrote:
On Wed Nov 22, 2023 at 5:32 PM AEST, Shivaprasad G Bhat wrote:
Extend the existing watchpoint facility from TCG DAWR0 emulation
to DAWR1 on POWER10.
As per the PAPR, bit 0 of byte 64 in pa-features property
indicates
ener into spapr container)"
Signed-off-by: Shivaprasad G Bhat
---
hw/vfio/container.c |6 --
hw/vfio/spapr.c |6 --
include/hw/vfio/vfio-common.h |6 ++
3 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/hw/vfio/container.c b/hw/vf
different values.
- Addressed comments for v1
Shivaprasad G Bhat (3):
mem: make nvdimm_device_list global
spapr: Add NVDIMM device support
spapr: Add Hcalls to support PAPR NVDIMM device
default-configs/ppc64-softmmu.mak |1
hw/acpi/nvdimm.c | 27
nvdimm_device_list is required for parsing the list for devices
in subsequent patches. Move it to common area.
Signed-off-by: Shivaprasad G Bhat
Reviewed-By: Igor Mammedov
---
This looks to break the mips*-softmmu build.
The mips depend on CONFIG_NVDIMM_ACPI, adding CONFIG_NVDIMM looks wrong
monitor as below
object_add
memory-backend-file,id=memnvdimm0,prealloc=yes,mem-path=/tmp/nvdimm0,share=yes,size=1073872896
device_add
nvdimm,label-size=128k,uuid=75a3cdd7-6a2f-4791-8d15-fe0a920e8e9e,memdev=memnvdimm0,id=nvdimm0,slot=0
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Bharata B
for a subset of SCM blocks of a
virtual NVDIMM. Hence it is safe to do bind/unbind everything during the
object_add/del.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_hcall.c | 202
include/hw/ppc/spapr.h |7 +-
2 files changed
for v1
Shivaprasad G Bhat (3):
mem: move nvdimm_device_list to utilities
spapr: Add NVDIMM device support
spapr: Add Hcalls to support PAPR NVDIMM device
default-configs/ppc64-softmmu.mak |1
hw/acpi/nvdimm.c | 28 ---
hw/mem/Kconfig
nvdimm_device_list is required for parsing the list for devices
in subsequent patches. Move it to common utility area.
Signed-off-by: Shivaprasad G Bhat
---
hw/acpi/nvdimm.c| 28 +---
include/qemu/nvdimm-utils.h |7 +++
util/Makefile.objs
-backend-file,id=memnvdimm0,prealloc=yes,mem-path=/tmp/nvdimm0,share=yes,size=1073872896
device_add
nvdimm,label-size=128k,uuid=75a3cdd7-6a2f-4791-8d15-fe0a920e8e9e,memdev=memnvdimm0,id=nvdimm0,slot=0
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Bharata B Rao
[Early
for a
subset of SCM blocks of a virtual NVDIMM. Hence it is safe to do
bind/unbind everything during the device_add/del.
Signed-off-by: Shivaprasad G Bhat
---
---
hw/ppc/spapr_hcall.c | 300
include/hw/ppc/spapr.h |8 +
2 files changed
On 12/06/2019 07:22 AM, David Gibson wrote:
On Wed, Nov 27, 2019 at 09:50:54AM +0530, Bharata B Rao wrote:
On Fri, Nov 22, 2019 at 10:42 AM David Gibson
wrote:
Ok. A number of queries about this.
1) The PAPR spec for ibm,dynamic-memory-v2 says that the first word in
each entry is the numbe
On 12/11/2019 01:35 PM, Igor Mammedov wrote:
On Wed, 11 Dec 2019 09:44:11 +0530
Shivaprasad G Bhat wrote:
On 12/06/2019 07:22 AM, David Gibson wrote:
On Wed, Nov 27, 2019 at 09:50:54AM +0530, Bharata B Rao wrote:
On Fri, Nov 22, 2019 at 10:42 AM David Gibson
wrote:
Ok. A number of
Hi David,
On 11/22/2019 10:00 AM, David Gibson wrote:
On Mon, Oct 14, 2019 at 01:37:50PM -0500, Shivaprasad G Bhat wrote:
---
index 62f1a42592..815167e42f 100644
--- a/hw/ppc/spapr_drc.c
+++ b/hw/ppc/spapr_drc.c
@@ -708,6 +708,17 @@ static void spapr_drc_phb_class_init(ObjectClass *k, void
Hi David,
On 11/22/2019 10:41 AM, David Gibson wrote:
On Mon, Oct 14, 2019 at 01:38:16PM -0500, Shivaprasad G Bhat wrote:
device_add/del phase itself instead.
The guest kernel makes bind/unbind requests for the virtual NVDIMM device
at the region level granularity. Without interleaving, each
nvdimm_device_list is required for parsing the list for devices
in subsequent patches. Move it to common utility area.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Igor Mammedov
---
hw/acpi/nvdimm.c| 28 +---
include/qemu/nvdimm-utils.h |7
-backend-file,id=memnvdimm0,prealloc=yes,mem-path=/tmp/nvdimm0,share=yes,size=1073872896
device_add
nvdimm,label-size=128k,uuid=75a3cdd7-6a2f-4791-8d15-fe0a920e8e9e,memdev=memnvdimm0,id=nvdimm0,slot=0
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Bharata B Rao
[Early
safe to
do bind/unbind everything during the device_add/del.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/Makefile.objs |2
hw/ppc/spapr_nvdimm.c | 337
include/hw/ppc/spapr.h |8 +
3 files changed, 345 insertions(+), 2 dele
-implemented hcalls
- Changed the hcalls to different kinds of checks and return
different values.
- Addressed comments for v1
Shivaprasad G Bhat (4):
mem: move nvdimm_device_list to utilities
nvdimm: add uuid property to nvdimm
spapr: Add NVDIMM device support
For ppc64, PAPR requires the nvdimm device to have UUID property
set in the device tree. Add an option to get it from the user.
Signed-off-by: Shivaprasad G Bhat
---
hw/mem/nvdimm.c | 40
include/hw/mem/nvdimm.h |7 +++
2 files changed
On 02/04/2020 09:29 AM, David Gibson wrote:
On Thu, Jan 30, 2020 at 05:48:15AM -0600, Shivaprasad G Bhat wrote:
Add support for NVDIMM devices for sPAPR. Piggyback on existing nvdimm
device interface in QEMU to support virtual NVDIMM devices for Power.
Create the required DT entries for the
nvdimm_device_list is required for parsing the list for devices
in subsequent patches. Move it to common utility area.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Igor Mammedov
Reviewed-by: David Gibson
---
hw/acpi/nvdimm.c| 28 +---
include/qemu
different kinds of checks and return
different values.
- Addressed comments for v1
---
Shivaprasad G Bhat (4):
mem: move nvdimm_device_list to utilities
nvdimm: add uuid property to nvdimm
spapr: Add NVDIMM device support
spapr: Add Hcalls to support PAPR NVDIMM device
-backend-file,id=memnvdimm0,prealloc=yes,mem-path=/tmp/nvdimm0,share=yes,size=1073872896
device_add
nvdimm,label-size=128k,uuid=75a3cdd7-6a2f-4791-8d15-fe0a920e8e9e,memdev=memnvdimm0,id=nvdimm0,slot=0
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Bharata B Rao
[Early
For ppc64, PAPR requires the nvdimm device to have UUID property
set in the device tree. Add an option to get it from the user.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: David Gibson
Reviewed-by: Igor Mammedov
---
hw/mem/nvdimm.c | 40
safe to
do bind/unbind everything during the device_add/del.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_nvdimm.c | 298
include/hw/ppc/spapr.h |8 +
2 files changed, 305 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_nvdim
1ULL instead of signed int 1 like its
used everywhere else.
Signed-off-by: Shivaprasad G Bhat
---
target/ppc/translate/vmx-impl.c.inc |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 112233b541..c
sed in multiarch/sha1.c also this being arch specific
test, I think it is appropriate to use it here. Let me
know if otherwise.
References:
[1] : https://gitlab.com/qemu-project/qemu/-/issues/1536
---
Shivaprasad G Bhat (2):
tcg: ppc64: Fix mask generation for vextractdm
tests: tcg: ppc6
: Shivaprasad G Bhat
---
tests/tcg/ppc64/Makefile.target |6 -
tests/tcg/ppc64/vector.c| 50 +++
2 files changed, 55 insertions(+), 1 deletion(-)
create mode 100644 tests/tcg/ppc64/vector.c
diff --git a/tests/tcg/ppc64/Makefile.target b/tests
ttps://gitlab.com/lu-zero)
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
---
fpu/softfloat.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index c7454c3eb1a..108f9cb224a 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@
On 5/2/23 12:35, Cédric Le Goater wrote:
On 4/13/23 21:01, Shivaprasad G Bhat wrote:
Add test for vextractbm, vextractwm, vextractdm and vextractqm
instructions. Test works for both qemu-ppc64 and qemu-ppc64le.
Based on the test case written by John Platts posted at [1]
References:
[1]: https
Hi Richard,
On 5/3/23 01:11, Richard Henderson wrote:
On 5/2/23 16:25, Shivaprasad G Bhat wrote:
The float32_exp2() is computing wrong exponent of 2.
For example, with the following set of values {0.1, 2.0, 2.0, -1.0},
the expected output would be {1.071773, 4.00, 4.00, 0.50
1ULL instead of signed int 1 like its
used everywhere else.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1536
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Alex Bennée
Reviewed-by: Lucas Mateus Castro
Reviewed-by: Richard Henderson
---
target/ppc/translate/vmx-impl.c.inc |2 +-
1
BIG_ENDIAN from compiler.h
Shivaprasad G Bhat (2):
tcg: ppc64: Fix mask generation for vextractdm
tests: tcg: ppc64: Add tests for Vector Extract Mask Instructions
target/ppc/translate/vmx-impl.c.inc | 2 +-
tests/tcg/ppc64/Makefile.target | 6 +++-
tests/tcg/ppc6
-by: Shivaprasad G Bhat
Reviewed-by: Lucas Mateus Castro
---
tests/tcg/ppc64/Makefile.target |5 +++-
tests/tcg/ppc64/vector.c| 51 +++
2 files changed, 55 insertions(+), 1 deletion(-)
create mode 100644 tests/tcg/ppc64/vector.c
diff --git a/tests
be introduced in the
following patch.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr.c|2
hw/ppc/spapr_nvdimm.c | 263 +
include/hw/ppc/spapr.h|4 -
include/hw/ppc/spapr_nvdimm.h |1
4 files changed,
Hi David,
Thanks for comments. Sorry about the delay. Replies inline.
On 9/21/21 11:53, David Gibson wrote:
On Wed, Jul 07, 2021 at 09:57:21PM -0500, Shivaprasad G Bhat wrote:
The patch adds support for the SCM flush hcall for the nvdimm devices.
To be available for exploitation by guest
On 9/21/21 12:02, David Gibson wrote:
On Wed, Jul 07, 2021 at 09:57:31PM -0500, Shivaprasad G Bhat wrote:
If the device backend is not persistent memory for the nvdimm, there is
need for explicit IO flushes on the backend to ensure persistence.
On SPAPR, the issue is addressed by adding a
- Fixed a missed-out unlock
- using QLIST_FOREACH instead of QLIST_FOREACH_SAFE while generating token
Shivaprasad G Bhat (3):
nvdimm: Add realize, unrealize callbacks to NVDIMMDevice class
spapr: nvdimm: Implement H_SCM_FLUSH hcall
spapr: nvdimm: Introduce spapr-nvdim
A new subclass inheriting NVDIMMDevice is going to be introduced in
subsequent patches. The new subclass uses the realize and unrealize
callbacks. Add them on NVDIMMClass to appropriately call them as part
of plug-unplug.
Signed-off-by: Shivaprasad G Bhat
---
hw/mem/nvdimm.c | 16
es with failures.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_nvdimm.c | 131 +
1 file changed, 131 insertions(+)
diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c
index ed6fda2c23..8aa6214d6b 100644
--- a/hw/ppc/spapr_nvdimm.c
++
anges from v1
- Fixed a missed-out unlock
- using QLIST_FOREACH instead of QLIST_FOREACH_SAFE while generating token
Shivaprasad G Bhat (3):
nvdimm: Add realize, unrealize callbacks to NVDIMMDevice class
spapr: nvdimm: Implement H_SCM_FLUSH hcall
spapr: nvdimm: Introduce spap
A new subclass inheriting NVDIMMDevice is going to be introduced in
subsequent patches. The new subclass uses the realize and unrealize
callbacks. Add them on NVDIMMClass to appropriately call them as part
of plug-unplug.
Signed-off-by: Shivaprasad G Bhat
Acked-by: Daniel Henrique Barboza
be introduced in the
following patch.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr.c|2
hw/ppc/spapr_nvdimm.c | 260 +
include/hw/ppc/spapr.h|4 -
include/hw/ppc/spapr_nvdimm.h |1
4 files changed,
es with failures.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Daniel Henrique Barboza
---
hw/ppc/spapr_nvdimm.c | 132 +
1 file changed, 132 insertions(+)
diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c
index ac44e00153..c4c97
On 6/21/24 2:19 PM, Cédric Le Goater wrote:
Could you please describe the host/guest OS, hypervisor, processor
and adapter ?
Here is the environment info,
pSeries:
Host : Power10 PowerVM Lpar
Kernel: Upstream 6.10.0-rc4 + VFIO fixes posted at
171810893836.1721.2640631616827396553.st...
On 6/21/24 8:40 PM, Cédric Le Goater wrote:
On 6/21/24 4:47 PM, Shivaprasad G Bhat wrote:
On 6/21/24 2:19 PM, Cédric Le Goater wrote:
Could you please describe the host/guest OS, hypervisor, processor
and adapter ?
Here is the environment info,
pSeries:
Host : Power10 PowerVM Lpar
On 6/28/24 4:07 PM, Cédric Le Goater wrote:
...
Could you clarify which tree you are referring to ? I see his tree
https://github.com/awilliam/tests is bit old and updated recently,
however
I have been using those tests for my unit testing.
Yes, this tree.
Thanks!
...
This went throug
The patch enables DEXCR migration by hooking with the
"KVM one reg" ID KVM_REG_PPC_DEXCR.
Signed-off-by: Shivaprasad G Bhat
---
linux-headers/asm-powerpc/kvm.h |1 +
target/ppc/cpu_init.c |4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-h
The patch enables HASHKEYR migration by hooking with the
"KVM one reg" ID KVM_REG_PPC_HASHKEYR.
Signed-off-by: Shivaprasad G Bhat
---
linux-headers/asm-powerpc/kvm.h |1 +
target/ppc/cpu_init.c |4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --g
take care of this. Also, the PPC
kvm header changes are selectively picked for the required
definitions posted here at [2].
References:
[1]: https://github.com/kvm-unit-tests/kvm-unit-tests
[2]:
https://lore.kernel.org/kvm/171741323521.6631.11242552089199677395.st...@linux.ibm.com
---
Shivaprasad
SHPKEYR as suggested
Shivaprasad G Bhat (4):
linux-header: PPC: KVM: Update one-reg ids for DEXCR, HASHKEYR and
HASHPKEYR
target/ppc/cpu_init: Synchronize DEXCR with KVM for migration
target/ppc/cpu_init: Synchronize HASHKEYR with KVM for migration
target/ppc/cpu_init: S
This is a placeholder change for these SPRs until the full linux
header update.
Signed-off-by: Shivaprasad G Bhat
---
linux-headers/asm-powerpc/kvm.h |3 +++
1 file changed, 3 insertions(+)
diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kvm.h
index 1691297a76
The patch enables HASHKEYR migration by hooking with the
"KVM one reg" ID KVM_REG_PPC_HASHKEYR.
Signed-off-by: Shivaprasad G Bhat
---
target/ppc/cpu_init.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index
The patch enables DEXCR migration by hooking with the
"KVM one reg" ID KVM_REG_PPC_DEXCR.
Signed-off-by: Shivaprasad G Bhat
---
target/ppc/cpu_init.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index
The patch enables HASHPKEYR migration by hooking with the
"KVM one reg" ID KVM_REG_PPC_HASHPKEYR.
Signed-off-by: Shivaprasad G Bhat
---
target/ppc/cpu_init.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index
On 5/13/24 17:53, Cédric Le Goater wrote:
Hello Shivaprasad,
On 5/9/24 21:14, Shivaprasad G Bhat wrote:
The commit 6ad359ec29 "(vfio/spapr: Move prereg_listener into
spapr container)" began to use the newly introduced VFIOSpaprContainer
structure.
After several refactors,
Hi Cédric,
On 6/20/24 6:37 PM, Cédric Le Goater wrote:
Shivaprasad,
On 5/9/24 9:14 PM, Shivaprasad G Bhat wrote:
The commit 6ad359ec29 "(vfio/spapr: Move prereg_listener into
spapr container)" began to use the newly introduced VFIOSpaprContainer
structure.
After several refactors,
Hi David, All,
I am revisiting/reviving this patch.
On 5/5/21 11:20, David Gibson wrote:
On Wed, Apr 21, 2021 at 11:50:40AM +0530, Ravi Bangoria wrote:
Hi David,
On 4/19/21 10:23 AM, David Gibson wrote:
On Mon, Apr 12, 2021 at 05:14:33PM +0530, Ravi Bangoria wrote:
Since we have released
er to set
the pa-feature bit in guest DT using cap-dawr1 machine capability. Though,
watchpoint on powerpc TCG guest is not supported and thus 2nd DAWR is not
enabled for TCG mode.
Signed-off-by: Ravi Bangoria
Reviewed-by: Greg Kurz
Reviewed-by: Cédric Le Goater
Signed-off-by: Shivaprasad G
s patch got lucky then. If you/Cedric remove your acks I would
simply drop the
patch and re-send the PR with the greatest of ease, no remorse
whatsoever.
Thanks,
Daniel
Cheers,
--
Greg
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
On 7/7/23 05:47, Shivaprasad G Bh
On 7/7/23 19:54, Cédric Le Goater wrote:
On 7/7/23 13:59, Greg Kurz wrote:
Hi Daniel and Shiva !
On Fri, 7 Jul 2023 08:09:47 -0300
Daniel Henrique Barboza wrote:
This one was a buzzer shot.
Indeed ! :-) I would have appreciated some more time to re-assess
my R-b tag on this 2 year old b
whether kvm supports 2nd DAWR or not. If it's supported, allow user to set
the pa-feature bit in guest DT using cap-dawr1 machine capability.
Signed-off-by: Ravi Bangoria
Signed-off-by: Shivaprasad G Bhat
---
Changelog:
v6:
https://lore.kernel.org/qemu-devel/168871963321.58984.156283826146212
On 07/12/2017 04:25 PM, Andrea Bolognani wrote:
[libvir-list added to the loop]
On Tue, 2017-07-04 at 10:47 +0200, Greg Kurz wrote:
On Tue, 4 Jul 2017 17:29:01 +1000 David Gibson
wrote:
On Mon, Jul 03, 2017 at 06:48:25PM +0200, Greg Kurz wrote:
The sPAPR machine always create a default
manifest somewhere else, none the less.
The fix here is to map all the target-pages of the hostpage during the
ELF load for data segment to allow the glibc for proper consumption.
Signed-off-by: Shivaprasad G Bhat
---
linux-user/elfload.c | 24 +---
1 file changed, 17 insertions
On 08/27/2018 06:55 PM, Laurent Vivier wrote:
Le 27/08/2018 à 14:37, Shivaprasad G Bhat a écrit :
If the hostpage size is greater than the TARGET_PAGESIZE, the
target-pages of size TARGET_PAGESIZE are marked valid only till the
length requested during the elfload. The glibc attempts to
.
Signed-off-by: Shivaprasad G Bhat
---
v1: https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg05730.html
Changes from v1:
- Made the conditionals consistent with the commit "33143c446e" and
changed the commit message accordingly.
linux-user/elfloa
ption.
Signed-off-by: Shivaprasad G Bhat
---
v2: https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg05943.html
Changes from v2:
- Simplified the macro as suggested.
- Fixed some grammatical error in commit message.
v1: https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg05730.html
Ch
oing this.
Signed-off-by: Shivaprasad G Bhat
---
linux-user/syscall.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 7b9ac3b408..1693e69ce0 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -250,6 +250,20 @@ sta
On 07/12/2018 02:21 AM, Laurent Vivier wrote:
Le 11/07/2018 à 15:04, Laurent Vivier a écrit :
Le 11/07/2018 à 12:55, Shivaprasad G Bhat a écrit :
Qemu includes the glibc headers for the host defines and target headers are
part of the qemu source themselves. The glibc has the F_GETLK64
LE_OFFSET64 is defined in qemu
sources(also refer sysdeps/unix/sysv/linux/bits/fcntl-linux.h).
Do the value adjustment just like it is done by glibc source by using
F_GETLK value of 5. That way, we make the syscalls with the actual
supported values in Qemu. The patch is taking this approach.
Signed-o
On 07/12/2018 12:36 PM, Laurent Vivier wrote:
Le 12/07/2018 à 09:00, Shivaprasad G Bhat a écrit :
On 07/12/2018 02:21 AM, Laurent Vivier wrote:
Le 11/07/2018 à 15:04, Laurent Vivier a écrit :
Le 11/07/2018 à 12:55, Shivaprasad G Bhat a écrit :
Qemu includes the glibc headers for the host
LE_OFFSET64 is defined in qemu
sources(also refer sysdeps/unix/sysv/linux/bits/fcntl-linux.h).
Do the value adjustment just like it is done by glibc source by using
F_GETLK value of 5. That way, we make the syscalls with the actual
supported values in Qemu. The patch is taking this approach.
Signed-o
LE_OFFSET64 is defined in qemu
sources(also refer sysdeps/unix/sysv/linux/bits/fcntl-linux.h).
Do the value adjustment just like it is done by glibc source by using
F_GETLK value of 5. That way, we make the syscalls with the actual
supported values in Qemu. The patch is taking this approach.
Signed-o
registers
r0-r13 are not to be used here as they have
volatile/designated/reserved usages. Change the code to use
r14 which is non-volatile and is appropriate for local use in
safe_syscall.
Signed-off-by: Shivaprasad G Bhat
---
Steps to reproduce:
On PPC host, issue `qemu-ppc64le /usr/bin/cc -E
.
Reference:
https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html#REG
Signed-off-by: Shivaprasad G Bhat
Tested-by: Laurent Vivier
Reviewed-by: Laurent Vivier
---
v1: https://lists.gnu.org/archive/html/qemu-devel/2018-07/msg05089.html
Changes from v1:
Fixed the commit message as
On 07/26/2018 10:56 PM, Richard Henderson wrote:
On 07/25/2018 11:48 PM, Shivaprasad G Bhat wrote:
Reference:
https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html#REG
This document is for _CALL_ELF < 2. For ppc64le, the document is at
https://openpowerfoundation.org
G Bhat
---
v2: https://lists.gnu.org/archive/html/qemu-devel/2018-07/msg05102.html
Changes from v2:
Added code to store and restore r14 register.
v1: https://lists.gnu.org/archive/html/qemu-devel/2018-07/msg05089.html
Changes from v1:
Fixed the commit message as suggested
linux-user/host
G Bhat
Tested-by: Richard Henderson
Tested-by: Laurent Vivier
Reviewed-by: Richard Henderson
Reviewed-by: Laurent Vivier
---
v3: https://lists.gnu.org/archive/html/qemu-devel/2018-07/msg05559.html
Changes from v3:
Added cfi_offset directive as suggested and a minor comment/code line swap
Hi David,
Sorry about the delay.
On 2/8/21 11:51 AM, David Gibson wrote:
On Tue, Jan 19, 2021 at 12:40:31PM +0530, Shivaprasad G Bhat wrote:
Thanks for the comments!
On 12/28/20 2:08 PM, David Gibson wrote:
On Mon, Dec 21, 2020 at 01:08:53PM +0100, Greg Kurz wrote:
...
The overall idea
all ongoning flushes.
- Added hw_compat magic for sync-dax 'on' on previous machines.
- Miscellanious minor fixes.
v1 - https://lists.gnu.org/archive/html/qemu-devel/2020-11/msg06330.html
Changes from v1
- Fixed a missed-out unlock
- using QLIST_FOREACH instead of
The subsequent patches add definitions which tend to
get the compilation to cyclic dependency. So, prepare
with forward declarations, move the defitions and clean up.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_nvdimm.c | 12
include/hw/ppc/spapr_nvdimm.h | 21
the default behaviour without sync-dax property set
for the nvdimm device.
The sync-dax="on" would mean the guest need not make flush requests
to the qemu. On previous machine versions the sync-dax is set to be
"on" by default using the hw_compat magic.
Signed-off-by: Shivaprasad
eted' list. The necessary
nvdimm flush specific vmstate structures are added to the spapr
machine vmstate.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr.c|6 +
hw/ppc/spapr_nvdimm.c | 240 +
include/hw/ppc/spapr.h
On 3/25/21 7:21 AM, David Gibson wrote:
On Wed, Mar 24, 2021 at 09:34:06AM +0530, Aneesh Kumar K.V wrote:
On 3/24/21 8:37 AM, David Gibson wrote:
On Tue, Mar 23, 2021 at 09:47:38AM -0400, Shivaprasad G Bhat wrote:
The patch adds support for the SCM flush hcall for the nvdimm devices
On 3/24/21 8:37 AM, David Gibson wrote:
On Tue, Mar 23, 2021 at 09:47:38AM -0400, Shivaprasad G Bhat wrote:
machine vmstate.
Signed-off-by: Shivaprasad G Bhat
An overal question: surely the same issue must arise on x86 with
file-backed NVDIMMs. How do they handle this case?
Discussed in
Hi Vaibhav,
Some comments inline..
On 3/29/21 9:52 PM, Vaibhav Jain wrote:
Add support for H_SCM_HEALTH hcall described at [1] for spapr
nvdimms. This enables guest to detect the 'unarmed' status of a
specific spapr nvdimm identified by its DRC and if its unarmed, mark
the region backed by the
ld fail, so fix that.
Reported-by: Aneesh Kumar K.V
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_nvdimm.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c
index 252204e25f..d7a4a0a051 100644
--- a/hw/ppc/spapr_n
backend doesn't have
pmem="yes", the device tree property "ibm,hcall-flush-required" is set,
and the guest makes hcall H_SCM_FLUSH requesting for an explicit flush.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_nvdimm.c | 46
- Added hw_compat magic for sync-dax 'on' on previous machines.
- Miscellanious minor fixes.
v1 - https://lists.gnu.org/archive/html/qemu-devel/2020-11/msg06330.html
Changes from v1
- Fixed a missed-out unlock
- using QLIST_FOREACH instead of QLIST_FOREACH_SAFE
The subsequent patches add definitions which tend to get
the compilation to cyclic dependency. So, prepare with
forward declarations, move the definitions and clean up.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_nvdimm.c | 12
include/hw/ppc/spapr_nvdimm.h | 14
on in post_load. The necessary nvdimm flush specific
vmstate structures are added to the spapr machine vmstate.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr.c|6 +
hw/ppc/spapr_nvdimm.c | 240 +
include/hw/ppc/spapr.h| 1
minor fixes.
v1 - https://lists.gnu.org/archive/html/qemu-devel/2020-11/msg06330.html
Changes from v1
- Fixed a missed-out unlock
- using QLIST_FOREACH instead of QLIST_FOREACH_SAFE while generating token
Shivaprasad G Bhat (3):
spapr: nvdimm: Forward declare and move the definitio
The subsequent patches add definitions which tend to
get the compilation to cyclic dependency. So, prepare
with forward declarations, move the defitions and clean up.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_nvdimm.c | 12
include/hw/ppc/spapr_nvdimm.h | 14
The necessary
nvdimm flush specific vmstate structures are added to the spapr
machine vmstate.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr.c|6 +
hw/ppc/spapr_nvdimm.c | 234 +
include/hw/ppc/spapr.h| 1
e guest to issue H_SCM_FLUSH hcalls to request for flushes
explicitly. This would be the default behaviour without sync-dax
property set for the nvdimm device. For old pSeries machine, the
default is 'unsafe'.
For non-PPC platforms, the mode is set to 'unsafe' as the default.
On 5/1/21 12:44 AM, Dan Williams wrote:
Some corrections to terminology confusion below...
On Wed, Apr 28, 2021 at 8:49 PM Shivaprasad G Bhat wrote:
The nvdimm devices are expected to ensure write persistence during power
failure kind of scenarios.
No, QEMU is not expected to make that
s,inode64,logbufs=8,logbsize=32k,noquota)
[root@atest-guest ~]# ./mapsync /mnt1/newfile> When sync-dax=off
[root@atest-guest ~]# ./mapsync /mnt2/newfile> when sync-dax=on
Failed to mmap with Operation not supported
---
Shivaprasad G Bhat (2):
spapr: drc: Add support for
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