Hello,
Let me explain a bit how to reproduce the problem. I'm developing a RTOS
with qemu (and boards,etc) -
https://sourceforge.net/projects/rtospharos/. The first version used
ARM926 with the versatilepb board and I used the qemu 2.5 version.
In my test (to check that the RTOS is working correc
Public bug reported:
Hello all,
I'm using the versatilepb board and the timer Interrupt Mask Status
register (offset 0x14 of the SP804) does not seem to be working properly
on the latest qemu-2.12. I tried on the 2.5 (i believe this is the
mainstream version that comes with Linux) and it works pe
Hi,
After some debugging (and luck), the problem (at least in the Virt
board) was that the PLIC code inside QEMU addresses the core x 2 instead
of just the core (core=hart). That is why it worked for core 0 (0x2 = 0)
but for core 1 it has to address the PLIC memory area for core 2.
For example, t
Thank you for the explanation. I actually built it for "Virt" machine.
I'll try the "sifive_u" when I can.
But I guess your explanation is correct so this bug could be closed from
my part.
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Thank you for checking this issue.
I looked at the ptimer code, like you said. Just one question: isn't this used
by other hw as well?
Maybe this problem is more general...
I also tried (basically) the same example on a aarch64 (raspberry pi3),
and I don't find any problems there. Maybe could be
Public bug reported:
Hello all,
There is a bug in Qemu related to the enabling of external interrupts
for multicores (Virt machine).
After correcting Qemu as described in #1815078
(https://bugs.launchpad.net/qemu/+bug/1815078), when we try to enable
interrupts for core 1 at address 0x0C00_2080 w
Good news,
Thanks
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https://bugs.launchpad.net/bugs/1815078
Title:
Qemu 3.1.0 risc-v mie.MEIE
Status in QEMU:
New
Bug description:
Hello all,
There is a bug in qemu for Risc-v
OK, I'll give it a try and give you some feedback.
Thanks
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Title:
Qemu 3.1.0 risc-v mie.MEIE
Status in QEMU:
Fix Committed
Bug description:
So I tried it but got the error:
ERROR: missing file ../qemu-3.1.0/ui/keycodemapdb/README
This is not a GIT checkout but module content appears to
be missing. Do not use 'git archive' or GitHub download links
to acquire QEMU source archives. Non-GIT builds are only
supported with source archives
Sorry to have taken some time to answer.
Created the binary with the test.
Here is the output when it fails (tested in Qemu 2.12):
Checked 0 times if the time is always increasing
Checked 10 times if the time is always increasing
Checked 20 times if the time is always increasing
Checked
Forgot to state the qemu argument, it's this one:
~/cross-compiler/qemu/2.5/bin/qemu-system-arm -M versatilepb -m 128M
-nographic -kernel myApplication
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Public bug reported:
Hello,
In my code I'm trying to remove some permissions to a 4KiB MMU
descriptor. After that I invalidate the MMU with
TLBI VAE1, x0
where x0 is the start of the address of the 4 KiB page.
In Qemu 2.12 this did not work, but I worked around it with:
/* invalidate the
Public bug reported:
Hello all,
There is a bug in qemu for Risc-v, related to the mie register: when we
try to set the MEIE bit (11) nothing is done, even when we are running
at machine mode.
Li a0 , 1 << 11
Csrs mie , a0
And when we read mie it is as though nothing was done.
Going through t
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