ign (4/4)
changed from v1:
minor sylistic changes (1/4)
converted spi api to modified txrx style (1-3/4)
heavily refactored m25p80 model (2/4)
Peter A. G. Crosthwaite (15):
ssi: Support for multiple attached devices
ssi: Added VMSD stub
ssi: Implemented CS behaviour
ssi: Added create_slave
of
all responses from the (mulitple) devices.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssi.c | 24 +---
1 files changed, 9 insertions(+), 15 deletions(-)
diff --git a/hw/ssi.c b/hw/ssi.c
index e5f14a0..35d0a04 100644
--- a/hw/ssi.c
+++ b/hw/ssi.c
@@ -2,6 +2,8
Device model for xilinx XPS SPI controller (v2.0)
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v4 (Near total rewrite):
removed timer delay. This was innacturate anyways removed for simlicity.
updated for new SSI interface.
factored out txrx fifos using fifo.h
changed from v3
Added the two SPI controllers to the zynq machine model. Attached two SPI flash
devices to each controller.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx_zynq.c | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b
Added device model for the Xilinx Zynq SPI controller (SPIPS).
Signed-off-by: Peter A. G. Crosthwaite
---
hw/arm/Makefile.objs |1 +
hw/xilinx_spips.c| 352 ++
2 files changed, 353 insertions(+), 0 deletions(-)
create mode 100644 hw
Added device model for m25p80 style SPI flash family.
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v4:
Added write-1 flag (EEPROM mode).
n25q128 table entry indentation fix.
updated for new SSI interface.
various debug messages cleaned up and added.
changed from v3:
changed licence to
Added VMSD stub for SSI slaves. Fields may be added to this VMSD for generic
SSI slave state (e.g. the CS line state).
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ads7846.c |1 +
hw/max111x.c |1 +
hw/spitz.c |2 ++
hw/ssi.c | 10 ++
hw/ssi.h | 10
Added default CS behaviour for SSI slaves. SSI devices can set a property
to enable CS behaviour which will create a GPIO on the device which is the
CS. Tristating of the bus on SSI transfers is implemented.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssd0323.c |6 ++
hw/ssi-sd.c
setters with
direct calls to qdev_connect_gpio_out().
Signed-off-by: Peter A. G. Crosthwaite
---
hw/stellaris.c | 26 --
1 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/hw/stellaris.c b/hw/stellaris.c
index 4d26857..ec55c0e 100644
--- a/hw/stellaris.c
Added maintainership for SSI, M25P80 and the Xilinx SPI controllers.
Signed-off-by: Peter A. G. Crosthwaite
---
MAINTAINERS |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2d219d2..0f28f19 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
To be more consistent with the newer ways of error signalling. That and SIGABT
is easier to debug with than exit(1).
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssd0323.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/hw/ssd0323.c b/hw/ssd0323.c
index d8a0c14
an index selecter is
not possible.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/qdev.c | 16 +---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/hw/qdev.c b/hw/qdev.c
index b5b74b9..ce91a72 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -293,9 +293,19 @@ BusState
Added a FIFO API that can be used to create and operate byte FIFOs.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/Makefile.objs |1 +
hw/fifo.c| 79 ++
hw/fifo.h| 47
3 files changed
Removed the explicit SSI mux and wired the CS line directly up to the SSI
devices.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssd0323.c |1 +
hw/ssi-sd.c|1 +
hw/stellaris.c | 98 ++--
3 files changed, 19 insertions(+), 81
Added SPI controller to the reference design, with two n25q128 spi-flashes
connected.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/petalogix_ml605_mmu.c | 28 +++-
1 files changed, 27 insertions(+), 1 deletions(-)
diff --git a/hw/petalogix_ml605_mmu.c b/hw
Slave creation function that can be used to create an SSI slave without
qdev_init() being called. This give machine models a change to set properties.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssi.c |9 +++--
hw/ssi.h |1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff
are available in the git repository at:
git://developer.petalogix.com/public/qemu.git for-upstream/axi-stream.next
Anthony Liguori (1):
qom: Reimplement Interfaces
Peter A. G. Crosthwaite (1):
xilinx_axi*: Re-implemented interconnect
hw/Makefile.objs |1 +
hw
s only
one cast function - object_dynamic_cast() (and object_dynamic_cast_assert())
Signed-off-by: Anthony Liguori
Signed-off-by: Peter A. G. Crosthwaite
---
include/qemu/object.h | 46 +++
qom/object.c | 220 +++--
2 files changed, 116 ins
Re-implemented the interconnect between the Xilinx AXI ethernet and DMA
controllers. A QOM interface "stream" is created, for the two stream interfaces.
As per Edgars request, this is designed to be more generic than AXI-stream,
so in the future we may see more clients of this interface beyond AXI
[Original cover by Igor]
First patch introduces standard SD host controller model. This is accumulated
version of my previous patch I sent a while ago and a recent SDHCI patch by
Peter A. G. Crosthwaite. Second patch introduces Exynos4210-specific SDHCI
built on top of standard SDHCI model
From: Igor Mitsyanko
Custom Exynos4210 SD/MMC host controller, based on SD association standard host
controller ver. 2.00.
Signed-off-by: Igor Mitsyanko
---
changed from v5 (Igor):
Updated for new IRQ system
changed from v4 (Igor):
set irq on SLOTINT status instead of interrupt registers status
The Xilinx Zynq device has two SDHCI controllers. Added to the machine model.
Signed-off-by: Peter A. G. Crosthwaite
Reviewed-by: Peter Maydell
---
changed from v4:
removed redundant braces
changed from v3:
fixed indentation
tweaked commit msg
hw/xilinx_zynq.c | 10 ++
1 files
Allows for repeating of -sd arguments in the same way as -pflash and -mtdblock.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Igor Mitsyanko
Reviewed-by: Peter Maydell
---
changed from v4:
fixed (another) commit msg typo
changed from v3:
fixed commit msg typo
vl.c |2 +-
1 files
Signed-off-by: Peter A. G. Crosthwaite
---
target-arm/translate.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 29008a4..494c682 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -9892,7 +9892,7
A -kernel argument must be specified for this machine. Gaurd against no -kernel
argument. Previously gave an unhelpful "bad address" error message.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/armv7m.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/hw/
are available in the git repository at:
git://developer.petalogix.com/public/qemu.git ..BRANCH.NOT.VERIFIED..
Anthony Liguori (1):
qom: Reimplement Interfaces
Peter A. G. Crosthwaite (1):
xilinx_axi*: Re-implemented interconnect
hw/Makefile.objs |1 +
hw
s only
one cast function - object_dynamic_cast() (and object_dynamic_cast_assert())
Signed-off-by: Anthony Liguori
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Paolo Bonzini
---
include/qemu/object.h | 46 +++
qom/object.c | 220 +++
Re-implemented the interconnect between the Xilinx AXI ethernet and DMA
controllers. A QOM interface "stream" is created, for the two stream interfaces.
As per Edgars request, this is designed to be more generic than AXI-stream,
so in the future we may see more clients of this interface beyond AXI
):
qom: Reimplement Interfaces
Peter A. G. Crosthwaite (1):
xilinx_axi*: Re-implemented interconnect
hw/Makefile.objs |1 +
hw/petalogix_ml605_mmu.c | 24 +++--
hw/stream.c | 23 +
hw/stream.h | 31 +++
hw/xilinx.h | 22
s only
one cast function - object_dynamic_cast() (and object_dynamic_cast_assert())
Signed-off-by: Anthony Liguori
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Paolo Bonzini
---
include/qemu/object.h | 46 +++
qom/object.c | 220 +++
Re-implemented the interconnect between the Xilinx AXI ethernet and DMA
controllers. A QOM interface "stream" is created, for the two stream interfaces.
As per Edgars request, this is designed to be more generic than AXI-stream,
so in the future we may see more clients of this interface beyond AXI
The following changes since commit 3d1d9652978ac5a32a0beb4bdf6065ca39440d89:
Bruce Rogers (1):
handle device help before accelerator set up
are available in the git repository at:
git://developer.petalogix.com/public/qemu.git
for-upstream/device-tree-null-size.next
Peter A. G
The sizep arg is populated with the size of the loaded device tree. Since this
is one of those informational "please populate" type arguments it should be
optional. Guarded writes to *sizep against NULL accordingly.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Alex
version of object_property_set,
for the 90% case where a non-existant property is an error in machine model
development?
Signed-off-by: Peter A. G. Crosthwaite
---
qom/object.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/qom/object.c b/qom/object.c
index a552be2..6e875a8
to all I2C devices.
This patch is not a merge proposal it is RFC only.
Please review and let us know if this is flawed or not. What needs to be done to
get this multi-level VMSD going?
I will use whatever review I get to fix my SSI series as well as fix I2C.
Signed-off-by: Peter A. G. Crosthwaite
'
removed former patch 6 (initrd parameterisation) - not required for minimal boot
Peter A. G. Crosthwaite (4):
cadence_uart: initial version of device model
cadence_ttc: initial version of device model
cadence_gem: initial version of device model
xilinx_zynq: machine model initial ve
Implemented cadence UART serial controller
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changes from v1:
converted register file to array
added vmsd state save/load support
removed read side effects from CISR register
Makefile.target |1 +
hw/cadence_uart.c | 561
Implemented cadence Triple Timer Counter (TCC)
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changes from v1
refactored event driven code
marked vmsd as unmigratable
Makefile.target |1 +
hw/cadence_ttc.c | 399
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific
system level control register (SLCR) module.
Signed-off-by: Peter A. G. Crosthwaite
---
changes since v1:
Added gem init function
remowed WDT instantiation
Added maintainers information
removed dead sys_id and
Device model for cadence gem ethernet controller.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
removed global init function
marked vmsd as unmigratable
cleaned up debug messages
Makefile.target |1 +
hw/cadence_gem.c | 1229
From: "Peter A. G. Crosthwaite"
Create a QOM device for bootstrapping linux on arm. Wraps the existing
arm_boot code and calls arm_load_kernel() at device init. Allows booting
of linux without -kernel -initrd -append arguments. The main drawback is
the boardid now has to be specified a
QOM
removed former patch 3 (cadence WDT device model) - not required
removed former patch 5 (dtb argument) - this is currently under discussion in
other patch series'
removed former patch 6 (initrd parameterisation) - not required for minimal boot
Peter A. G. Crosthwaite (4):
cadence_uart: in
Implemented cadence UART serial controller
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changes from v1:
converted register file to array
added vmsd state save/load support
removed read side effects from CISR register
Makefile.target |1 +
hw/cadence_uart.c | 561
Implemented cadence Triple Timer Counter (TCC)
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changed from v2
changed ptimer to QEMUTimer (Fixed skew/drift issue in timer delays)
changes from v1
refactored event driven code
marked vmsd as unmigratable
Makefile.target
Device model for cadence gem ethernet controller.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changes from v1:
removed global init function
marked vmsd as unmigratable
cleaned up debug messages
Makefile.target |1 +
hw/cadence_gem.c | 1229
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific
system level control register (SLCR) module.
Signed-off-by: Peter A. G. Crosthwaite
---
changes since v2:
removed 2 compile warnings from zynq_arm_sysctl.c
changes since v1:
Added gem init function
remowed WDT
- not required for minimal boot
Peter A. G. Crosthwaite (4):
cadence_uart: initial version of device model
cadence_ttc: initial version of device model
cadence_gem: initial version of device model
xilinx_zynq: machine model initial version
MAINTAINERS |5 +
Makefile.t
Implemented cadence UART serial controller
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changes from v1:
converted register file to array
added vmsd state save/load support
removed read side effects from CISR register
Makefile.target |1 +
hw/cadence_uart.c | 561
Implemented cadence Triple Timer Counter (TCC)
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changed from v3:
Fixed race condition where timer could miss match events on wrap around
changed from v2:
changed ptimer to QEMUTimer (Fixed skew/drift issue in timer delays
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific
system level control register (SLCR) module.
Signed-off-by: Peter A. G. Crosthwaite
---
changes since v2:
removed 2 compile warnings from zynq_arm_sysctl.c
changes since v1:
Added gem init function
remowed WDT
Device model for cadence gem ethernet controller.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changes from v1:
removed global init function
marked vmsd as unmigratable
cleaned up debug messages
Makefile.target |1 +
hw/cadence_gem.c | 1229
der discussion in
other patch series'
removed former patch 6 (initrd parameterisation) - not required for minimal boot
Peter A. G. Crosthwaite (4):
cadence_uart: initial version of device model
cadence_ttc: initial version of device model
cadence_gem: initial version of devi
Implemented cadence UART serial controller
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changed from v4:
fixed FSF addess
changed device_init -> type_init
changes from v1:
converted register file to array
added vmsd state save/load support
removed read side effects f
Implemented cadence Triple Timer Counter (TCC)
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changed from v4:
fixed FSF addess
changed device_init -> type_init
changed from v3:
Fixed race condition where timer could miss match events on wrap around
changed from v2:
chan
Device model for cadence gem ethernet controller.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
---
changed from v4:
changed device_init -> type_init
changes from v1:
removed global init function
marked vmsd as unmigratable
cleaned up debug messages
Makefile.target |
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific
system level control register (SLCR) module.
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v4:
fixed FSF addess
changed device_init -> type_init
changes since v2:
removed 2 compile warnings f
.
changed since v3:
rebased against Makefile refactor
changed since v2:
addressed reviewer comments from Igor mitsyanko and Peter Maydell (1/2)
Peter A. G. Crosthwaite (2):
pl330: initial version
xilinx_zynq: added pl330 to machine model
hw/arm/Makefile.objs |1 +
hw/pl330.c
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx_zynq.c | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 7e6c273..c20a896 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -61,6 +61,9 @@ static void
Device model for Primecell PL330 dma controller.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: Kirill Batuzov
---
changed from v3:
rebased against Makefile refactor
changed from v2 (in order of diff appearance):
GPL version changed to v2 or later
Register and field names changed to
Signed-off-by: Peter A. G. Crosthwaite
---
hw/arm_gic.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index 72298b4..c78d58e 100644
--- a/hw/arm_gic.c
+++ b/hw/arm_gic.c
@@ -35,7 +35,7 @@
#ifdef DEBUG_GIC
#define DPRINTF(fmt, ...) \
-do
independent. A block on patch one whould not block patch 2 and
vice versa. Sent as one series for reviewer convenience.
changed since v1:
replaced old patch one (used to be cmd line arg for linux - now is just dtb
implies linux)
tweaked implementation of patch 2
Peter A. G. Crosthwaite (2
If the user boots with a -dtb assume the Linux boot flow, even when handling an
elf.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/arm_boot.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index 7447f5c..f0fa23c 100644
--- a/hw
The DTB command line should only be overwritten if the user provides a command
line with -apend. Otherwise whatever command line was in the DTB should stay
unchanged.
Signed-off-by: Peter A. G. Crosthwaite
---
changed since v1:
checked cmd line string in binfo rather than machine opt
hw
ialize the end of "rxbuf".
Spotted by coverity.
Signed-off-by: Jim Meyering
Signed-off-by: Peter A. G. Crosthwaite
---
hw/cadence_gem.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c
index e2140ae..dbde392 100644
--- a/hw/ca
The sizep arg is populated with the size of the loaded device tree. Since this
is one of those informational "please populate" type arguments it should be
optional. Guarded writes to *sizep against NULL accordingly.
Signed-off-by: Peter A. G. Crosthwaite
---
device_tree.c |8 +
to run into some very obscure and hard to debug race
conditions.
Signed-off-by: Peter A. G. Crosthwaite
---
block.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/block.c b/block.c
index 0acdcac..b50af15 100644
--- a/block.c
+++ b/block.c
@@ -380,7 +380,7 @@ int
Set some missing maintainer ships. Patch 1 is the Petalogix ML605 machine model
(me). Patch 2 is the Xilinx EDK device suite (me + Edgar). Patch 3 is the
device tree subsystem (me + Alex).
Changed since v1:
Added Alexs ack for p3.
Peter A. G. Crosthwaite (3):
MAINTAINERS: Add Petalogix ml605
Signed-off-by: Peter A. G. Crosthwaite
---
MAINTAINERS |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index b45f075..d544a9c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -311,6 +311,11 @@ M: Edgar E. Iglesias
S: Maintained
F: hw
Agreed between myself and Alex:
http://lists.nongnu.org/archive/html/qemu-devel/2012-06/msg03561.html
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Alexander Graf
---
MAINTAINERS |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index
Signed-off-by: Peter A. G. Crosthwaite
---
MAINTAINERS | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index d544a9c..e19f491 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -482,6 +482,17 @@ S: Supported
F: hw/virtio-serial*
F: hw
controller model
Peter A. G. Crosthwaite (2):
vl.c: allow for repeated -sd arguments
xilinx_zynq: Added SD controllers
default-configs/arm-softmmu.mak |1 +
hw/Makefile.objs|1 +
hw/arm/Makefile.objs|1 +
hw/exynos4210.c | 20
Fixes an error in a61e4b07a30c062260d2d01771773f14820d1eb7
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx.h |2 +-
hw/xilinx_timer.c |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/xilinx.h b/hw/xilinx.h
index 7df21eb..c4d9d19 100644
--- a/hw
(P1) (Heavy conflict with final phase qom-next merge)
Rolled Interface + link bug patch (formerly P3) into P1
Anthony Liguori (1):
qom: Reimplement Interfaces
Peter A. G. Crosthwaite (1):
xilinx_axi*: Re-implemented interconnect
hw/Makefile.objs |1 +
hw/petalogix_ml605_mmu.c
s only
one cast function - object_dynamic_cast() (and object_dynamic_cast_assert())
Signed-off-by: Anthony Liguori
Signed-off-by: Peter A. G. Crosthwaite
---
include/qemu/object.h | 46 +++
qom/object.c | 220 +++--
2 files changed, 116 ins
Re-implemented the interconnect between the Xilinx AXI ethernet and DMA
controllers. A QOM interface "stream" is created, for the two stream interfaces.
As per Edgars request, this is designed to be more generic than AXI-stream,
so in the future we may see more clients of this interface beyond AXI
[Original cover by Igor]
First patch introduces standard SD host controller model. This is accumulated
version of my previous patch I sent a while ago and a recent SDHCI patch by
Peter A. G. Crosthwaite. Second patch introduces Exynos4210-specific SDHCI
built on top of standard SDHCI model
From: Igor Mitsyanko
Custom Exynos4210 SD/MMC host controller, based on SD association standard host
controller ver. 2.00.
Signed-off-by: Igor Mitsyanko
---
changed from v4 (Igor):
set irq on SLOTINT status instead of interrupt registers status; instead;
conditional in exynos4210_sdhci_can_issu
Allows for repeating of -sd arguments in the same way as -pflash and -mtdblock.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Igor Mitsyanko
---
changed from v4:
fixed (another) commit msg typo
changed from v3:
fixed commit msg typo
vl.c |2 +-
1 files changed, 1 insertions(+), 1
The Xilinx Zynq device has two SDHCI controllers. Added to the machine model.
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v4:
removed redundant braces
changed from v3:
fixed indentation
tweaked commit msg
hw/xilinx_zynq.c | 10 ++
1 files changed, 10 insertions(+), 0
uggested
- Paul Brook) (all patches)
made m25p80 use async io (suggested - Stefan Hajnoczi) (2/4)
instantiated two spi flashes instead of one in ml605 ref design (4/4)
changed from v1:
minor sylistic changes (1/4)
converted spi api to modified txrx style (1-3/4)
heavily refactored m25p80 model (2/4)
Pe
of
all responses from the (mulitple) devices.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssi.c | 24 +---
1 files changed, 9 insertions(+), 15 deletions(-)
diff --git a/hw/ssi.c b/hw/ssi.c
index e5f14a0..35d0a04 100644
--- a/hw/ssi.c
+++ b/hw/ssi.c
@@ -2,6 +2,8
Added default CS behaviour for SSI slaves. SSI devices can set a property
to enable CS behaviour which will create a GPIO on the device which is the
CS. Tristating of the bus on SSI transfers is implemented.
Signed-off-by: Peter A. G. Crosthwaite
---
Changed since v5:
Addressed PMM review
Slave creation function that can be used to create an SSI slave without
qdev_init() being called. This give machine models a chance to set properties.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssi.c |9 +++--
hw/ssi.h |1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff
Removed the explicit SSI mux and wired the CS line directly up to the SSI
devices.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssd0323.c |1 +
hw/ssi-sd.c|1 +
hw/stellaris.c | 98 ++--
3 files changed, 19 insertions(+), 81
Device model for xilinx XPS SPI controller (v2.0)
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v4 (Near total rewrite):
removed timer delay. This was innacturate anyways removed for simlicity.
updated for new SSI interface.
factored out txrx fifos using fifo.h
changed from v3
Added the two SPI controllers to the zynq machine model. Attached two SPI flash
devices to each controller.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx_zynq.c | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b
Added device model for the Xilinx Zynq SPI controller (SPIPS).
Signed-off-by: Peter A. G. Crosthwaite
---
Changed from v6:
Addressed Blue Swirl review
s/interupt/interrupt
s/defintion/definition
constified TypeInfo
hw/arm/Makefile.objs |1 +
hw/xilinx_spips.c| 352
Added a FIFO API that can be used to create and operate byte FIFOs.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/Makefile.objs |1 +
hw/fifo.c| 78 ++
hw/fifo.h| 47
3 files changed
Added SPI controller to the reference design, with two n25q128 spi-flashes
connected.
Signed-off-by: Peter A. G. Crosthwaite
---
Changed since v5:
Removed redundant (char*) cast with qdev_get_prop_string
hw/petalogix_ml605_mmu.c | 27 +++
1 files changed, 27
setters with
direct calls to qdev_connect_gpio_out().
Signed-off-by: Peter A. G. Crosthwaite
---
hw/stellaris.c | 26 --
1 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/hw/stellaris.c b/hw/stellaris.c
index 01050d1..a7b68f4 100644
--- a/hw/stellaris.c
Added maintainership for SSI, M25P80 and the Xilinx SPI controllers.
Signed-off-by: Peter A. G. Crosthwaite
---
MAINTAINERS |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 61f8b45..0ebe247 100644
--- a/MAINTAINERS
+++ b
Added device model for m25p80 style SPI flash family.
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v6:
Addressed Blue Swirl review
Constified TypeInfo
Constified part_name string prop
Added missing break
s/assert(false)/abort()
changed from v4:
Added write-1 flag (EEPROM mode
an index selecter is
not possible.
Signed-off-by: Peter A. G. Crosthwaite
---
changed since v5:
moved implementation to irq.c as per PMM review
hw/irq.c | 17 ++---
hw/irq.h | 11 ++-
hw/qdev.c |6 +++---
3 files changed, 27 insertions(+), 7 deletions(-)
diff --git
Misc microblaze patches.
Chris Wulff (1):
xilinx_timer: Fix a compile error if debug enabled
Peter A. G. Crosthwaite (5):
xilinx_timer: Removed comma in device name
xilinx_timer: Send dbg msgs to stderr not stdout
xilinx_timer: Fixed "frequency" prop name
xilinx.h: Error
Fixes an error in a61e4b07a30c062260d2d01771773f14820d1eb7
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx.h |2 +-
hw/xilinx_timer.c |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/xilinx.h b/hw/xilinx.h
index 556c5aa..df06a00 100644
--- a/hw
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx_timer.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/xilinx_timer.c b/hw/xilinx_timer.c
index 053ba02..c02e6ca 100644
--- a/hw/xilinx_timer.c
+++ b/hw/xilinx_timer.c
@@ -119,7 +119,7 @@ timer_read(void
Assert that the ethernet and dma controller are sucessfully linked to their
peers.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx.h | 10 --
1 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/xilinx.h b/hw/xilinx.h
index 45a6bdc..4d29265 100644
--- a/hw/xilinx.h
These names were incorrect. Fixed to match to actual link names
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx.h |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/xilinx.h b/hw/xilinx.h
index 4d29265..6449bd4 100644
--- a/hw/xilinx.h
+++ b/hw/xilinx.h
The "frequency" qdev prop matches the "clock-frequency" property in Xilinx EDK.
Renamed "frequency" -> "clock-frequency" accordingly.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx.h |2 +-
hw/xilinx_timer.c |3 ++-
2 files cha
.
Peter A. G. Crosthwaite (10):
device_tree: allow offsets for cell properties
device_tree: return Error* from prop getters
device_tree: allow property getters to inherit
device_tree: get_prop(): memdup returned properties
qemu-coroutine: Add simple work queue support
device_tree: Extended
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