The NVMe subsystem logs "pulsing IRQ pin" when it is asserting the PCI(e)
IRQ. This is confusing as it implies a short pulse, not the level-triggered
interrupts PCI(e) uses.
Also remove the pci_irq_pulse() function marked with FIXME as it is no
longer used by any calls.
Signed-off
, or just leave it to the
standard PCI IRQ traces.
Julia
On Tue, 15 Oct 2024, at 21:33, julia wrote:
> The NVMe subsystem logs "pulsing IRQ pin" when it is asserting the PCI(e)
> IRQ. This is confusing as it implies a short pulse, not the level-triggered
> interrupt
future, incorrectly set up page
tables can be debugged without bisecting QEMU.
Signed-off-by: julia
---
target/riscv/cpu_helper.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index e1dfc4ecbf
fY3jfRbpdO9l1l2wwDZ2l0AAZzaGE1MTIAAABTC3NzaC1lZDI1NTE5
QP6c2B82m4kq6h046Ou/LV6c9I/D/uUtUlivmbvR/lSdCWOiPIYnpK5HPtvhcgVYoQ
8X1k8kKjplch4iy6JnNgU=
-END SSH SIGNATURE-
julia (1):
target/riscv: log guest errors when reserved bits are set in PTEs
target/riscv
future, incorrectly set up page
tables can be debugged without bisecting QEMU.
Signed-off-by: julia
---
target/riscv/cpu_helper.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index e1dfc4ecbf
errors, it builds on 32 & 64 bit
on my system. Cheers
As for the Signed-off-by, I'd rather not, and the contributing guide does not
require it.
Regards,
Julia
.
core_enabled2 and thread_count2 fields work the same way.
Signed-off-by: Julia Suvorova
---
hw/smbios/smbios_build.h | 9 +++--
include/hw/firmware/smbios.h | 11 +++
hw/smbios/smbios.c | 18 +++---
3 files changed, 33 insertions(+), 5 deletions(-)
diff
ad of creating new constants
* refactor smbios_cpu_test [Igor, Ani]
* clarify signature check [Igor]
* add comments with specifications and clarification of the structure loop
[Ani]
Julia Suvorova (5):
hw/smbios: add core_count2 to smbios table type 4
bios-tables-test: teach test t
_OST: OSPM Status Indication
+{
+COST (0xFF, Arg0, Arg1, Arg2)
+}
+}
+
...
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 ---
tests/data/acpi/q35/APIC.core-count2| Bin 0 -> 2478 bytes
te
The new test is run with a large number of cpus and checks if the
core_count field in smbios_cpu_test (structure type 4) is correct.
Choose q35 as it allows to run with -smp > 255.
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test.c | 53 +-
1 f
Introduce the 64-bit entry point. Since we no longer have a total
number of structures, stop checking for the new ones at the EOF
structure (type 127).
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test.c | 95 +-
1 file changed, 71 insertions(+), 24
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 +++
tests/data/acpi/q35/APIC.core-count2| 0
tests/data/acpi/q35/DSDT.core-count2| 0
tests/data/acpi/q35/FACP.core-count2| 0
4 files changed, 3 insertions(+)
create mode 100644 tests
QEMU does not wait for completed I/O requests, assuming that the guest
driver will reset the device before calling unrealize(). This does not
happen on Windows, and QEMU crashes in virtio_notify(), getting the
result of a completed I/O request on hot-unplugged device.
Signed-off-by: Julia
://lists.gnu.org/archive/html/qemu-devel/2020-02/msg00530.html
Signed-off-by: Julia Suvorova
---
hw/core/machine.c | 1 +
hw/pci-bridge/pcie_root_port.c | 3 ++-
hw/pci-bridge/xio3130_downstream.c | 2 +-
hw/pci/pcie.c | 8 ++--
include/hw/pci/pcie.h
On Tue, Feb 18, 2020 at 6:18 PM Laine Stump wrote:
>
> On 2/18/20 11:17 AM, Julia Suvorova wrote:
> > Make hot-plug/hot-unplug on PCIe Root Ports optional to allow libvirt
> > to manage it and restrict unplug for the entire machine. This is going
> > to prevent user-in
/off/yes/no and others on/off/true/false/yes/no.
>
> In this case both user visitor machinery. Which I *think*
> means on/off is the safe choice and true/false can be
> broken in some places.
>
> We really should clean up this mess ... Julia, what do you think?
> Let's mak
want to disable hot-unplug on some downstream ports of one
switch, disable hot-unplug on PCIe Root Port connected to the upstream
port as well as on the selected downstream ports.
Discussion related:
https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg00530.html
Signed-off-by: Julia
Device unplug can be done asynchronously. Thus, sending the second
device_del before the previous unplug is complete may lead to
unexpected results. On PCIe devices, this cancels the hot-unplug
process.
Signed-off-by: Julia Suvorova
---
qdev-monitor.c | 6 ++
1 file changed, 6 insertions
On Fri, Aug 9, 2019 at 6:35 PM Michael S. Tsirkin wrote:
>
> On Wed, Aug 07, 2019 at 10:22:41AM +0200, Julia Suvorova wrote:
> > Using FLR becomes convenient in cases where resetting the bus is
> > impractical, for example, when debugging the behavior of individual
> > f
Using FLR becomes convenient in cases where resetting the bus is
impractical, for example, when debugging the behavior of individual
functions.
Signed-off-by: Julia Suvorova
---
hw/virtio/virtio-pci.c | 10 ++
hw/virtio/virtio-pci.h | 1 +
2 files changed, 11 insertions(+)
diff --git
n Slot Capability register, so we
can switch it off. But it's only for pcie devices, can't say anything
about conventional pci.
Best regards, Julia Suvorova.
in the line in the qemu-img.texi file ?
No reason, just an accident.
> All the other options here are in alphabetical order, so logically
> '-i aio' should go in neither of those two places but after
> '--flush-interval'...
>
> (This change is a conflict with the in-flight qemu-img conversion
> to rST; to fix that up I'm going to just change the rST conversion
> to exactly follow the texi here; we can fix the option ordering
> as a followup patch.)
Ok. I'll send a follow-up patch.
Best regards, Julia Suvorova.
The '-i AIO' option was accidentally placed after '-n' and '-t'. Move it
after '--flush-interval'.
Signed-off-by: Julia Suvorova
---
docs/interop/qemu-img.rst | 8
qemu-img-cmds.hx | 4 ++--
2 files changed, 6 insertions(+), 6 dele
Signed-off-by: Julia Suvorova
---
include/hw/pci/pci_bridge.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index ba488818d2..99c674e949 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
.com/qemu-project/qemu/-/issues/641
> > >
> > > This regression is significant, because it has broken the out of the
> > > box default configuration that OpenStack uses for booting all VMs.
> > > They add 16 pcie-root-ports by defalt to allow empty slots for de
g IO'
[2] https://gitlab.com/qemu-project/qemu/-/issues/641
[3] https://bugzilla.redhat.com/show_bug.cgi?id=2006409
Julia Suvorova (5):
hw/pci/pcie_port: Rename 'native-hotplug' to 'native-hpc-bit'
hw/acpi/ich9: Add compatibility option for 'native-hpc-bit'
b
oot-ports in 6.1 too.
[1] https://gitlab.com/qemu-project/qemu/-/issues/641
[2] https://bugzilla.redhat.com/show_bug.cgi?id=2006409
Signed-off-by: Julia Suvorova
---
include/hw/acpi/ich9.h | 1 +
hw/acpi/ich9.c | 18 ++
hw/i386/pc.c | 2 ++
hw/i386/pc_q35.c
Local0 &= 0x1F
+Local0 &= 0x1E
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test-allowed-diff.h | 16
tests/data/acpi/q35/DSDT| Bin 8289 -> 8289 bytes
tests/data/acpi/q35/DSDT.acpihmat | Bin
Rename the option to better represent its function - toggle Hot-Plug
Capable bit in the PCIe Slot Capability.
Signed-off-by: Julia Suvorova
---
include/hw/pci/pcie_port.h | 2 +-
hw/i386/pc_q35.c | 2 +-
hw/pci-bridge/gen_pcie_root_port.c | 6 +-
hw/pci/pcie.c
Prepare for changing the _OSC method in q35 DSDT.
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test-allowed-diff.h | 16
1 file changed, 16 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index
:
--global ICH9-LPC.acpi-pci-hotplug-with-bridge-support=off
Change the bit in _OSC method so that the OS selects ACPI PCI Hot-plug
instead of PCIe Native.
[1] https://gitlab.com/qemu-project/qemu/-/issues/641
[2] https://bugzilla.redhat.com/show_bug.cgi?id=2006409
Signed-off-by: Julia
On Wed, Nov 10, 2021 at 2:58 PM Igor Mammedov wrote:
>
> On Wed, 10 Nov 2021 02:21:34 -0500
> "Michael S. Tsirkin" wrote:
>
> > On Wed, Nov 10, 2021 at 06:30:13AM +0100, Julia Suvorova wrote:
> > > There are two ways to enable ACPI PCI Hot-plug:
> > >
hing KVM's limit is unblock upstream
> > > testing so it would be easier to push limits for others.
> > > Downstream can clamp that value down to whatever it deems as supported.
> > >
> > > > Going beyond 710 CPUs value requires using the SMBIOS 3 entry
/show_bug.cgi?id=2169904
Signed-off-by: Julia Suvorova
---
hw/smbios/smbios.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index b4243de735..903fd22350 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -749,14 +749,16
ng Structure "NVDIMM State Flags" Bit 3
Fixes: dbd730e859 ("nvdimm: check -object memory-backend-file, readonly=on
option")
Signed-off-by: Julia Suvorova
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Pankaj Gupta
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: David Hildenbrand
--
On Tue, May 31, 2022 at 5:32 PM Stefan Hajnoczi wrote:
>
> On Tue, May 31, 2022 at 04:51:47PM +0200, Julia Suvorova wrote:
> > In the ACPI specification [1], the 'unarmed' bit is set when a device
> > cannot accept a persistent write. This means that when a memdev is
On Tue, Jun 14, 2022 at 11:50 AM David Hildenbrand wrote:
>
> On 14.06.22 10:54, Igor Mammedov wrote:
> > On Mon, 13 Jun 2022 16:09:53 +0100
> > Stefan Hajnoczi wrote:
> >
> >> On Mon, Jun 13, 2022 at 05:01:10PM +0200, Julia Suvorova wrote:
> >>> On
: add core_count2 to smbios table type 4")
Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2169904
Signed-off-by: Julia Suvorova
---
v2:
* add fixes tag
* check tbl_len instead of ep_type
hw/smbios/smbios.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a
EJx: Eject Device, x=0-9
+{
+CEJ0 (0xFF)
+}
+
+Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+{
+ COST (0x0101, Arg0, Arg1, Arg2)
+}
+}
...
Signed-off
.
core_enabled2 and thread_count2 fields work the same way.
Signed-off-by: Julia Suvorova
---
include/hw/firmware/smbios.h | 3 +++
hw/smbios/smbios.c | 11 +--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/hw/firmware/smbios.h b/include/hw/firmware
...
Core Count: 24
Core Enabled: 24
Thread Count: 1
...
Big update in the bios-tables-test as it couldn't work with SMBIOS 3.0.
Julia Suvorova (5):
hw/smbios: add core_count2 to smbios table type 4
bios-tables-test: teach test to use smbios 3.0 tables
Introduce the 64-bit entry point. Since we no longer have a total
number of structures, stop checking for the new ones at the EOF
structure (type 127).
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test.c | 101 -
1 file changed, 75 insertions(+), 26
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 +++
tests/data/acpi/q35/APIC.core-count2| 0
tests/data/acpi/q35/DSDT.core-count2| 0
tests/data/acpi/q35/FACP.core-count2| 0
4 files changed, 3 insertions(+)
create mode 100644 tests
The new test is run with a large number of cpus and checks if the
core_count field in smbios_cpu_test (structure type 4) is correct.
Choose q35 as it allows to run with -smp > 255.
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test.c | 35 +-
1 f
On Mon, May 30, 2022 at 8:11 AM Ani Sinha wrote:
>
> On Fri, May 27, 2022 at 10:27 PM Julia Suvorova wrote:
> >
> > Introduce the 64-bit entry point. Since we no longer have a total
> > number of structures, stop checking for the new ones at the EOF
> > structure
On Sat, May 28, 2022 at 7:22 AM Ani Sinha wrote:
>
>
>
> On Fri, 27 May 2022, Julia Suvorova wrote:
>
> > The new test is run with a large number of cpus and checks if the
> > core_count field in smbios_cpu_test (structure type 4) is correct.
> >
> > Choose
On Sat, May 28, 2022 at 6:34 AM Ani Sinha wrote:
>
>
>
> On Fri, 27 May 2022, Julia Suvorova wrote:
>
> > In order to use the increased number of cpus, we need to bring smbios
> > tables in line with the SMBIOS 3.0 specification. This allows us to
> > intr
ng Structure "NVDIMM State Flags" Bit 3
Signed-off-by: Julia Suvorova
---
hw/mem/nvdimm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c
index 7c7d81..bfb76818c1 100644
--- a/hw/mem/nvdimm.c
+++ b/hw/mem/nvdimm.c
@
On Tue, May 31, 2022 at 3:14 PM Ani Sinha wrote:
>
> On Tue, May 31, 2022 at 5:53 PM Julia Suvorova wrote:
> >
> > On Sat, May 28, 2022 at 7:22 AM Ani Sinha wrote:
> > >
> > >
> > >
> > > On Fri, 27 May 2022, Julia Suvorova wrote:
> &g
On Thu, Jun 2, 2022 at 5:04 PM Igor Mammedov wrote:
>
> On Fri, 27 May 2022 18:56:48 +0200
> Julia Suvorova wrote:
>
> > Introduce the 64-bit entry point. Since we no longer have a total
> > number of structures, stop checking for the new ones at the EOF
> > struct
On Thu, Jun 2, 2022 at 4:35 PM Igor Mammedov wrote:
>
> On Thu, 2 Jun 2022 16:31:25 +0200
> Igor Mammedov wrote:
>
> > On Tue, 31 May 2022 14:40:15 +0200
> > Julia Suvorova wrote:
> >
> > > On Sat, May 28, 2022 at 6:34 AM Ani Sinha wrote:
> > &g
On Thu, Jun 2, 2022 at 5:20 PM Igor Mammedov wrote:
>
> On Fri, 27 May 2022 18:56:50 +0200
> Julia Suvorova wrote:
>
> > The new test is run with a large number of cpus and checks if the
> > core_count field in smbios_cpu_test (structure type 4) is correct.
> >
>
.
core_enabled2 and thread_count2 fields work the same way.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
Message-Id: <20220731162141.178443-2-jus...@redhat.com>
---
hw/smbios/smbios.c | 19 ---
hw/smbios/smbios_build.h | 9 +++--
include/hw/fi
Signed-off-by: Julia Suvorova
Message-Id: <20220731162141.178443-4-jus...@redhat.com>
---
tests/data/acpi/q35/APIC.core-count2| 0
tests/data/acpi/q35/DSDT.core-count2| 0
tests/data/acpi/q35/FACP.core-count2| 0
tests/qtest/bios-tables-test-allowed-diff.h | 3
_OST: OSPM Status Indication
+{
+COST (0xFF, Arg0, Arg1, Arg2)
+}
+}
+
...
Signed-off-by: Julia Suvorova
Message-Id: <20220731162141.178443-6-jus...@redhat.com>
---
tests/data/acpi/q35/APIC.core-count2| Bin 0 -> 2478 byt
Introduce the 64-bit entry point. Since we no longer have a total
number of structures, stop checking for the new ones at the EOF
structure (type 127).
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
Message-Id: <20220731162141.178443-3-jus...@redhat.com>
---
tests/qtest/bios-
The new test is run with a large number of cpus and checks if the
core_count field in smbios_cpu_test (structure type 4) is correct.
Choose q35 as it allows to run with -smp > 255.
Signed-off-by: Julia Suvorova
Message-Id: <20220731162141.178443-5-jus...@redhat.com>
---
tests/qtest/bi
on of the structure loop
[Ani]
Julia Suvorova (5):
hw/smbios: add core_count2 to smbios table type 4
bios-tables-test: teach test to use smbios 3.0 tables
tests/acpi: allow changes for core_count2 test
bios-tables-test: add test for number of cores > 255
tests/acpi: update tables for
ng Structure "NVDIMM State Flags" Bit 3
Signed-off-by: Julia Suvorova
Reviewed-by: Stefan Hajnoczi
---
hw/mem/nvdimm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c
index 7c7d81..bfb76818c1 100644
--- a/hw/mem/nvdimm.c
+++ b/hw
On Tue, Oct 18, 2022 at 6:49 PM Michael S. Tsirkin wrote:
>
> On Tue, Oct 18, 2022 at 06:17:55PM +0200, Philippe Mathieu-Daudé wrote:
> > On 18/10/22 17:25, Julia Suvorova wrote:
> > > In the ACPI specification [1], the 'unarmed' bit is set when a device
> &g
On Thu, Jun 22, 2023 at 7:48 PM Michael S. Tsirkin wrote:
>
> On Thu, Jun 22, 2023 at 05:46:40PM +0200, Julia Suvorova wrote:
> > On Thu, Jun 22, 2023 at 12:34 PM Ani Sinha wrote:
> > >
> > > PCI Express ports only have one slot, so PCI Express devices can only be
; +error_setg(errp, "PCI: slot %d is not valid for %s,"
> + " PCI express devices can only be plugged into slot 0.",
This is not technically correct, because downstream ports and root
ports are also PCIe devices, and they can have di
gt;
> > > I make use of the find_q35() function in later patches, but I agree now a
> > majority of this patch is a bit different.
>
> There is likely an existing alternative already. (probably introduced by ACPI
> PIC hotplug for q35)
There is a similar function acpi_get_
From: Daniel Stone
A new ioctl to shuttle information between host and guest about the
actual buffer allocation, which can be used for interop between GL and
Vulkan when supporting standard window systems.
Signed-off-by: Daniel Stone
Co-developed-by: Julia Zhang
Signed-off-by: Julia Zhang
Hi all,
Sorry to late reply. This is v2 of the implementation of
resource_query_layout. This adds a new ioctl to let guest query information
of host resource, which is originally from Daniel Stone. We add some
changes to support query the correct stride of host resource before it's
created, which
/-/merge_requests/23896
virglrenderer mr: https:
//gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1268
Daniel Stone (1):
virgl: Implement resource_query_layout
Julia Zhang (1):
virgl: Modify resource_query_layout
hw/display/virtio-gpu-base.c| 4 +++
hw/display/virtio-gpu
From: Daniel Stone
A new ioctl to shuttle information between host and guest about the
actual buffer allocation, which can be used for interop between GL and
Vulkan when supporting standard window systems.
---
hw/display/virtio-gpu-base.c| 4 ++
hw/display/virtio-gpu-virgl.c
Modify resource_query_layout to handle the use case that need to query
correct stride for guest linear resource before it is created.
Signed-off-by: Julia Zhang
---
hw/display/virtio-gpu-virgl.c | 20 +++-
include/standard-headers/linux/virtio_gpu.h | 8
gular expressions and python code, so I wonder if
this is the best way to do it.
thanks,
julia
On Fri, 12 May 2017, Philippe Mathieu-Daudé wrote:
> If you have coccinelle installed you can apply this script using:
>
> $ spatch \
> --macro-file scripts/cocci-macro-file.h \
>
On Fri, 12 May 2017, Philippe Mathieu-Daudé wrote:
> Hi Julia,
>
> Sorry I planed to send you another mail but sent this mail to QEMU list first.
>
> > I don't think I have seen earlier versions of this script. Are you
> > proposing it to be added to the kernel?
pt, now it seems to hang trying to
> parse "target/arm/translate.c".
Try using the arguments --debug and --show-trying. This will help you see
what rule it is stuck on, and what function. If the function is just very
complicated and the file is not important for transforming, you may just
w
27;ve got a Coccinelle patch (mostly) working now - but it has one
> > shortfall - I found places in tests/check-qdict.c that coccinelle
> > didn't, and traced it to the fact that our use of g_assert_cmpint(expr,
> > ==, expr) throws off the coccinelle parser so badly that it sile
On Wed, 5 Apr 2017, Richard W.M. Jones wrote:
> On Wed, Apr 05, 2017 at 10:21:13AM +0200, Julia Lawall wrote:
> >
> >
> > On Wed, 5 Apr 2017, Richard W.M. Jones wrote:
> >
> > > On Tue, Apr 04, 2017 at 05:41:08PM -0500, Eric Blake wrote:
> > &g
]
* explain magic numbers in _OSC [Igor]
* drop build_q35_pci_hotplug() wrapper [Igor]
Julia Suvorova (4):
hw/acpi/ich9: Trace ich9_gpe_readb()/writeb()
hw/i386/acpi-build: Add ACPI PCI hot-plug methods to q35
hw/i386/acpi-build: Turn off support of PCIe native hot-plug and SHPC
in _OSC
Add trace events similar to piix4_gpe_readb() to check gpe status.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
---
hw/acpi/ich9.c | 7 ++-
hw/acpi/trace-events | 4
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index
Implement notifications and gpe to support q35 ACPI PCI hot-plug.
Use 0xcc4 - 0xcd7 range for 'acpi-pci-hotplug' io ports.
Signed-off-by: Julia Suvorova
---
include/hw/acpi/pcihp.h | 3 ++-
hw/acpi/pcihp.c | 10 ++
hw/acpi/piix4.c | 2 +-
hw/i386/acpi-build
Other methods may be used if the system is capable of this and the _OSC bit
is set. Disable them explicitly to force ACPI PCI hot-plug use. The older
versions will still use PCIe native.
Signed-off-by: Julia Suvorova
---
hw/i386/acpi-build.h | 11 +++
hw/i386/acpi-build.c | 21
Add acpi_pcihp to ich9_pm and use ACPI PCI hot-plug by default.
Signed-off-by: Julia Suvorova
---
Note: New pc_compats are usually added shortly after release.
I will switch to pc_compat_5_1 when it becomes available.
hw/i386/acpi-build.h | 1 +
include/hw/acpi/ich9.h | 3 +++
hw
Julia Suvorova (2):
hw/pci/pcie: Forbid hot-plug if it's disabled on the slot
hw/pci/pcie: Replace PCI_DEVICE() casts with existing variable
hw/pci/pcie.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
--
2.25.3
Raise an error when trying to hot-plug/unplug a device through QMP to a device
with disabled hot-plug capability. This makes the device behaviour more
consistent and provides an explanation of the failure in the case of
asynchronous unplug.
Signed-off-by: Julia Suvorova
---
v2:
* Change
A little cleanup is possible because of hotplug_pdev introduction.
Signed-off-by: Julia Suvorova
---
hw/pci/pcie.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 6b48d04d2c..abc99b6eff 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
On Mon, Apr 27, 2020 at 10:11 PM wrote:
>
> Patchew URL:
> https://patchew.org/QEMU/20200427182440.92433-1-jus...@redhat.com/
>
>
>
> Hi,
>
> This series failed the docker-quick@centos7 build test. Please find the
> testing commands and
> their output below. If you have Docker installed, you can
Add trace events similar to piix4_gpe_readb() to check gpe status.
Signed-off-by: Julia Suvorova
---
hw/acpi/ich9.c | 7 ++-
hw/acpi/trace-events | 4
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 2d204babc6..0fdd736da4
PCIe native hot-plug has numerous problems with racing events and unpredictable
guest behaviour (Windows). Switching to ACPI hot-plug for now.
Tested on RHEL 8 and Windows 2019.
pxb-pcie is not yet supported.
Julia Suvorova (5):
hw/acpi/pcihp: Introduce find_host()
hw/acpi/ich9: Trace
Returns the current host bus with ACPI PCI hot-plug support: q35 or i440fx.
Signed-off-by: Julia Suvorova
---
hw/i386/acpi-build.h | 2 ++
hw/acpi/pcihp.c | 13 +
hw/i386/acpi-build.c | 2 +-
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.h
Implement notifications and gpe to support q35 ACPI PCI hot-plug.
The addresses specified in [1] remain the same to make fewer changes.
[1] docs/spec/acpi_pci_hotplug.txt
Signed-off-by: Julia Suvorova
---
hw/i386/acpi-build.c | 20 +---
1 file changed, 13 insertions(+), 7
Other methods may be used if the system is capable of this and the _OSC bit
is set. Disable them explicitly to force ACPI PCI hot-plug use. The older
versions will still use PCIe native.
Signed-off-by: Julia Suvorova
---
hw/i386/acpi-build.c | 12
1 file changed, 8 insertions(+), 4
Add acpi_pcihp to ich9_pm and use ACPI PCI hot-plug by default.
Signed-off-by: Julia Suvorova
---
include/hw/acpi/ich9.h | 3 +++
hw/acpi/ich9.c | 45 ++
hw/acpi/pcihp.c| 3 ++-
hw/i386/pc.c | 4 +++-
4 files changed, 53
in case it is is not initialized,
probing of PCI devices will fall back to normal process and use type1
access.
Enable the feature unconditionally.
[1]: https://lore.kernel.org/kvm/20200730193510.578309-1-jus...@redhat.com/
Signed-off-by: Julia Suvorova
---
The feature is in the review phase
On Thu, Jan 16, 2020 at 1:36 PM David Hildenbrand wrote:
>
> On 15.01.20 23:40, Julia Suvorova wrote:
> > Hot-unplug takes some time due to communication with the guest.
> > Do not change the device while freeing up resources.
> >
> > Signed-off-by: Julia Su
On Thu, Jan 23, 2020 at 3:17 PM David Hildenbrand wrote:
>
> On 23.01.20 15:08, Julia Suvorova wrote:
> > On Thu, Jan 16, 2020 at 1:36 PM David Hildenbrand wrote:
> >>
> >> On 15.01.20 23:40, Julia Suvorova wrote:
> >>> Hot-unplug takes some time due to
Add acpi_pcihp to ich9_pm as part of
'acpi-pci-hotplug-with-bridge-support' option. Set default to false.
Signed-off-by: Julia Suvorova
---
hw/i386/acpi-build.h | 1 +
include/hw/acpi/ich9.h | 3 ++
hw/acpi/ich9.c | 68 ++
hw/ac
Implement notifications and gpe to support q35 ACPI PCI hot-plug.
Use 0xcc4 - 0xcd7 range for 'acpi-pci-hotplug' io ports.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
---
hw/i386/acpi-build.h| 4
include/hw/acpi/ich9.h | 2 ++
include/hw/acpi/pcihp.h | 3 ++
ed bridges
* use 'acpi-root-pci-hotplug'
* add migration states [Igor]
* minor style changes
v2:
* new ioport range for acpiphp [Gerd]
* drop find_pci_host() [Igor]
* explain magic numbers in _OSC [Igor]
* drop build_q35_pci_hotplug() wrapper [Igor]
Julia Suv
e 'hotplug=off' on the port means all hot-plug types are disabled.
Signed-off-by: Julia Suvorova
---
include/hw/boards.h | 1 +
hw/acpi/pcihp.c | 8
hw/core/machine.c | 19 +++
hw/i386/pc_q35.c| 8
hw/pci/pcie.c | 11 ++-
-hotplug-with-bridge-support=off
Signed-off-by: Julia Suvorova
---
hw/acpi/ich9.c | 2 +-
hw/i386/pc.c | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index f6819c4f2a..e7b2cd9719 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -425,7
All DSDT Q35 tables will be modified because ACPI hot-plug is enabled
by default.
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test-allowed-diff.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables
}
+
...
+Method (DVNT, 2, NotSerialized)
+{
+If ((Arg0 & One))
+{
+Notify (S00, Arg1)
+}
...
Signed-off-by: Julia Suvorova
---
tests/qtest/bios-tables-test-allowed-diff.h | 11 ---
tests/dat
PCI Express does not allow hot-plug on pcie.0. Check for Q35 in
acpi_pcihp_disable_root_bus() to be able to forbid hot-plug using the
'acpi-root-pci-hotplug' flag.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
---
hw/acpi/pcihp.c | 3 ++-
1 file changed, 2 insertions(+),
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/pci-host/i440fx.h | 2 +-
> include/hw/pci-host/pam.h| 2 ++
> include/hw/pci-host/q35.h| 2 +-
> hw/pci-host/pam.c| 2 +-
> hw/pci-host/q35.c| 2 +-
> 5 files changed, 6 insertio
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