Hi,
I am trying to run linux over qemu-system-arm emulating a nuri or
smdkc210 Exynos 4210 based board.
To do this I fetched the last qemu (from git://git.qemu.org/qemu.git)
and built it with "./configure --target-list=arm-softmmu.
Then I fetched the latest linux image for samsung processor
Hello Igor,
Thanks for you reply and your time.
JC
On 09/05/2012 02:38 PM, Igor Mitsyanko wrote:
On 09/04/2012 02:13 AM, Jean-Christophe DUBOIS wrote:
Hello, Jean!
I've just tried to do the same thing you're trying to do, it works for
me if I remove earlyprintk from append.
Ye
This patch is providing a complete version of the EPIT timer.
Note, however that the GPT timer in the same file is still not
complete.
Signed-off-by: Jean-Christophe DUBOIS
---
hw/timer/imx_timer.c | 250 ++
1 file changed, 192 insertions(+), 58
On 04/10/2013 01:27 AM, Peter Chubb wrote:
This patch is providing a complete version of the EPIT timer.
Note, however that the GPT timer in the same file is still not
complete.
Thanks!
Comments in=line below.
@@ -411,7 +441,7 @@ static int imx_timerg_init(SysBusDevice *dev)
#define CR_SWR
On 04/10/2013 10:26 AM, Peter Maydell wrote:
On 9 April 2013 23:32, Jean-Christophe DUBOIS wrote:
@@ -605,11 +735,13 @@ static const VMStateDescription vmstate_imx_timerp = {
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32(cr, IMXTimerPState
This patch is providing a complete version of the EPIT timer.
Note, however that the GPT timer in the same file is still not
complete.
Signed-off-by: Jean-Christophe DUBOIS
Change from v1:
- bump up the version number on VMSTATE struct
- fix comment
---
hw/timer/imx_timer.c | 253
This patch is providing a complete version of the EPIT timer.
Note, however that the GPT timer in the same file is still not
complete.
Signed-off-by: Jean-Christophe DUBOIS
Change from v2:
- change all version number in VMSTATE struct.
Change from v1:
- bump up the version number on
On 04/10/2013 10:07 PM, Peter Maydell wrote:
On 10 April 2013 21:02, Jean-Christophe DUBOIS wrote:
static const VMStateDescription vmstate_imx_timerp = {
.name = "imx-timerp",
-.version_id = 1,
+.version_id = 2,
.minimum_version_id = 1,
.minimum_version_
This is an initial port of the Freescale i.MX25 processor.
This allow a minimally configured linux kernel to boot on Qemu.
Signed-off-by: Jean-Christophe DUBOIS
---
hw/arm/Makefile.objs |1 +
hw/arm/imx25_3ds.c | 199 ++
2 files changed
This port is based on the cold fire FEC emulator.
A generic PHY was added (borrowed from lan9118).
The buffer management is also modified as buffers are
slightly different between coldfire and i.MX.
Signed-off-by: Jean-Christophe DUBOIS
---
default-configs/arm-softmmu.mak | 1 +
hw/net
This is an initial port of the Freescale i.MX25 processor.
This allow a minimally configured linux kernel to boot on Qemu.
It also handle the newly added FEC ethernet device.
Signed-off-by: Jean-Christophe DUBOIS
---
hw/arm/Makefile.objs | 1 +
hw/arm/imx25_3ds.c | 218
During Xvisor development, it was noted that qemu did not return
the correct domain value in the C15 [Data] FSR register (C5).
This patch is a proposal to fix it.
Signed-off-by: Jean-Christophe DUBOIS
---
--- qemu-0.15.1.org/target-arm/helper.c2011-10-12 18:41:43.0
+0200
+++ qemu
During Xvisor development, it was noted that qemu did not return
the correct domain value in the Cp15 [Data] FSR register (C5).
This patch is a proposal to fix it.
Signed-off-by: Jean-Christophe DUBOIS
---
--- qemu-0.15.1.org/target-arm/helper.c2011-10-12 18:41:43.0
+0200
-realview/realview_pba8.c#L274
Signed-off-by: Jean-Christophe DUBOIS
---
hw/arm_sysctl.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 17cf6f7..aef271e 100644
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -237,7 +237,7 @@ static void
/com.arm.doc.dui0440b/CACCHBFB.html
Motherboard Express µATX: BOARD_ID = 0x190 = BOARD_ID_VEXPRESS
No reset register
v2:
- Add multiple boards support
- fix coding style
- Added a BOARD_ID descriptor for unsupported baseboards.
Signed-off-by: Jean-Christophe DUBOIS
---
hw/arm_sysctl.c | 43
During Xvisor development, it was noted that qemu did not return
the correct domain value in the Cp15 [Data] FSR register (C5).
This patch is a proposal to fix it.
v2:
- fix coding style
- rebase on git.
Signed-off-by: Jean-Christophe DUBOIS
---
target-arm/helper.c | 26
On 06/11/2011 18:33, Peter Maydell wrote:
On 5 November 2011 11:42, Jean-Christophe DUBOIS wrote:
During Xvisor development, it was noted that qemu did not return
the correct domain value in the Cp15 [Data] FSR register (C5).
This patch is a proposal to fix it.
v2:
- fix coding style
/topic/com.arm.doc.dui0440b/CACCHBFB.html
Motherboard Express µATX: BOARD_ID = 0x190 = BOARD_ID_VEXPRESS
No reset register
Signed-off-by: Jean-Christophe DUBOIS
---
v3:
- change patch name to something more meaningful
- move version information after the commit message.
- remove added BOARD_ID
On 04/28/2013 11:29 PM, Peter Chubb wrote:
"Jean-Christophe" == Jean-Christophe DUBOIS writes:
Jean-Christophe> This patch is providing a complete version of the
Jean-Christophe> EPIT timer. Note, however that the GPT timer in the
Jean-Christophe> same file is still not co
On 04/29/2013 06:49 PM, Peter Maydell wrote:
On 29 April 2013 17:39, Jean-Christophe DUBOIS wrote:
Peter (Maydel), will you pick it up as is (actually the v3 version) or do I
need to send a new version of the patch (a v4) ?
The last on-list version still has the wrong vmstate version
fields
Signed-off-by: Jean-Christophe DUBOIS
---
default-configs/arm-softmmu.mak | 2 +
hw/i2c/Makefile.objs| 1 +
hw/i2c/imx_i2c.c| 374
3 files changed, 377 insertions(+)
create mode 100644 hw/i2c/imx_i2c.c
diff --git a
Signed-off-by: Jean-Christophe DUBOIS
---
hw/arm/imx25_3ds.c | 48
1 file changed, 32 insertions(+), 16 deletions(-)
diff --git a/hw/arm/imx25_3ds.c b/hw/arm/imx25_3ds.c
index 9de4941..aba9279 100644
--- a/hw/arm/imx25_3ds.c
+++ b/hw/arm
interest to somebody?
If so, what it the process to get it adopted in an official tree.
Thanks
JC
On 04/26/2013 04:02 PM, Jean-Christophe DUBOIS wrote:
This is an initial port of the Freescale i.MX25 processor.
This allow a minimally configured linux kernel to boot on Qemu.
It also handle
-Christophe DUBOIS
wrote:
ERROR: return is not a function, parentheses are not required
#148: FILE: hw/i2c/imx_i2c.c:114:
+return (s->i2cr & I2CR_IEN);
>From checkpatch, here and below.
Will do.
+}
+
+static inline bool imx_i2c_interrupt_is_enabled(imx_i2c_state *s)
+{
+retur
Andreas,
On 05/02/2013 02:38 PM, Andreas Färber wrote:
Hi,
Am 01.05.2013 21:53, schrieb Jean-Christophe DUBOIS:
Signed-off-by: Jean-Christophe DUBOIS
---
default-configs/arm-softmmu.mak | 2 +
hw/i2c/Makefile.objs| 1 +
hw/i2c/imx_i2c.c| 374
On 05/03/2013 05:20 PM, Andreas Färber wrote:
Am 03.05.2013 17:16, schrieb Jean-Christophe DUBOIS:
Andreas,
On 05/02/2013 02:38 PM, Andreas Färber wrote:
Hi,
Am 01.05.2013 21:53, schrieb Jean-Christophe DUBOIS:
Signed-off-by: Jean-Christophe DUBOIS
---
default-configs/arm-softmmu.mak
On 05/03/2013 06:41 PM, Andreas Färber wrote:
CCtests/libi2c-imx.o
LINK tests/tmp105-test
CCtests/ds1338-test.o
LINK tests/ds1338-test
GTESTER check-qtest-arm
Kernel image must be specified
Without seeing your code and since tmp105-test is working on my side, I
can only gues
On 05/04/2013 10:29 AM, Peter Maydell wrote:
On 4 May 2013 09:27, Andreas Färber wrote:
Am 04.05.2013 10:22, schrieb Jean-Christophe DUBOIS:
Do you mean arm_load_kernel() should test for qtest_enable() or should I
call arm_load_kernel() only if !qtest_enable() (there is not much
platform
Jean-Christophe DUBOIS (4):
Add i.MX FEC Ethernet driver
Add i.MX I2C controller driver.
Add i.MX25 3DS evaluation board support.
Add qtest support for i.MX I2C device emulation.
default-configs/arm-softmmu.mak | 3 +
hw/arm/Makefile.objs| 1 +
hw/arm/imx25_3ds.c
not present on the real
board.
Signed-off-by: Jean-Christophe DUBOIS
---
hw/arm/Makefile.objs | 1 +
hw/arm/imx25_3ds.c | 258 +++
2 files changed, 259 insertions(+)
create mode 100644 hw/arm/imx25_3ds.c
diff --git a/hw/arm/Makefile.objs b/hw
This is based on the mcf_fec.c FEC implementation for ColdFire.
* a generic phy was added (borrowed from lan9118).
* The buffer management is also modified as buffers are
slightly different between coldfire and i.MX.
Signed-off-by: Jean-Christophe DUBOIS
---
default-configs/arm
This is using a ds1338 RTC chip on the i2c bus. This RTC
chip is nop present on the real board
Signed-off-by: Jean-Christophe DUBOIS
---
tests/Makefile | 3 +
tests/ds1338-test.c| 64 ++
tests/libqos/i2c-imx.c | 224
The slave mode is not implemented.
Signed-off-by: Jean-Christophe DUBOIS
---
default-configs/arm-softmmu.mak | 2 +
hw/i2c/Makefile.objs| 1 +
hw/i2c/imx_i2c.c| 383
include/hw/arm/imx.h| 1 +
4 files changed
On 05/04/2013 06:53 PM, Andreas Färber wrote:
Am 04.05.2013 16:09, schrieb Jean-Christophe DUBOIS:
+#include "qemu/bswap.h"
Is this one needed?
No, I will remove it.
+enum IMXI2CRegisters {
+IMX_I2C_IADR = 0x00,
+IMX_I2C_IFDR = 0x04,
+IMX_I2C_I2CR = 0x08,
+IM
On 05/05/2013 05:14 AM, Peter Crosthwaite wrote:
Hi JC,
Thanks for actioning the comments.
On Sun, May 5, 2013 at 12:09 AM, Jean-Christophe DUBOIS
wrote:
The slave mode is not implemented.
Signed-off-by: Jean-Christophe DUBOIS
---
As a general rule you need to indicate changes between the
On 05/05/2013 01:53 PM, Peter Crosthwaite wrote:
Hi Peter,
On Sun, May 5, 2013 at 9:41 PM, Peter Maydell wrote:
On 5 May 2013 11:53, Peter Crosthwaite wrote:
On Sun, May 5, 2013 at 8:47 PM, Peter Maydell wrote:
On 5 May 2013 04:58, Jean-Christophe DUBOIS wrote:
no extract16() macro
On 05/05/2013 01:34 PM, Andreas Färber wrote:
Am 05.05.2013 05:14, schrieb Peter Crosthwaite:
On Sun, May 5, 2013 at 12:09 AM, Jean-Christophe DUBOIS
wrote:
diff --git a/hw/i2c/imx_i2c.c b/hw/i2c/imx_i2c.c
new file mode 100644
index 000..5b0d046
--- /dev/null
+++ b/hw/i2c/imx_i2c.c
On 05/05/2013 05:11 AM, Peter Crosthwaite wrote:
Hi JC,
On Sun, May 5, 2013 at 12:09 AM, Jean-Christophe DUBOIS
wrote:
This is based on the mcf_fec.c FEC implementation for ColdFire.
* a generic phy was added (borrowed from lan9118).
* The buffer management is also modified as
On 05/05/2013 03:31 PM, Andreas Färber wrote:
Am 05.05.2013 15:14, schrieb Jean-Christophe DUBOIS:
On 05/05/2013 05:11 AM, Peter Crosthwaite wrote:
Hi JC,
On Sun, May 5, 2013 at 12:09 AM, Jean-Christophe DUBOIS
wrote:
This is based on the mcf_fec.c FEC implementation for ColdFire.
Note
It also adds qtest support for the I2C controller.
Jean-Christophe DUBOIS (4):
Add i.MX FEC Ethernet emulator
Add i.MX I2C controller emulator
Add i.MX25 3DS evaluation board support.
Add qtest support for i.MX I2C device emulation.
default-configs/arm-softmmu.mak | 3 +
hw/arm
not present on the real
board.
Changes since v1:
* Added a ds1338 I2C device for qtest purpose.
Changes since v2:
* none
Signed-off-by: Jean-Christophe DUBOIS
---
default-configs/arm-softmmu.mak | 3 +
hw/arm/Makefile.objs| 1 +
hw/arm/imx25_3ds.c | 258
Controller emulation.
+ *
+ * Copyright (c) 2013 Jean-Christophe Dubois.
+ *
+ * Based on Coldfire Fast Ethernet Controller emulation.
+ *
+ * Copyright (c) 2007 CodeSourcery.
+ *
+ * This code is licensed under the GPL
+ */
+
+#include "qemu/bitops.h"
+
+#include "sysemu/dma.h"
+
.
* improve QOM cast
* separate regs definition in its own file (to be reused by qtest)
Signed-off-by: Jean-Christophe DUBOIS
---
hw/i2c/Makefile.objs | 1 +
hw/i2c/imx_i2c.c | 352 ++
hw/i2c/imx_i2c_regs.h | 63 +
3 files changed, 416
This is using a ds1338 RTC chip on the i2c bus. This RTC
chip is not present on the real board.
Changes since v1:
* not present on v1
Changes since v2:
* use a common header file for I2C regs definition
Signed-off-by: Jean-Christophe DUBOIS
---
tests/Makefile | 3 +
tests
On 05/06/2013 04:19 AM, Peter Crosthwaite wrote:
Hi JC,
On Mon, May 6, 2013 at 12:28 AM, Jean-Christophe DUBOIS
wrote:
The slave mode is not implemented.
Changes since v1:
* use QOM cast
* run checkpatch on code
* added restrictin on MemoryRegionOps
* use DeviceClass
It also adds qtest support for the I2C controller.
Jean-Christophe DUBOIS (4):
Add i.MX FEC Ethernet emulator
Add i.MX I2C controller emulator
Add i.MX25 3DS evaluation board support.
Add qtest support for i.MX I2C device emulation.
default-configs/arm-softmmu.mak | 3 +
hw/arm
This is based on the mcf_fec.c FEC implementation for ColdFire.
* a generic phy was added (borrowed from lan9118).
* The buffer management is also modified as buffers are
slightly different between coldfire and i.MX.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since V1
This is using a ds1338 RTC chip on the i2c bus. This RTC
chip is not present on the real board.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since v1:
* not present on v1
Changes since v2:
* use a common header file for I2C regs definition
Changes since v3:
* rework GPL
not present on the real
board.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since v1:
* Added a ds1338 I2C device for qtest purpose.
Changes since v2:
* none
Changes since v3:
* Rework GPL header
* use I2C constructor helper.
hw/arm/Makefile.objs | 1 +
hw/arm
The slave mode is not implemented.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since v1:
* use QOM cast
* run checkpatch on code
* added restrictin on MemoryRegionOps
* use DeviceClass::realise as init function
Changes since v2:
* use CamelCase for state type
i.MX25 PDK only has 64 MB DDR
Signed-off-by: Jean-Christophe DUBOIS
---
arch/arm/board/imx25/dts/3dstack/3dstack.dtsi| 3 ++-
arch/arm/board/imx25/dts/3dstack/one_guest_versatile.dts | 5 +
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm/board/imx25/dts
Sorry for the 14/14 in the subject.
JC
On 05/07/2013 11:29 AM, Jean-Christophe DUBOIS wrote:
i.MX25 PDK only has 64 MB DDR
Signed-off-by: Jean-Christophe DUBOIS
---
arch/arm/board/imx25/dts/3dstack/3dstack.dtsi| 3 ++-
arch/arm/board/imx25/dts/3dstack/one_guest_versatile.dts
On 05/07/2013 09:35 AM, Jean-Christophe DUBOIS wrote:
The slave mode is not implemented.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since v1:
* use QOM cast
* run checkpatch on code
* added restrictin on MemoryRegionOps
* use DeviceClass::realise as init function
i.MX25 PDK only has 64 MB DDR
Signed-off-by: Jean-Christophe DUBOIS
---
arch/arm/board/imx25/dts/3dstack/3dstack.dtsi| 3 ++-
arch/arm/board/imx25/dts/3dstack/one_guest_versatile.dts | 5 +
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm/board/imx25/dts
This is using a ds1338 RTC chip on the i2c bus. This RTC
chip is not present on the real board.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since v1:
* not present on v1
Changes since v2:
* use a common header file for I2C regs definition
Changes since v3:
* rework GPL
For now we support:
* timers (GPT and EPIT)
* serial ports
* ethernet (through the newly added FEC emulator)
* I2C (through the newly added I2C emulator)
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since v1:
* Added a ds1338 I2C device for qtest purpose.
Changes since
The slave mode is not implemented.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since v1:
* use QOM cast
* run checkpatch on code
* added restrictin on MemoryRegionOps
* use DeviceClass::realise as init function
Changes since v2:
* use CamelCase for state type
This is based on the mcf_fec.c FEC implementation for ColdFire.
* a generic phy was added (borrowed from lan9118).
* The buffer management is also modified as buffers are
slightly different between coldfire and i.MX.
Signed-off-by: Jean-Christophe DUBOIS
---
Changes since V1
It also adds qtest support for the I2C controller.
Jean-Christophe DUBOIS (4):
Add i.MX FEC Ethernet emulator
Add i.MX I2C controller emulator
Add i.MX25 3DS evaluation board support.
Add qtest support for i.MX I2C device emulation.
default-configs/arm-softmmu.mak | 3 +
hw/arm
Peter (and all),
In your opinion, is this patch set good enough in its actual state for
inclusion?
Are you expecting anything else from me (beside maybe adding more i.MX
devices in the future)?
Thanks
JC
On 05/08/2013 10:28 AM, Jean-Christophe DUBOIS wrote:
This series of patches add
There is no common code between these 2 timer implementation.
So it is better to split them.
Signed-off-by: Jean-Christophe DUBOIS
---
hw/timer/Makefile.objs | 3 +-
hw/timer/imx_epit.c| 404
hw/timer/imx_gpt.c | 465
hw/timer
.
We then add an i.MX25 specific CCM Device and have the i.MX25 SOC use it.
Jean-Christophe Dubois (2):
i.MX: rework CCM driver.
i.MX: Add i.MX25 CCM driver
hw/arm/fsl-imx25.c | 6 +-
hw/arm/fsl-imx31.c | 6 +-
hw/misc/Makefile.objs | 2 +
hw/misc/imx25_ccm.c
The i.MX25 CCM device is different from the i.MX31 one.
So for now the emulation was not correct even if linux was working OK
on top of the i.MX25 emulation.
We add an i.MX25 specific CCM driver and use it in the i.MX25 SOC
emulation.
Signed-off-by: Jean-Christophe Dubois
---
hw/arm/fsl-imx25
The i.MX6 GPIO device supports 2 interrupts instead of one.
* 1 for the lower 16 GPIOs.
* 1 for the upper 16 GPIOs.
i.MX31 and i.MX25 only support 1 interrupt for the 32 GPIOs.
So we add a property to turn the behavior on when required.
Signed-off-by: Jean-Christophe Dubois
---
hw/gpio
timer reference to CCM. These objects now use the
utility function we added in 1) instead of direct reference to CCM object.
Signed-off-by: Jean-Christophe Dubois
---
hw/arm/fsl-imx25.c | 6 +-
hw/arm/fsl-imx31.c | 6 +-
hw/misc/Makefile.objs | 1 +
hw/misc/imx31_ccm.c
Le 27/10/2015 23:41, Peter Crosthwaite a écrit :
On Tue, Oct 27, 2015 at 3:32 PM, Jean-Christophe Dubois
mailto:j...@tribudubois.net>> wrote:
The i.MX6 GPIO device supports 2 interrupts instead of one.
* 1 for the lower 16 GPIOs.
* 1 for the upper 16 GPIOs.
i.MX
.
We then add an i.MX25 specific CCM Device and have the i.MX25 SOC use it.
Jean-Christophe Dubois (2):
i.MX: rework CCM driver.
i.MX: Add i.MX25 CCM driver
hw/arm/fsl-imx25.c | 6 +-
hw/arm/fsl-imx31.c | 6 +-
hw/misc/Makefile.objs | 2 +
hw/misc/imx25_ccm.c
timer reference to CCM. These objects now use the
utility function we added in 1) instead of direct reference to CCM object.
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* None
hw/arm/fsl-imx25.c | 6 +-
hw/arm/fsl-imx31.c | 6 +-
hw/misc/Makefile.objs
The i.MX25 CCM device is different from the i.MX31 one.
So for now the emulation was not correct even if linux was working OK
on top of the i.MX25 emulation.
We add an i.MX25 specific CCM driver and use it in the i.MX25 SOC
emulation.
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1
Le 30/10/2015 21:50, Peter Crosthwaite a écrit :
On Fri, Oct 30, 2015 at 1:24 PM, Peter Maydell wrote:
On 28 October 2015 at 23:02, Jean-Christophe Dubois
wrote:
i.MX25 SOC has a different CCM device than i.MX31.
Qemu i.MX25 emulation was built with i.MX31 CCM driver. This allows
Linux to
-sabrelite.dtsi device tree file.
Jean-Christophe Dubois (6):
i.MX: Allow GPT timer to rollover.
i.MX: simplify CCM to only handle clock required by timers.
i.MX: Add i.MX6 CCM and ANALOG device.
i.MX: Add i.MX6 System Reset Controller device.
i.MX: Add i.MX6 SOC implementation.
i.MX: Add sabrelite
Signed-off-by: Jean-Christophe Dubois
---
hw/misc/Makefile.objs | 1 +
hw/misc/imx6_ccm.c | 764 +
include/hw/misc/imx6_ccm.h | 195
3 files changed, 960 insertions(+)
create mode 100644 hw/misc/imx6_ccm.c
create mode
Various i.MX timers (GPT, EPIT, PWM, ...) are only requesting 4 clocks
from the system.
* CLK_NONE,
* CLK_IPG,
* CLK_IPG_HIGH,
* CLK_32k
Other "clocks" are not required by the qemu framework so far.
Signed-off-by: Jean-Christophe Dubois
---
hw/misc/imx25_ccm.c
GPT timer need to rolloever when it reaches 0x.
It also need to reset to 0 when in "retart mode" and crossing the
compare 1 register.
Signed-off-by: Jean-Christophe Dubois
---
hw/timer/imx_gpt.c | 27 +++
1 file changed, 15 insertions(+), 12 deletion
This controller is also present in i.MX5X devices but they are not
yet emulated by Qemu.
Signed-off-by: Jean-Christophe Dubois
---
hw/misc/Makefile.objs | 1 +
hw/misc/imx6_src.c | 353 +
include/hw/misc/imx6_src.h | 72 +
3
Signed-off-by: Jean-Christophe Dubois
---
hw/arm/Makefile.objs | 2 +-
hw/arm/sabrelite.c | 93
2 files changed, 94 insertions(+), 1 deletion(-)
create mode 100644 hw/arm/sabrelite.c
diff --git a/hw/arm/Makefile.objs b/hw/arm
For now we only support the following devices:
* up to 4 Cortex A9 cores
* A9 MPCORE (SCU, GIC, TWD)
* 5 i.MX UARTs
* 2 EPIT timers
* 1 GPT timer
* 7 GPIO controllers
* 6 SDHC controllers
* 1 CCM device
* 1 SRC device
* various ROM/RAM areas.
Signed-off-by: Jean-Christophe Dubois
---
default
Le 26/01/2016 22:54, Eric Blake a écrit :
On 01/26/2016 02:44 PM, Jean-Christophe Dubois wrote:
[meta-reply]
Make sure your git settings properly thread your messages. Your 1/6 came
through as a top-level thread, rather than in-reply-to the 0/6 cover
letter (likewise for the rest of the series
Hello Peter,
Le 28/01/2016 15:57, Peter Maydell a écrit :
On 26 January 2016 at 21:44, Jean-Christophe Dubois
wrote:
This patch series adds support for the Freescale i.MX6 processor.
For now we only support the following devices:
* up to 4 Cortex A9 cores
* A9 MPCORE (SCU, GIC, TWD)
* 5
Le 02/02/2016 17:22, Peter Maydell a écrit :
On 26 January 2016 at 21:44, Jean-Christophe Dubois
wrote:
Various i.MX timers (GPT, EPIT, PWM, ...) are only requesting 4 clocks
from the system.
* CLK_NONE,
* CLK_IPG,
* CLK_IPG_HIGH,
* CLK_32k
Other "clocks" are not required b
The i.MX6 GPIO device supports 2 interrupts instead of one.
* 1 for the lower 16 GPIOs.
* 1 for the upper 16 GPIOs.
i.MX31 and i.MX25 only support 1 interrupt for the 32 GPIOs.
So we add a property to turn the behavior on when required.
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter
.
So we split the i.MX31 into a generic base class and a specific i.MX31
class.
We then add an i.MX25 specific CCM Device and have the i.MX25 SOC use it.
Jean-Christophe Dubois (3):
i.MX: rename i.MX CCM get_clock() function and CLK ID enum names
i.MX: Split the CCM class into an abstact base
This is to prepare for CCM code refactoring.
This is just a bit of function and enum values renaming.
We also remove some useless intermediate variables.
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* Not present
Changes since v2:
* Not present
hw/misc/imx_ccm.c
patch.
We also rework initialization to stop using deprecated sysbus device init
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* None
Changes since v2:
* We moved to an inheritance QOM scheme
hw/arm/fsl-imx25.c | 2 +-
hw/arm/fsl-imx31.c | 2 +-
hw/misc
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* rework loging to match other i.MX drivers
Changes since v2:
* We moved to an inheritance QOM scheme
hw/arm/fsl-imx25.c | 2 +-
hw/misc/Makefile.objs | 1 +
hw/misc/imx25_ccm.c | 243
Le 24/11/2015 23:04, Peter Crosthwaite a écrit :
On Thu, Nov 19, 2015 at 12:40 PM, Jean-Christophe Dubois
wrote:
The IMX_CCM class is now the base abstract class that is used by EPIT and GPT
timer implementation.
IMX31_CCM class is the concrete class implementing CCM for i.MX31 SOC.
For now
Le 02/02/2016 17:46, Peter Maydell a écrit :
On 26 January 2016 at 21:45, Jean-Christophe Dubois
wrote:
This controller is also present in i.MX5X devices but they are not
yet emulated by Qemu.
QEMU is all-caps.
Signed-off-by: Jean-Christophe Dubois
---
hw/misc/Makefile.objs | 1
Le 02/02/2016 18:01, Peter Maydell a écrit :
On 28 January 2016 at 19:22, Jean-Christophe DUBOIS
wrote:
Sabrelite uses uart2 for console but on qemu, this is uart1 that is wired to
the default stdout. Consequently, I changed stdout-path in "chosen" to
uart1.
This I find a bit awk
Le 02/02/2016 17:41, Peter Maydell a écrit :
On 26 January 2016 at 21:45, Jean-Christophe Dubois
wrote:
Signed-off-by: Jean-Christophe Dubois
+static uint32_t imx6_analog_get_pll2_clk(IMX6CCMState *dev)
+{
+uint32_t freq = 2400;
+
+if (EXTRACT(dev->analog[CCM_ANALOG_PLL_
.
Note3: You need to disable the GPIO section related to physical push buttons
in the Linux DTS tree in order to avoid excecive interrupt triggering on
GPIO devices for non existant buttons.
Jean-Christophe Dubois (9):
i.MX: Allow GPT timer to rollover.
i.MX: Rename CCM NOCLK to CLK_NONE for
GPT timer need to rollover when it reaches 0x.
It also need to reset to 0 when in "restart mode" and crossing the
compare 1 register.
Signed-off-by: Jean-Christophe Dubois
---
Changes since V1:
* None
hw/timer/imx_gpt.c | 27 +++
1 file changed, 15
here these 2 clocks are
different.
Signed-off-by: Jean-Christophe Dubois
---
Changes since V1:
* Not present on V1
hw/misc/imx25_ccm.c | 1 +
hw/misc/imx31_ccm.c | 1 +
hw/timer/imx_epit.c | 8
hw/timer/imx_gpt.c| 16
include/hw/misc/imx_
Most clocks supported by the CCM are useless to the qemu framework.
Only clocks related to timers (EPIT, GPT, PWM, WATCHDOG, ...) are usefull
to QEMU code.
Therefore this patch removes clock computation handling for all clocks but:
* CLK_NONE,
* CLK_IPG,
* CLK_32k
Signed-off-by: Jean-Christophe
This way all CCM clock defines/enums are named CLK_XXX
Signed-off-by: Jean-Christophe Dubois
---
Changes since V1:
* Not present on V1
hw/misc/imx25_ccm.c | 2 +-
hw/misc/imx31_ccm.c | 2 +-
hw/timer/imx_epit.c | 2 +-
hw/timer/imx_gpt.c| 10 +-
include
This controller is also present in i.MX5X devices but they are not
yet emulated by QEMU.
Signed-off-by: Jean-Christophe Dubois
---
Changes since V1:
* Change "reset" sematic to mean full power cyvle.
hw/misc/Makefile.objs | 1 +
hw/misc/imx6_src.c
-imx31.o kzm.o
+obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
new file mode 100644
index 000..0faae27
--- /dev/null
+++ b/hw/arm/fsl-imx6.c
@@ -0,0 +1,407 @@
+/*
+ * Copyright (c) 2015 Jean-Christophe Dubois
+ *
+ * i.MX6 SOC emulation.
+ *
+ * Based on
Signed-off-by: Jean-Christophe Dubois
---
Changes since V1:
* move clk computation to uint64_t to avoid overflow
* added explanation on _SET, _CLR and _TOG registers
* move CCM and ANALOG handling in sub memory regions.
hw/misc/Makefile.objs | 1 +
hw/misc/imx6_ccm.c | 773
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* output a message and exit if RAM size is unsupported.
hw/arm/Makefile.objs | 2 +-
hw/arm/sabrelite.c | 93
2 files changed, 94 insertions(+), 1 deletion(-)
create mode
Signed-off-by: Jean-Christophe Dubois
---
Changes since V1:
* Not present on V1
hw/arm/fsl-imx25.c | 1 +
hw/arm/fsl-imx31.c | 1 +
hw/i2c/imx_i2c.c | 1 +
hw/net/imx_fec.c | 1 +
4 files changed, 4 insertions(+)
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index fb743bf..1fbc317
This one is build on top of the existing FIFO8
Signed-off-by: Jean-Christophe Dubois
---
include/qemu/fifo32.h | 206 ++
1 file changed, 206 insertions(+)
create mode 100644 include/qemu/fifo32.h
diff --git a/include/qemu/fifo32.h b/include/qemu
1 - 100 of 631 matches
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