s a pretty simple fix.
Comments/questions welcome.
-Bill
--
=====
-Bill Paul(510) 749-2329 | Senior Member of Technical Staff,
wp...@windriver.com | Master of Unix-Fu - Wind River Systems
=
l client mangles the formatting on the inline copy.
-Bill
--
=====
-Bill Paul(510) 749-2329 | Senior Member of Technical Staff,
wp...@windriver.com | Master of Unix-Fu - Wind River Systems
===
Public bug reported:
The Intel architecture manual states that when returning to user mode,
the SYSRET instruction will re-load the stack selector (%ss) from the
IA32_STAR model specific register using the following logic:
SS.Selector <-- (IA32_STAR[63:48]+8) OR 3; (* RPL forced to 3 *)
Another
Signed-off-by: Bill Paul
---
target-i386/seg_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index fa374d0..2bc757a 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -1043,7 +1043,7 @@ void
sending in HTML mode, but that's it.
-Bill
--
=====
-Bill Paul(510) 749-2329 | Senior Member of Technical Staff,
wp...@windriver.com | Master of Unix-Fu - Wind River Systems
.0 on FreeBSD/amd64 9.1-RELEASE.
-Bill
Signed-off-by: Bill Paul
---
target-i386/seg_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index fa374d0..2bc757a 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/
to the above condition (the CPU starts up, but is
> unable to enable paging and dies screaming in short order).
>
> Booting with the 32-bit OVMF build and the VxWorks BOOTIA32.EFI loader
> works ok. The same VxWorks loader and kernel code also seems to run ok on
> real hardware.
>
guest can't clear.
To fix this, the 'efer' member of the CPUX86State structure has been moved
to an area outside the region preserved by do_cpu_init(), so that it can
be properly re-initialized by x86_cpu_reset().
Signed-off-by: Bill Paul
CC: Paolo Bonzini
CC: Richard Henders
he hardware
either, but that doesn't mean they don't exist.
So pretty please, with sugar on top, leave this code alone.
-Bill
> Tested with windows and linux guests.
>
> Cc: Bill Paul
> Reported-by: Yan Vugenfirer
> Signed-off-by: Michael S. Tsirkin
> ---
>
tup method -- for the older non-PCI LANCE chips that was the only way
to configure them but PCI devices starting with the am97c970 can be configured
just by setting up registers).
Honestly I'm surprised I still have all my hair and that it's still the same
color.
-Bill
--
===
Of all the gin joints in all the towns in all the world, Michael S. Tsirkin
had to walk into mine at 13:44:38 on Wednesday 09 January 2013 and say:
> On Wed, Jan 09, 2013 at 09:30:43AM -0800, Bill Paul wrote:
> > Of all the gin joints in all the towns in all the world, Michael S.
&g
er of
> further hidden requirements, and hidden gaps in ACPI support too, so
> it's just business as usual with Windows: whatever works, works, don't
> ask why.
>
> Just my opinion of course.
>
> Laszlo
>
> >> The only crazy thing you didn't try is
Of all the gin joints in all the towns in all the world, Laszlo Ersek had to
walk into mine at 11:20:28 on Monday 14 September 2015 and say:
> On 09/14/15 18:53, Bill Paul wrote:
> > Of all the gin joints in all the towns in all the world, Laszlo Ersek had
> > to
> >
> &
still the same in the git repo. Am I correct that
do_cpu_init() should be clearing the EFER contents?
-Bill
--
=
-Bill Paul(510) 749-2329 | Senior Member of Technical Staff,
wp...@windriver.com | Master of Uni
ot; the problem with Linux by introducing some non-standard
behavior that happens to pacify Linux's particular usage model.
Can someone comment on whether or not this inversion logic is really still
necessary in Linux? Is there maybe a better way to handle this?
-Bill
--
=
Of all the gin joints in all the towns in all the world, Paolo Bonzini had to
walk into mine at 06:20:05 on Tuesday 05 April 2016 and say:
> On 04/04/2016 23:42, Bill Paul wrote:
> > I'm testing some of the HPET handling code in VxWorks using QEMU 2.4.1
> > and I've en
e with the ioapic.c implementation either.
Signed-off-by: Bill Paul
CC: Paolo Bonzini
CC: Richard Henderson
CC: Eduardo Habkost
---
hw/timer/hpet.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 78140e6..a2c18b3 100644
---
hibiOS/RT seems to support an alternate preemption scheme that uses the
PendSV interrupt instead of NMI, and if I compile it to use that mode, then
the example works with the Stellaris machine model. That feels like a hack
though: shouldn't a software NMI just work?
-Bill
--
=
Of all the gin joints in all the towns in all the world, Liviu Ionescu had to
walk into mine at 12:19:42 on Monday 29 August 2016 and say:
> > On 29 Aug 2016, at 20:59, Bill Paul wrote:
> >
> > I recently started tinkering with ChibiOS as part of a small personal
> >
Of all the gin joints in all the towns in all the world, Peter Maydell had to
walk into mine at 12:51:04 on Monday 29 August 2016 and say:
> On 29 August 2016 at 13:59, Bill Paul wrote:
> > Unfortunately it's been a frustrating experience because there seem to be
> > seve
until you press a key at the serial console, which causes an RX
interrupt that unjams in).
Also once a character has been written, it waits for a TXEIE interrupt
before sending the next character in a string. With these two fixes, it can
now write to the serial port sucessfully.
Signed-off-by: Bil
Of all the gin joints in all the towns in all the world, Guenter Roeck had to
walk into mine at 10:20 on Friday 09 March 2018 and say:
> On Fri, Mar 09, 2018 at 05:47:16PM +, Peter Maydell wrote:
> > On 8 March 2018 at 18:28, Bill Paul wrote:
> > > Anyway, this means th
Of all the gin joints in all the towns in all the world, Bill Paul had to walk
into mine at 10:53 on Friday 09 March 2018 and say:
> Of all the gin joints in all the towns in all the world, Guenter Roeck had
> to
>
> walk into mine at 10:20 on Friday 09 March 2018 and say:
> &
way. :)
>
> Actually, it doesn't. It looks like the first interrupt is handled,
> resetting the interrupt status, and the second interrupt is never even
> executed. I tested this with all kernel releases back to v3.16.
I just did a quick test with your patch and I can confirm that
As I said before:
"I'm not submitting this as a patch to the development list as I'm not
fully certain it complies with the hardware spec and doesn't break any
other functionality."
What I'm trying to say here is that while I may have been able to cobble
together a hack to make the UART nominally
Of all the gin joints in all the towns in all the world, Bill Paul had to walk
into mine at 13:45 on Thursday 15 March 2018 and say:
> Of all the gin joints in all the towns in all the world, Andrey Smirnov had
> to
>
> walk into mine at 12:11 on Thursday 15 March 2018 and say:
>
d on the patch by Bill Paul as found here:
> https://bugs.launchpad.net/qemu/+bug/1753314
>
> Cc: qemu-devel@nongnu.org
> Cc: qemu-...@nongnu.org
> Cc: Bill Paul
> Cc: Peter Maydell
> Signed-off-by: Andrey Smirnov
> ---
>
> Bill:
>
> I only tested this with i.M
Public bug reported:
The sabrelite machine model used by qemu-system-arm is based on the
Freescale/NXP i.MX6Q processor. This SoC has an on-board ethernet
controller which is supported in QEMU using the imx_fec.c module
(actually called imx.enet for this model.)
The include/hw/arm/fsm-imx6.h file
Public bug reported:
The imx_serial.c driver currently implements only partial support for
the i.MX6 UART hardware. (I understand it's a work in progress and
that's fine.) dIn particular, it does not implement support for the
Transmit Complete Interrupt Enable bit in the UCR4 register. The VxWorks
"4.14+: Both versions of qemu (as-is and interrupts reverted) work fine"
Hm. I really wonder how it can be possible that Linux works with the
interrupt vectors reversed, though to be fair I have not looked at the
Linux i.MX6 ENET driver code. I suppose it's possible that the driver is
binding the
now they would never get interrupts on either vector, unless you fudge things
so that the ENET module triggers both vector 150 and the vector for GPIO6 in
the GIC or patch them to back out the erratum 6678 workaround as later kernels
do.
Later kernels that register vectors 150 and 151 would w
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