On Mon, 12 Oct 2020, Alexey Kardashevskiy wrote:
On 29/09/2020 20:35, Alexey Kardashevskiy wrote:
On 16/07/2020 23:22, David Gibson wrote:
On Thu, Jul 16, 2020 at 07:04:56PM +1000, Alexey Kardashevskiy wrote:
Ping? I kinda realize it is not going to replace SLOF any time soon but
still...
Y
On Mon, 12 Oct 2020, David Gibson wrote:
On Mon, Oct 12, 2020 at 08:21:41AM +0200, Philippe Mathieu-Daudé wrote:
On 10/12/20 12:34 AM, David Gibson wrote:
On Sun, Oct 11, 2020 at 09:03:32PM +0200, Philippe Mathieu-Daudé wrote:
The Grackle PCI host model expects the interrupt controller
being s
On Mon, 12 Oct 2020, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
The PCI_ADDR() macro use generic PCI fields shifted by 8-bit.
Rewrite it extracting the shift operation one layer.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/bonito.c | 4 ++--
1 file changed, 2 insertio
On Mon, 12 Oct 2020, Peter Maydell wrote:
Deprecate our TileGX target support:
* we have no active maintainer for it
* it has had essentially no contributions (other than tree-wide cleanups
and similar) since it was first added
* the Linux kernel dropped support in 2018, as has glibc
Note the
On Tue, 13 Oct 2020, Mark Cave-Ayland wrote:
Currently an object link property is used to pass a reference to the OpenPIC
into the PCI host bridge so that pci_unin_init_irqs() can connect the PCI
IRQs to the PIC itself.
This can be simplified by defining the PCI IRQs as qdev gpios and then wirin
On Tue, 13 Oct 2020, Daniel P. Berrangé wrote:
On Mon, Oct 12, 2020 at 04:29:33PM -0700, Joelle van Dyne wrote:
From: osy
On iOS, we cannot fork() new processes, so the best way to load QEMU into an
app is through a shared library. We add a new configure option
`--enable-shared-lib` that will
On Tue, 13 Oct 2020, Stefan Hajnoczi wrote:
On Mon, Oct 12, 2020 at 04:29:35PM -0700, Joelle van Dyne wrote:
From: osy
iOS does not support ucontext natively for aarch64 and the sigaltstack is
also unsupported (even worse, it fails silently, see:
https://openradar.appspot.com/13002712 )
As a
On Mon, 12 Oct 2020, Joelle van Dyne wrote:
From: osy
On iOS, we cannot allocate RWX pages without special entitlements. As a
workaround, we can a RX region and then mirror map it to a separate RX
Missing a verb here: "we can a RX region"
region. Then we can write to one region and execute
On Tue, 13 Oct 2020, Daniel P. Berrangé wrote:
On Tue, Oct 13, 2020 at 04:41:06PM +0200, BALATON Zoltan wrote:
On Tue, 13 Oct 2020, Daniel P. Berrangé wrote:
On Mon, Oct 12, 2020 at 04:29:33PM -0700, Joelle van Dyne wrote:
From: osy
On iOS, we cannot fork() new processes, so the best way to
On Tue, 13 Oct 2020, Daniel P. Berrangé wrote:
On Tue, Oct 13, 2020 at 08:16:46AM -0700, Joelle van Dyne wrote:
I will start a separate conversation of UTM's license compatibility.
Regarding the patch, would some sort of warning message in configure
(if building as a shared library) regarding t
Hello,
Not related to this patch but while you're at it could you please take
those patches that are already reviewed by you from this series as well?
http://patchwork.ozlabs.org/project/qemu-devel/list/?series=186439
That would help cleaning up my tree and see which patches still need
chang
On Tue, 13 Oct 2020, Mark Cave-Ayland wrote:
On 13/10/2020 14:38, BALATON Zoltan via wrote:
On Tue, 13 Oct 2020, Mark Cave-Ayland wrote:
Currently an object link property is used to pass a reference to the
OpenPIC
into the PCI host bridge so that pci_unin_init_irqs() can connect the PCI
IRQs
On Tue, 13 Oct 2020, Philippe Mathieu-Daudé wrote:
On 6/29/20 8:55 PM, BALATON Zoltan wrote:
OpenBIOS gets RAM size via fw_cfg but rhe original board firmware
Typo "the".
detects RAM using SPD data so generate and add SDP eeproms to cover as
EEPROMs?
much RAM as possible to describe with
On Wed, 14 Oct 2020, BALATON Zoltan via wrote:
On Tue, 13 Oct 2020, Philippe Mathieu-Daudé wrote:
On 6/29/20 8:55 PM, BALATON Zoltan wrote:
This patch is more complex as it should be which I intend to fix once
agreement can be made on how to get back the necessary functionality
removed by
On Wed, 14 Oct 2020, Richard Henderson wrote:
On 10/14/20 9:03 AM, Joelle van Dyne wrote:
static int encode_search(TranslationBlock *tb, uint8_t *block)
{
-uint8_t *highwater = tcg_ctx->code_gen_highwater;
-uint8_t *p = block;
+uint8_t *highwater;
+uint8_t *p;
int i, j, n;
+
On Wed, 14 Oct 2020, Joelle van Dyne wrote:
Much of the code that uses the macro is like the following (from
aarch64/tcg-include.inc.c)
*TCG_CODE_PTR_RW(s, code_ptr) =
deposit32(*TCG_CODE_PTR_RW(s, code_ptr), 0, 26, offset);
Before the change, it was just *code_ptr. I'm saying
The board firmware expect these to be at fixed addresses and programs
them without probing, this patch puts the macio device at the expected
PCI address.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_oldworld.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Half of the occurances already use get_system_memory() directly
instead of sysmem variable, convert the two other uses to
get_system_memory() too which seems to be more common and drop the
variable.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Values not used frequently enough may not worth putting in a local
variable, especially with names almost as long as the original value
because that does not improve readability, to the contrary it makes it
harder to see what value is used. Drop a few such variables.
Signed-off-by: BALATON Zoltan
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later and rebased to Mark's qemu-macppc
branch. Compared to v7 the only change is the cast to (target_ulong)
from (uint32_t) as requested by Mark in patch 1.
Regards,
BALATON Zoltan
BALATON Zoltan
Fall back to load binary ROM image if loading ELF fails. This also
moves PROM_BASE and PROM_SIZE defines to board as these are matching
the ROM size and address on this board and removes the now unused
PROM_ADDR and BIOS_SIZE defines from common mac.h.
Signed-off-by: BALATON Zoltan
Reviewed-by: P
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the rom region and fall back to loading a binary image with -bios if
loading ELF image failed. This allows testing emulation with a ROM
image from real hardware as well as using an ELF OpenBIOS image.
Signed-off-by: BALATON Zolta
On Thu, 15 Oct 2020, Mark Cave-Ayland wrote:
I've queued the grackle/uninorth patches to my qemu-macppc branch, however
when I try to apply patches from the above series git fails with the
following message:
Applying: mac_oldworld: Drop a variable, use get_system_memory() directly
error: sha1
On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later and rebased to Mark's qemu-macppc
branch. Compared to v7 the only change is the ca
On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland
---
hw/ppc/ppc405_boards.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 6198ec1035..4687715b15 100644
--- a/hw/ppc/ppc405_boards.c
++
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
On 10/16/20 10:38 PM, BALATON Zoltan via wrote:
On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland
---
hw/ppc/ppc405_boards.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/ppc
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the rom region and fall back to loading a binary image with -bios if
loading ELF image failed. This allows testing emulation with a ROM
image from real hardware as well as using an ELF OpenBIOS image.
Signed-off-by: BALATON Zolta
On Sat, 17 Oct 2020, Mark Cave-Ayland wrote:
On 16/10/2020 13:19, BALATON Zoltan via wrote:
On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
+Alistair for loader
On 10/17/20 5:47 PM, BALATON Zoltan via wrote:
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the rom region and fall back to loading a binary image with -bios if
loading ELF image failed. This allows
On Fri, 16 Oct 2020, Philippe Mathieu-Daudé wrote:
On 10/16/20 11:58 AM, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later and rebased to Mark's qemu-macppc
b
Signed-off-by: BALATON Zoltan
---
hw/ppc/ppc405_boards.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 6198ec1035..7a11a38831 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -28,6 +28,7 @@
#include
All instances set this value explicitely so make it the default to
make it simpler to create instances without setting property.
Signed-off-by: BALATON Zoltan
---
hw/rtc/m48t59.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c
index 652520697
Signed-off-by: BALATON Zoltan
---
hw/sparc64/sun4u.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index ad5ca2472a..a89ebed6f0 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -671,10 +671,12 @@ static void sun4uv_ini
From: Mark Cave-Ayland
This function is no longer used within the codebase.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Hervé Poussineau
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
hw/rtc/m48t59-isa.c | 25 -
include/hw/rtc/m48t59.h
From: Mark Cave-Ayland
Now that all of the callers of this function have been switched to use qdev
properties, this legacy init function can now be removed.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Hervé Poussineau
Reviewed-by: Philippe Mathieu-Daudé
---
hw/rtc/m48t59.c | 35
This is inspired by Mark's series:
https://lists.nongnu.org/archive/html/qemu-ppc/2020-10/msg00251.html
and implements what I've suggested in review of that series to
simplify it and avoid code churn if implementing my suggestion later.
Regards,
BALATON Zoltan
BALATON Zoltan (4):
mt48t59: Set
Also declare nvram variable with the correct type.
Signed-off-by: BALATON Zoltan
---
hw/sparc/sun4m.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 54a2b2f9ef..7f1a48440c 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
On 10/17/20 6:31 PM, BALATON Zoltan via wrote:
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
+Alistair for loader
On 10/17/20 5:47 PM, BALATON Zoltan via wrote:
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the
On Sun, 18 Oct 2020, P J P wrote:
From: Prasad J Pandit
The source and destination x,y display parameters in ati_2d_blt()
may run off the vga limits if either of s->regs.[src|dst]_[xy] is
zero. Mask the register values to avoid potential crash.
Reported-by: Gaoning Pan
Signed-off-by: Prasad J
On Mon, 19 Oct 2020, Markus Armbruster wrote:
Philippe Mathieu-Daudé writes:
On 10/12/20 1:50 PM, BALATON Zoltan via wrote:
On Mon, 12 Oct 2020, David Gibson wrote:
On Mon, Oct 12, 2020 at 08:21:41AM +0200, Philippe
Mathieu-Daudé wrote:
On 10/12/20 12:34 AM, David Gibson wrote:
On
On Mon, 19 Oct 2020, Thomas Huth wrote:
On 19/10/2020 10.07, Thomas Huth wrote:
On 19/10/2020 03.39, Joelle van Dyne wrote:
From: osy
The iOS toolchain does not use the host prefix naming convention. We add a
new option `--enable-cross-compile` that forces cross-compile even without
a cross_p
On Sun, 18 Oct 2020, Joelle van Dyne wrote:
From: osy
On iOS, we cannot allocate RWX pages without special entitlements. As a
workaround, we can allocate a RX region and then mirror map it to a separate
RX region. Then we can write to one region and execute from the other one.
We also define `
On Mon, 19 Oct 2020, Mark Cave-Ayland wrote:
On 19/10/2020 15:00, Markus Armbruster wrote:
BALATON Zoltan via writes:
On Mon, 19 Oct 2020, Markus Armbruster wrote:
Philippe Mathieu-Daudé writes:
On 10/12/20 1:50 PM, BALATON Zoltan via wrote:
On Mon, 12 Oct 2020, David Gibson wrote:
On
On Mon, 19 Oct 2020, P J P wrote:
+-- On Sun, 18 Oct 2020, BALATON Zoltan wrote --+
| The s->regs.[src|dst]_[xy] values should not be over 0x3fff because we mask
| them on register write in ati.c
Yes, those register values are set to zero(0).
| and here [src|dst]_[x|y] local variables are decl
On Mon, 19 Oct 2020, Joelle van Dyne wrote:
Explicit cast may not be needed here so this could be a macro if caling it
differently helps or why don't you just use tcg_mirror_prr_rw directly
everywhere?
There are quite a bit of code that depends on tcg_insn_unit * type such as
*tcg_code_ptr_rw(
Hello,
On Tue, 20 Oct 2020, P J P wrote:
+-- On Mon, 19 Oct 2020, BALATON Zoltan wrote --+
| On Mon, 19 Oct 2020, P J P wrote:
| >dst_x = ... (s->regs.dst_x(=0) + 1 - s->regs.dst_width(=16383))
| >dst_y = ... (s->regs.dst_y(=0) + 1 - s->regs.dst_height(=16383))
| >
| > ati_2d_blt
| >
On Tue, 20 Oct 2020, Markus Armbruster wrote:
Mark Cave-Ayland writes:
One thing I have thought about is being able to mark a link property
as mandatory so if a value hasn't been set before realize then you
A non-null value, I presume.
Do you mean something like distinguish between NULL an
On Wed, 21 Oct 2020, Markus Armbruster wrote:
BALATON Zoltan via writes:
On Tue, 20 Oct 2020, Markus Armbruster wrote:
Mark Cave-Ayland writes:
One thing I have thought about is being able to mark a link property
as mandatory so if a value hasn't been set before realize then you
On Sun, 25 Oct 2020, Philippe Mathieu-Daudé wrote:
On 10/25/20 12:18 PM, Mark Cave-Ayland wrote:
On 21/10/2020 11:50, Philippe Mathieu-Daudé wrote:
This series add tests for the MIPS Fuloong 2E machine.
I have been using these tests for over 1 year now.
After recent discussions with Huacai an
Hello,
On Wed, 2 Dec 2020, Doug Evans wrote:
Hi.
Suppose I want to set a property of a non-pluggable device that cannot be
set after the device has been realized (e.g., I can't use qmp to set the
property after QEMU has started).
Being non-pluggable means I can't use "-device foo,bar=baz" on th
On Mon, 7 Dec 2020, Alexey Kardashevskiy wrote:
On 05/12/2020 05:32, Greg Kurz wrote:
On Tue, 13 Oct 2020 13:19:11 +1100
Alexey Kardashevskiy wrote:
+static void readstr(hwaddr pa, char *buf, int size)
+{
+cpu_physical_memory_read(pa, buf, size);
+if (buf[size - 1] != '\0') {
+
On Mon, 7 Dec 2020, Greg Kurz wrote:
On Mon, 7 Dec 2020 18:33:34 +1100
Alexey Kardashevskiy wrote:
[...]
+}
+
+return offset;
+}
+
+static uint32_t of_client_finddevice(const void *fdt, uint32_t nodeaddr)
+{
+char *node, *unit, *part;
If you do this:
g_autofree *node = NUL
On Mon, 7 Dec 2020, Alexey Kardashevskiy wrote:
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime component
On Tue, 8 Dec 2020, Alexey Kardashevskiy wrote:
On 07/12/2020 22:48, BALATON Zoltan wrote:
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 2e89e36cfbdc..048bf49592aa 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -175,6 +175,13 @@ struct SpaprMachineState
On Sat, 12 Dec 2020, Peter Maydell wrote:
This patchseries converts the PPC UIC "Universal Interrupt
Controller" to a QOM device. My main reason for doing it is that
Thanks for doing this clean up.
this fixes a couple of long-standing trivial Coverity issues -- the
current ppcuic_init() func
On Sat, 12 Dec 2020, Peter Maydell wrote:
Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.
The ppcuic_init() function is retained for the moment with its current
interface; in subsequent co
On Sat, 12 Dec 2020, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter Maydell
---
hw/ppc/sam460ex.c | 70 ---
1 file change
On Sat, 12 Dec 2020, Peter Maydell wrote:
Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.
The ppcuic_init() function is retained for the moment with its current
interface; in subsequent co
On Sat, 12 Dec 2020, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter Maydell
---
hw/ppc/sam460ex.c | 70 ---
1 file change
On Sat, 12 Dec 2020, Peter Maydell wrote:
On Sat, 12 Dec 2020 at 17:17, BALATON Zoltan wrote:
On Sat, 12 Dec 2020, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter
On Sat, 12 Dec 2020, Peter Maydell wrote:
On Sat, 12 Dec 2020 at 18:27, BALATON Zoltan wrote:
On Sat, 12 Dec 2020, Peter Maydell wrote:
Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.
On Sat, 12 Dec 2020, Peter Maydell wrote:
Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.
The ppcuic_init() function is retained for the moment with its current
interface; in subsequent co
On Sat, 19 Dec 2020, Jiaxun Yang wrote:
It can now boot Debian installer[1] as well as a custom PMON bootloader
distribution[2].
Note that it can't boot PMON shipped with actual machine as our ATI vgabios
is using some x86 hack that can't be handled by x86emu in original PMON.
This may be simi
On Sat, 19 Dec 2020, Jiaxun Yang wrote:
在2020年12月19日十二月 下午8:13，BALATON Zoltan写道：
On Sat, 19 Dec 2020, Jiaxun Yang wrote:
It can now boot Debian installer[1] as well as a custom PMON bootloader
distribution[2].
Note that it can't boot PMON shipped with actual machine as our ATI vgabios
is using
Hello,
On Tue, 22 Dec 2020, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus_change_irq_level(). That makes sense, given that bus->irq_count
is indexed and siz
On Tue, 22 Dec 2020, BALATON Zoltan via wrote:
Hello,
On Tue, 22 Dec 2020, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number
passed
to pci_bus_change_irq_level(
On Tue, 22 Dec 2020, Guenter Roeck wrote:
On 12/22/20 10:23 AM, Mark Cave-Ayland wrote:
On 22/12/2020 16:16, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus
On Wed, 23 Dec 2020, Mark Cave-Ayland wrote:
On 22/12/2020 21:23, Guenter Roeck wrote:
(Added jiaxun.y...@flygoat.com as CC)
Are you sure? It does not show up on cc list for me so unless the list ate
it you might have forgotten to copy the address there. Done now just in
case, sorry if this
On Tue, 22 Dec 2020, Guenter Roeck wrote:
On 12/22/20 2:57 PM, BALATON Zoltan wrote:
[ ... ]
I've already forgot about the details but we have analysed it quite throughly
back when the via ide changes were made. Here are some random pointers to
threads that could have some info:
This was the
On Wed, 23 Dec 2020, Mark Cave-Ayland wrote:
On 22/12/2020 22:23, BALATON Zoltan via wrote:
I've just remembered that for sam460ex we had this commit: 484ab3dffadc
(sam460ex: Fix PCI interrupts with multiple devices) that changed that
mapping for that machine so I guess you got the exce
On Wed, 23 Dec 2020, Philippe Mathieu-Daudé wrote:
On 12/22/20 5:16 PM, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus_change_irq_level(). That makes sense,
On Wed, 23 Dec 2020, Guenter Roeck wrote:
On 12/23/20 8:09 AM, Mark Cave-Ayland wrote:
On 23/12/2020 15:21, Philippe Mathieu-Daudé wrote:
On 12/22/20 5:16 PM, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sani
On Wed, 23 Dec 2020, Guenter Roeck wrote:
On 12/23/20 12:20 PM, BALATON Zoltan wrote:
On Wed, 23 Dec 2020, Guenter Roeck wrote:
On 12/23/20 8:09 AM, Mark Cave-Ayland wrote:
On 23/12/2020 15:21, Philippe Mathieu-Daudé wrote:
FWIW bisecting Fuloong2E starts failing here:
4ea98d317eb442c738f898
On Thu, 24 Dec 2020, BALATON Zoltan wrote:
On Wed, 23 Dec 2020, Guenter Roeck wrote:
v3.1:
pci :00:05.1: [Firmware Bug]: reg 0x10: invalid BAR (can't size)
pci :00:05.1: [Firmware Bug]: reg 0x14: invalid BAR (can't size)
pci :00:05.1: [Firmware Bug]: reg 0x18: invalid BAR (can't siz
On Wed, 23 Dec 2020, Guenter Roeck wrote:
On Thu, Dec 24, 2020 at 02:34:07AM +0100, BALATON Zoltan wrote:
[ ... ]
If we need legacy mode then we may be able to emulate that by setting BARs
to legacy ports ignoring what values are written to them if legacy mode
config is set (which may be what t
On Thu, 24 Dec 2020, Jiaxun Yang wrote:
modetty is not handled by kernel and the parameter
here seems unreasonable.
Signed-off-by: Jiaxun Yang
---
v3: Bring busclock back
---
hw/mips/fuloong2e.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index
On Thu, 24 Dec 2020, Jiaxun Yang wrote:
Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
Typo: According
How come, you say you can boot to Debian installer but don't need any IDE
changes when the kernel you submitted as test was shown not working with
current IDE emulation? Which ins
On Thu, 24 Dec 2020, BALATON Zoltan via wrote:
On Thu, 24 Dec 2020, Jiaxun Yang wrote:
Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
Typo: According
How come, you say you can boot to Debian installer but don't need any IDE
changes when the kernel you submitted as test was
On Thu, 24 Dec 2020, Philippe Mathieu-Daudé wrote:
On Thu, Dec 24, 2020 at 9:11 AM BALATON Zoltan wrote:
On Wed, 23 Dec 2020, Guenter Roeck wrote:
On Thu, Dec 24, 2020 at 02:34:07AM +0100, BALATON Zoltan wrote:
[ ... ]
If we need legacy mode then we may be able to emulate that by setting BAR
From: Guenter Roeck
Fuloong2e needs to use legacy mode for IDE support to work with Linux.
Add property to via-ide driver to make the mode configurable, and set
legacy mode for Fuloong2e.
Signed-off-by: Guenter Roeck
[balaton: Use bit in flags for property, add comment for missing BAR4]
Signed-
This implements the legacy-mode emulation option for via-ide which is
needed for Linux on fuloong2e. I've tested that the Debian kernel now
finds CD ROM and MorphOS on pegasos2 is not affected by this.
BALATON Zoltan (1):
ide: Make room for flags in PCIIDEState and add one for legacy mode
Guent
We'll need a flag for implementing some device specific behaviour in
via-ide but we already have a currently CMD646 specific field that can
be repurposed for this and leave room for furhter flags if needed in
the future. This patch changes the "secondary" field to "flags" and
change CMD646 and its
Remove dependencies from KConfig that are not actually needed.
Signed-off-by: BALATON Zoltan
---
hw/ppc/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index 8548f42b0d..5893f80909 100644
--- a/hw/ppc/Kconfig
+++ b/hw/ppc/Kconfig
@@ -55,7 +55,6 @@ con
All machines that select SERIAL also select PPC4XX so we can just add
this common dependency there once.
Signed-off-by: BALATON Zoltan
---
hw/ppc/Kconfig | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index dd86e664d2..8548f42b0d 100644
--
This cleans up irq mapping in sam460ex inspired by similar changes to
other machines recently although there's no known or noticable problem
that this fixes. The first two patches are just simplifying
dependencies in Kconfig that I've noticed during writing the patch.
Regards,
BALATON Zoltan
BALA
Avoid mapping multiple interrupts to the same irq. Instead map them to
the 4 PCI interrupts and use an or-gate in the board to connect them
to the interrupt controller. This does not fix any known problem but
does not seem to cause a new problem either and may be cleaner at least.
Signed-off-by: B
On Tue, 22 Dec 2020, Guenter Roeck wrote:
On 12/22/20 10:23 AM, Mark Cave-Ayland wrote:
On 22/12/2020 16:16, Guenter Roeck wrote:
Hi,
commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in
pci_bus_change_irq_level") added sanity checks to the interrupt number passed
to pci_bus
These supposed to implement audio part used in VIA south bridges so
they are better placed under hw/audio.
Signed-off-by: BALATON Zoltan
---
hw/audio/meson.build | 1 +
hw/audio/via-ac97.c | 106 +++
hw/isa/vt82c686.c| 91 --
These parts are common between VT82C686B and VT8231 so can be shared
in the future. Rename them to VIA prefix accordingly.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/isa/vt82c686.c b/hw
Compiling vt82c686.c fails without APM and ACPI_PM functions. Add
dependency on these in Kconfig to fix this.
Signed-off-by: BALATON Zoltan
---
hw/isa/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index c7f07854f7..2ca2593ee6 100644
--- a/hw/isa/Kc
This groups identifiers related to the ISA bridge part and superio
part also in their naming.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 48 ++-
hw/mips/fuloong2e.c | 2 +-
include/hw/isa/vt82c686.h | 2 +-
3 files changed, 24 insert
Remove some unneded, empty code and set user_creatable to false
(besides being not implemented yet, so does nothing anyway) it's also
normally part of VIA south bridge chips so no need to confuse users
showing them these devices.
Signed-off-by: BALATON Zoltan
---
hw/audio/via-ac97.c | 51 +++
Signed-off-by: BALATON Zoltan
---
hw/isa/trace-events | 6 ++
hw/isa/vt82c686.c | 51 +
2 files changed, 21 insertions(+), 36 deletions(-)
diff --git a/hw/isa/trace-events b/hw/isa/trace-events
index 3544c6213c..d267d3e652 100644
--- a/hw/isa/tr
These are legacy init functions that are just equivalent to directly
calling pci_create_simple so do that instead. Also rename objects to
lower case via-ac97 and via-mc97 matching naming of other devices.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 27 --
There's no reason to suffix everything with _DEVICE when the names are
already unique without it and shorter names are more readable.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 48 +++
1 file changed, 23 insertions(+), 25 deletions(-)
diff
This series are some small clean ups to the vt82c686b south bridge and
superio chip model that is only used by the mips/fuloong2e machine.
These are also in preparation to add emulation of the very similar
vt8231 later that will be used by ppc/pegasos2.
Regards,
BALATON Zoltan
BALATON Zoltan (12)
Also rename VT82C686B type to lower case to match other device names.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 9 -
hw/mips/fuloong2e.c | 4 +++-
include/hw/isa/vt82c686.h | 3 +--
3 files changed, 4 insertions(+), 12 deletions(-)
diff --git a/hw/isa/vt82c686.
Also rename VT82C686B_PM to match other device names.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 17 -
hw/mips/fuloong2e.c | 5 -
include/hw/isa/vt82c686.h | 5 +
3 files changed, 5 insertions(+), 22 deletions(-)
diff --git a/hw/isa/vt82c686.c
These are not used or not needed.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 8
1 file changed, 8 deletions(-)
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 789459bcae..6dff2bc67d 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -12,22 +12,16 @@
#inclu
The floppy is inaccessible because its ports are shadowed by the
config registers of the superio part (switchable on the real chip but
we don't model that) so disable adding the floppy matching the
existing comment in vt82c686b_isa_realize() as it's not usable.
Signed-off-by: BALATON Zoltan
---
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