() which is
called by instance_init routines of various CPU targets. This patch
also adds corresponding instance_finalize routine if needed for these
CPU targets so that CPU can be marked free when it is removed.
Signed-off-by: Bharata B Rao
---
exec.c | 37
Move cpu_exec_init() call from instance_init to realize. This allows
any failures from cpu_exec_init() to be handled appropriately.
Also add corresponding cpu_exec_exit() call from unrealize.
Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
---
target-ppc/translate_init.c | 9
On Fri, May 08, 2015 at 11:55:00AM -0300, Eduardo Habkost wrote:
> On Fri, May 08, 2015 at 03:21:35PM +0530, Bharata B Rao wrote:
> > Currently CPUState.cpu_index is monotonically increasing and a newly
> > created CPU always gets the next higher index. The next available
> >
On Fri, May 08, 2015 at 11:57:40AM -0300, Eduardo Habkost wrote:
> On Fri, May 08, 2015 at 03:21:35PM +0530, Bharata B Rao wrote:
> [...]
> > void cpu_exec_init(CPUArchState *env, Error **errp)
> > {
> > CPUState *cpu = ENV_GET_CPU(env);
> > CP
current callers of cpu_exec_init() are from instance_init,
use error_abort Error arugment to abort in case of an error.
Signed-off-by: Bharata B Rao
---
exec.c | 2 +-
include/exec/exec-all.h | 2 +-
target-alpha/cpu.c | 2 +-
target-arm/cpu.c| 2
enumeration logic.
Signed-off-by: Bharata B Rao
---
exec.c| 55 ++-
include/qom/cpu.h | 1 +
qom/cpu.c | 7 +++
3 files changed, 58 insertions(+), 5 deletions(-)
diff --git a/exec.c b/exec.c
index 5cf821e..c8c4e53
Move cpu_exec_init() call from instance_init to realize. This allows
any failures from cpu_exec_init() to be handled appropriately.
Also add corresponding cpu_exec_exit() call from unrealize.
Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
---
target-ppc/translate_init.c | 9
_USER_ONLY under
cpu_get_free_index().
v1: https://lists.gnu.org/archive/html/qemu-devel/2015-05/msg01385.html
v0: https://lists.gnu.org/archive/html/qemu-devel/2015-03/msg02950.html
Bharata B Rao (3):
cpus: Add Error argument to cpu_exec_init()
cpus: Convert cpu_index into a bitmap
CC'ing Eduardo...
Does this approach look sane ? Currently only PowerPC needs this, however
is this API correct from other architectures' perspective ?
On Thu, May 07, 2015 at 12:34:24PM +0530, Bharata B Rao wrote:
> Keep track of start and end address of each NUMA node in numa_inf
Didn't know you are not targeting the original M68000. Must have missed
that somewhere.
--
qemu-system-m68k does not accept "notw %d" instruction
https://bugs.launchpad.net/bugs/547227
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
Sta
>
>A number of qemu driver backends (such as rtl8139) call the function
>cpu_physical_memory_rw to read/write guest memory. The target guest
>memory address is often supplied by the guest. This opens up the
>possibility of a guest giving an address which happens to be an MMIO
>address which can p
Hi There,
I am trying to develop a boot loader for an embedded
PPC SBC. I would like to be able to boot into a bare
metal envirmnent with only monitor support and execute
my code from there. Is this possible?
Cheers
Dave B. Sharp
__
Do You
Mike Swanson wrote:
Yeah, I've got NetBSD installed now, and the hard disk image isn't
bootable either unless KQEMU is deactivated.
On 10/19/05, Mike Swanson <[EMAIL PROTECTED]> wrote:
NetBSD 2.0.2 does not install with KQEMU loaded. I have not tested
earlier or later (dev) builds.
I simply i
Richard Neill wrote:
Dear All,
I thought you might like to know the following:
Neither Qemu 0.7.2 nor 0.7.1 will compile under gcc 4.0.1, which is the
default under Mandrake 2006. It works fine with the older 3.3.6 though.
Here are the relevant bits of the output. I've cut all the irrelvant
Johannes Schindelin wrote:
Maybe you want to cull a few quoted lines next time? Especially if you do
not reference any part of the quoted text in your message?
Hth,
Dscho
Will do next time. Thanks for the suggestion.
___
Qemu-devel mailing list
Q
This patchset adds KVM_PPC_SVM_OFF ioctl which is required to support
reset of secure guest. This includes linux-headers update so that we get
the newly introduced ioctl.
v0: https://lists.gnu.org/archive/html/qemu-devel/2019-07/msg02408.html
Bharata B Rao (2):
linux-headers: Update
ppc
Update to mainline commit: e42617b825f8 ("Linux 5.5-rc1")
Signed-off-by: Bharata B Rao
---
include/standard-headers/asm-x86/bootparam.h | 7 +-
.../infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h | 15 +++-
include/standard-headers/drm/drm_fourcc.h | 28 ++-
.../linux/input-eve
of this ioctl, the secure guest is essentially transitioned
back to normal mode so that it can reboot like a regular guest and
become secure again.
This ioctl has no effect when invoked for a normal guest.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c | 1 +
target/ppc/kvm.c | 7
On Tue, Dec 10, 2019 at 02:28:51PM +1100, David Gibson wrote:
> On Mon, Dec 09, 2019 at 12:30:12PM +0530, Bharata B Rao wrote:
> > A pseries guest can be run as a secure guest on Ultravisor-enabled
> > POWER platforms. When such a secure guest is reset, we need to
> > release/
On Tue, Dec 10, 2019 at 04:05:36PM +1100, David Gibson wrote:
> On Tue, Dec 10, 2019 at 03:03:01PM +1100, Alexey Kardashevskiy wrote:
> >
> >
> > On 10/12/2019 14:50, Bharata B Rao wrote:
> > > On Tue, Dec 10, 2019 at 02:28:51PM +1100, David Gibson wrote:
> &
On Wed, Dec 11, 2019 at 10:41:32AM +1100, David Gibson wrote:
> On Tue, Dec 10, 2019 at 12:20:07PM +0530, Bharata B Rao wrote:
> > On Tue, Dec 10, 2019 at 04:05:36PM +1100, David Gibson wrote:
> > > On Tue, Dec 10, 2019 at 03:03:01PM +1100, Alexey Kardashevskiy wrote:
> >
On Wed, Dec 11, 2019 at 04:27:42PM +1100, David Gibson wrote:
> Ah, right. We'll need to check for -ENOTTY specifically and ignore
> it, then. We don't want this spewing warnings on every non-secure
> guest.
I am posting v2 with explicit check for -ENOTTY.
>
> > It looks like we may need a new
This patchset adds KVM_PPC_SVM_OFF ioctl which is required to support
reset of secure guest. This includes linux-headers update so that we get
the newly introduced ioctl.
v1: https://lists.gnu.org/archive/html/qemu-devel/2019-12/msg01489.html
Bharata B Rao (2):
linux-headers: Update
ppc
of this ioctl, the secure guest is essentially transitioned
back to normal mode so that it can reboot like a regular guest and
become secure again.
This ioctl has no effect when invoked for a normal guest. If this ioctl
fails for a secure guest, the guest is terminated.
Signed-off-by: Bharata B
Update to mainline commit: e42617b825f8 ("Linux 5.5-rc1")
Signed-off-by: Bharata B Rao
---
include/standard-headers/asm-x86/bootparam.h | 7 +-
.../infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h | 15 +++-
include/standard-headers/drm/drm_fourcc.h | 28 ++-
.../linux/input-eve
On Thu, Dec 12, 2019 at 08:34:57AM +0100, Cédric Le Goater wrote:
> Hello Bharata,
>
>
> On 12/12/2019 06:50, Bharata B Rao wrote:
> > A pseries guest can be run as a secure guest on Ultravisor-enabled
> > POWER platforms. When such a secure guest is reset, we need to
On Thu, Dec 12, 2019 at 01:27:23PM +0100, Greg Kurz wrote:
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index f11422fc41..25e1a3446e 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -1597,6 +1597,21 @@ static void spapr_machine_reset(MachineStat
David Gibson suggested.
- Updated linux-headers to 5.5.0-rc2
Bharata B Rao (2):
linux-headers: Update
ppc/spapr: Support reboot of secure pseries guest
hw/ppc/spapr.c| 1 +
include/standard-headers/asm-x86/bootparam.h | 7 +-
.../infiniband/hw/vmw_pvrdma
of this ioctl, the secure guest is essentially transitioned
back to normal mode so that it can reboot like a regular guest and
become secure again.
This ioctl has no effect when invoked for a normal guest. If this ioctl
fails for a secure guest, the guest is terminated.
Signed-off-by: Bharata B
Update to mainline commit: d1eef1c61974 ("Linux 5.5-rc2")
Signed-off-by: Bharata B Rao
---
include/standard-headers/asm-x86/bootparam.h | 7 +-
.../infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h | 15 +++-
include/standard-headers/drm/drm_fourcc.h | 28 ++-
.../linux/input-eve
On Fri, Nov 22, 2019 at 10:42 AM David Gibson
wrote:
>
> Ok. A number of queries about this.
>
> 1) The PAPR spec for ibm,dynamic-memory-v2 says that the first word in
> each entry is the number of LMBs, but for NVDIMMs you use the
> not-necessarily-equal scm_block_size instead. Does the NVDIMM
POWER8 CPU type on POWER8E host CPU.
Switching to class_init would fix such scenarios to use the right
CPU thread type instead of defaulting to host-powerpc64-cpu.
In an unrelated cleanup, fix a typo in .get_hotplug_handler routine.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c
On Thu, Sep 08, 2016 at 11:51:32AM +1000, David Gibson wrote:
> On Fri, Sep 02, 2016 at 03:06:38PM +0530, Bharata B Rao wrote:
> > Each spapr cpu core type defines an instance_init routine which just
> > populates the CPU class name. This can be done in the class_init
> >
On Wed, Nov 23, 2016 at 03:01:18PM +1100, David Gibson wrote:
> On Tue, Nov 22, 2016 at 05:15:58PM +0530, Nikunj A Dadhania wrote:
> > From: Bharata B Rao
> >
> > - xscmpodp & xscmpudp are missing flags reset.
> > - In xscmpodp, VXCC should be set only if
>
>On 11/24/2016 12:47 PM, Maxime Coquelin wrote:
>>
>>
>> On 11/24/2016 01:33 PM, Yuanhan Liu wrote:
>>> On Thu, Nov 24, 2016 at 09:30:49AM +, Kevin Traynor wrote:
> On 11/24/2016 06:31 AM, Yuanhan Liu wrote:
> > > On Tue, Nov 22, 2016 at 04:53:05PM +0200, Michael S. Tsirkin wrote:
>>
Hi,
- Add ram object and dimm device at the source
(qemu) object_add memory-backend-ram,id=ram0,size=128M
(qemu) device_add pc-dimm,id=dimm0,memdev=ram0
- Migrate the VM and remove the dimm device and ram object at the target
(qemu) device_del dimm0
(qemu) object_del ram0
- Adding the ram obje
On Fri, Dec 2, 2016 at 11:46 PM, Dr. David Alan Gilbert wrote:
> * Bharata B Rao (bharata@gmail.com) wrote:
> > Hi,
> >
> > - Add ram object and dimm device at the source
> >
> > (qemu) object_add memory-backend-ram,id=ram0,size=128M
> > (qemu)
On Tue, Dec 06, 2016 at 03:11:22PM +1100, David Gibson wrote:
> On Mon, Dec 05, 2016 at 04:55:30PM +0530, Nikunj A Dadhania wrote:
> > From: Bharata B Rao
> >
> > xxperm: VSX Vector Permute
> > xxpermr: VSX Vector Permute Right-indexed
> >
> > Signed-o
POWER8 CPU type on POWER8E host CPU.
Switching to class_init would fix such scenarios to use the right
CPU thread type instead of defaulting to host-powerpc64-cpu.
In an unrelated cleanup, fix a typo in .get_hotplug_handler routine.
Signed-off-by: Bharata B Rao
---
Applies on ppc-for-2.8 branc
gt; Signed-off-by: Alexey Kardashevskiy
> >> ---
> >> hw/ppc/spapr_pci.c | 13 +++++
> >> include/hw/pci-host/spapr.h | 2 ++
> >> 2 files changed, 15 insertions(+)
> >>
> >> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
&g
On Tue, Sep 13, 2016 at 5:09 AM, Richard Henderson wrote:
>
> Previously we allowed fully unaligned operations, but not operations
> that are aligned but with less alignment than the operation size.
>
> In addition, arm32, ia64, mips, and sparc had been omitted from the
> previous overalignment pa
waits for the unplugged CPU thread to finish. This wait never finishes in
TCG mode when the waiting thread and the unplugged CPU thread are one and
the same.
So wait till proper MTTCG support is available before enabling
CPU unplug in TCG mode.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c | 4 ++
d instructions ?
If so refer to VSX_MADD() to see when VXISI is set.
>
> Signed-off-by: Nikunj A Dadhania
> ---
> target/ppc/fpu_helper.c | 201
> +++-
> 1 file changed, 29 insertions(+), 172 deletions(-)
>
> diff --git
ppc_cpu_lookup_alias().
>
> Signed-off-by: Greg Kurz
Reviewed-by: Bharata B Rao
> ---
> hw/ppc/spapr_cpu_core.c |8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index 6f0533c34259..35d187
device.
Signed-off-by: Vijay Kumar B.
Reviewed-by: Deepak S.
---
hw/arm/pxa2xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 0241e07..9898287 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -1505,7 +1505,7 @@ static void
On Wed, Oct 12, 2016 at 06:13:59PM -0500, Michael Roth wrote:
> From: Bharata B Rao
>
> Add support to hot remove pc-dimm memory devices.
>
> Signed-off-by: Bharata B Rao
> * add hooks to CAS/cmdline enablement of hotplug ACR support
> Signed-off-by: Michael Roth
&g
e shot and then test for these additional bits
> within spapr_h_cas_compose_response() directly.
>
> Cc: Bharata B Rao
> Signed-off-by: Michael Roth
Nicely done!
Reviewed-by: Bharata B Rao
Regards,
Bharata.
> include/hw/ppc/spapr.h | 1 +
> include/hw/ppc/spapr_ovec.h | 1 +
> 3 files changed, 33 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index f8cde92..d80a6fa 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @
.c | 10 ++--
> hw/ppc/spapr_events.c | 148
> ++---
> include/hw/ppc/spapr.h | 3 +-
> 3 files changed, 120 insertions(+), 41 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index d80a6fa..2037222 100644
>
mmon_finalize(),
> > remove the call from ppc_cpu_unrealizefn().
> >
> > CC: Bharata B Rao
> > CC: Alexander Graf
> > CC: qemu-...@nongnu.org
> > Signed-off-by: Laurent Vivier
> > ---
> > target-ppc/translate_init.c | 4 +---
> >
On Fri, Oct 14, 2016 at 01:04:37PM -0500, Michael Roth wrote:
> Quoting Bharata B Rao (2016-10-14 03:37:32)
> > On Wed, Oct 12, 2016 at 06:13:55PM -0500, Michael Roth wrote:
> > > This adds machine options of the form:
> > >
> > > -machine pseries,legacy-
On Wed, Oct 19, 2016 at 7:46 AM, David Gibson
wrote:
> On Tue, Oct 18, 2016 at 10:46:39PM +0200, Thomas Huth wrote:
> > The OpenBIOS NVRAM set-up is based on the layout defined in the CHRP
> > (Common Hardware Reference Platform) specification. This is the same
> > layout that is also used by the
On Tue, Oct 25, 2016 at 02:23:41PM +1100, David Gibson wrote:
> On Tue, Oct 25, 2016 at 01:50:02PM +1100, David Gibson wrote:
> > On Mon, Oct 24, 2016 at 04:04:31PM +1100, David Gibson wrote:
> > > For historical reasons construction of the guest device tree in spapr
> > > is divided between spapr_
On Fri, Jul 22, 2016 at 01:23:01PM +1000, David Gibson wrote:
> On Thu, Jul 21, 2016 at 05:54:37PM +0200, Igor Mammedov wrote:
> > It will enshure that cpu_index for a given cpu stays the same
> > regardless of the order cpus has been created/deleted and so
> > it would be possible to migrate QEMU
On Fri, Jul 22, 2016 at 05:14:33PM +1000, David Gibson wrote:
> On Fri, Jul 22, 2016 at 11:40:03AM +0530, Bharata B Rao wrote:
> > On Fri, Jul 22, 2016 at 01:23:01PM +1000, David Gibson wrote:
> > > On Thu, Jul 21, 2016 at 05:54:37PM +0200, Igor Mammedov wrote:
> >
ield
> Formats: VX, X, XX2
>
> Signed-off-by: Nikunj A Dadhania
> ---
> target-ppc/translate.c | 73 +--
> target-ppc/translate_init.c | 103
>
> 2 files changed, 136 insertions(+), 40 deletions
Hi,
Coalesced mmio buffer is part of vCPU 0's kvm_run mmap'ed area
and with the introduction of CPU hotplug, vCPU 0 can be removed on
PowerPC leading to the below seen segfault in QEMU.
0x100a1d34 in kvm_flush_coalesced_mmio_buffer ()
at qemu/kvm-all.c:1828
1828while (ring
On Wed, Jul 27, 2016 at 08:22:51AM +0530, Bharata B Rao wrote:
> Hi,
>
> Coalesced mmio buffer is part of vCPU 0's kvm_run mmap'ed area
> and with the introduction of CPU hotplug, vCPU 0 can be removed on
> PowerPC leading to the below seen segfault in QEMU.
>
>
Boot CPU is assumed to be always present in QEMU code. So
until that assumptions are gone, deny removal request.
In another words, QEMU won't support boot CPU core hot-unplug.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr_cpu_core.c | 5 +
1 file changed, 5 insertions(+)
diff --git
On Wed, Aug 03, 2016 at 03:25:50PM +1000, David Gibson wrote:
> From: Bharata B Rao
>
> CPU hotplug and coldplug aren't supported prior to pseries-2.7. Further,
> earlier machine types don't use CPU core objects at all. These mean that
> query-hotpluggable-cpus and
On Fri, Aug 05, 2016 at 05:50:29PM +1000, David Gibson wrote:
> Prior to c8721d3 "spapr: Error out when CPU hotplug is attempted on older
> pseries machines", attempting to use query-hotpluggable-cpus on pseries-2.6
> and earlier machine types would SEGV.
>
> That change fixed that, but due to som
On Wed, Jul 06, 2016 at 01:34:59PM +0200, Igor Mammedov wrote:
> On Wed, 6 Jul 2016 14:29:18 +0530
> Bharata B Rao wrote:
>
> > Add CPUState::migration_id and use that as instance_id in
> > vmstate_register() call.
> >
> > Introduce use-migration-id proper
On Wed, Jul 06, 2016 at 02:01:14PM +0200, Igor Mammedov wrote:
> On Wed, 6 Jul 2016 14:29:19 +0530
> Bharata B Rao wrote:
>
> > cpu_index is used as migration_id by default. For machine type
> > versions that set use-migration-id property, cpu_dt_it is returned.
> >
On Wed, Jul 06, 2016 at 12:57:49PM +0200, Igor Mammedov wrote:
> On Wed, 6 Jul 2016 14:29:17 +0530
> Bharata B Rao wrote:
>
> > Move vmstate_register() call to cpu_common_realize().
> > Introduce cpu_common_unrealize() and move vmstate_unregister() to it.
> >
On Wed, Jul 06, 2016 at 01:45:54PM +0200, Igor Mammedov wrote:
> On Wed, 6 Jul 2016 14:29:21 +0530
> Bharata B Rao wrote:
>
> > Turn on use-migration-id property. Starting from pseries-2.7, prefer
> > the use of migration_id (cpu_dt_id) over cpu_index for cpu vmstate
&g
On Wed, Jul 06, 2016 at 04:44:17PM +0200, Igor Mammedov wrote:
> On Wed, 6 Jul 2016 19:46:13 +0530
> Bharata B Rao wrote:
>
> > On Wed, Jul 06, 2016 at 12:57:49PM +0200, Igor Mammedov wrote:
> > > On Wed, 6 Jul 2016 14:29:17 +0530
> > > Bharata B Rao wrote:
>
On Wed, Jul 06, 2016 at 04:35:28PM +0200, Greg Kurz wrote:
> On Wed, 6 Jul 2016 14:29:19 +0530
> Bharata B Rao wrote:
> > cpu_index is used as migration_id by default. For machine type versions
> > that set use-migration-id property, cpu_dt_it is returned.
> >
>
es < 2.7
- spapr_core_plug() should never be called for pseries < 2.7, hence use
an assert.
Signed-off-by: Bharata B Rao
---
Applies on ppc-for-2.7 branch of David's tree.
hw/ppc/spapr.c | 5 +
hw/ppc/spapr_cpu_core.c | 19 ++-
2 files changed, 1
()
calls to cpu_common_[un]realize().
Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
---
exec.c | 53 -
include/qom/cpu.h | 2 ++
qom/cpu.c | 7 ++
target-ppc/cpu-qom.h| 2 ++
target
v1: https://www.mail-archive.com/qemu-devel@nongnu.org/msg384135.html
Bharata B Rao (5):
cpu,target-ppc: Move cpu_vmstate_[un]register calls to
cpu_common_[un]realize
cpu: Introduce CPUState::stable_cpu_id
spapr: Set stable_cpu_id for threads of CPU cores
xics: Use stable_cpu_id instead
cpu_index range after CPU hot removals.
Suggested-by: Igor Mammedov
Signed-off-by: Bharata B Rao
---
exec.c| 6 --
include/qom/cpu.h | 5 +
qom/cpu.c | 6 ++
3 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/exec.c b/exec.c
index fb73910..3b36fe5
Conditonally set stable_cpu_id for CPU threads that are created as part
of spapr CPU cores. The use of stable_cpu_id is enabled for pseries-2.7
onwards.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr_cpu_core.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/ppc/spapr_cpu_core.c b
Starting from pseries-2.7, turn on has-stable-cpu-id property that
switches to using stable_cpu_id over cpu_index for cpu vmstate registration
and in XICS code.
This allows migration to work when CPU cores are not necessarily
unplugged in LIFO order.
Signed-off-by: Bharata B Rao
---
hw/ppc
due to CPU core hot removal.
Signed-off-by: Bharata B Rao
---
hw/intc/xics.c| 21 +
hw/intc/xics_kvm.c| 10 --
hw/intc/xics_spapr.c | 29 +
include/hw/ppc/xics.h | 1 +
4 files changed, 39 insertions(+), 22 deletions(-)
diff
On Fri, Jul 08, 2016 at 03:24:13PM +1000, David Gibson wrote:
> On Thu, Jul 07, 2016 at 08:20:23PM +0530, Bharata B Rao wrote:
> > Conditonally set stable_cpu_id for CPU threads that are created as part
> > of spapr CPU cores. The use of stable_cpu_id is enabled for pseries-
reated with an
> index that is immediately written to cc->core_id, and spapr_core_plug()
> also relies on cc->core_id.
>
> Let's use it also in spapr_core_unplug().
>
>
> >
> > Signed-off-by: Greg Kurz
Reviewed-by: Bharata B Rao
This prevents the crash, but unplug still fails and that will be fixed
only by having your patchset where device tree id is derived from
core index.
Regards,
Bharata.
On Fri, Jul 08, 2016 at 12:59:59PM +0200, Igor Mammedov wrote:
> On Fri, 8 Jul 2016 17:39:52 +1000
> David Gibson wrote:
>
> > On Fri, Jul 08, 2016 at 12:11:12PM +0530, Bharata B Rao wrote:
> > > On Fri, Jul 08, 2016 at 03:24:13PM +1000, David Gibson wrote:
> >
On Mon, Jul 11, 2016 at 01:22:37PM +1000, David Gibson wrote:
> On Fri, Jul 08, 2016 at 01:11:02PM +0200, Igor Mammedov wrote:
> > On Fri, 8 Jul 2016 15:19:58 +1000
> > David Gibson wrote:
> >
> > > On Thu, Jul 07, 2016 at 08:20:22PM +0530, Bharata B R
On Mon, Jul 11, 2016 at 03:42:29PM +0200, Igor Mammedov wrote:
> this approach i I preffer as it uses less per machine migration glue
> and follows typical compat pattern for devices
>
> Signed-off-by: Igor Mammedov
> Signed-off-by: Bharata B Rao
> ---
> exec.c
r
and removal in LIFO order so that we never end up with holes in
cpu_index range.
Signed-off-by: Bharata B Rao
---
While there is work in progress to support migration when there are holes
in cpu_index range resulting from out-of-order plug or unplug, this patch
is intended as a last resort if no
models.h | 2 ++
> target-ppc/cpu-qom.h| 7
> target-ppc/mmu_helper.c | 3 +-
> target-ppc/translate_init.c | 85
> -
> 5 files changed, 100 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/cpu-mode
that important
>> for userspace emulation. Still, it can't be good, so this patch fixes it
>> by making CONFIG_USER_ONLY use the same bitmap based allocation that full
>> system targets already use.
>>
>> Signed-off-by: David Gibson
>> ---
>> exec.c |
On Fri, Jul 15, 2016 at 03:29:01PM +1000, David Gibson wrote:
> On Thu, Jul 14, 2016 at 10:27:15AM +0200, Igor Mammedov wrote:
> > On Thu, 14 Jul 2016 10:51:27 +1000
> > David Gibson wrote:
> >
> > > On Wed, Jul 13, 2016 at 12:20:20PM +0530, Bharata B Rao wrote:
&
On Mon, Jul 18, 2016 at 04:01:18PM +0200, Peter Krempa wrote:
> On Mon, Jul 18, 2016 at 19:19:20 +1000, David Gibson wrote:
> > We've recently added a new device_add based cpu hotplug
> > implementation, with the spapr machine type being the first user. In
> > order to overcome the limitations of
On Mon, Jul 18, 2016 at 06:20:35PM +0200, Igor Mammedov wrote:
> On Mon, 18 Jul 2016 17:06:18 +0200
> Peter Krempa wrote:
>
> > On Mon, Jul 18, 2016 at 19:19:18 +1000, David Gibson wrote:
> > > I'm not entirely sure if this is a good idea, and if it is whether
> > > this is a good approach to it.
n CPU thread realization fails during cold/hotplug.
Fix this by ensuring that we do object_unparent() of ICPState object
only in case when is was created earlier.
Signed-off-by: Bharata B Rao
---
NOTE: There is another SIGSEGV failure that I am investigating which happens
when CPU realization fail
the cpus list causing
SIGSEGV later (for eg when running "info cpus").
Signed-off-by: Bharata B Rao
---
target/ppc/translate_init.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index e837cd
On Thu, Jun 15, 2017 at 09:32:38AM +0200, Greg Kurz wrote:
> On Thu, 15 Jun 2017 08:22:44 +0530
> Bharata B Rao wrote:
>
> > ICPState objects were being allocated before CPU thread realization.
> > However commit 9ed656631d73 (xics: setup cpu at realize time) reversed
rom
> outside spapr_drc.c.
>
> Signed-off-by: David Gibson
> ---
> hw/ppc/spapr.c | 15 ---
> hw/ppc/spapr_drc.c | 28
> 2 files changed, 8 insertions(+), 35 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.
Recent commits that re-organized ICPState object missed to destroy
the object when CPU is unrealized. Fix this so that CPU unplug
doesn't abort QEMU.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr_cpu_core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/spapr_cpu_core.c b/h
This should be considered for ppc-for-2.10 branch of dwg's tree.
On Wed, Apr 12, 2017 at 01:45:07PM +0530, Bharata B Rao wrote:
> Recent commits that re-organized ICPState object missed to destroy
> the object when CPU is unrealized. Fix this so that CPU unplug
> doesn't abor
On Wed, Apr 12, 2017 at 10:47:39AM +0200, Cédric Le Goater wrote:
> On 04/12/2017 10:15 AM, Bharata B Rao wrote:
> > Recent commits that re-organized ICPState object missed to destroy
> > the object when CPU is unrealized. Fix this so that CPU unplug
> > doesn'
Ensure that the unplugged CPU thread is destroyed and the waiting
thread is notified about it. This is needed for CPU unplug to work
correctly in MTTCG mode.
Signed-off-by: Bharata B Rao
---
cpus.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/cpus.c b/cpus.c
index 740b8dc..79f780b
On Thu, Jun 01, 2017 at 02:54:48PM +1000, David Gibson wrote:
> On Wed, May 31, 2017 at 04:56:44PM +0530, Bharata B Rao wrote:
> > Add a "no HPT" encoding (using value -1) to the HTAB migration
> > stream (in the place of HPT size) when the guest doesn't allocate HPT.
/2017-05/msg07058.html
Bharata B Rao (2):
spapr: Add a "no HPT" encoding to HTAB migration stream
spapr: Fix migration of Radix guests
hw/ppc/spapr.c | 40
1 file changed, 36 insertions(+), 4 deletions(-)
--
2.7.4
Fix migration of radix guests by ensuring that we issue
KVM_PPC_CONFIGURE_V3_MMU for radix case post migration.
Reported-by: Nageswara R Sastry
Signed-off-by: Bharata B Rao
Reviewed-by: Suraj Jitindar Singh
---
hw/ppc/spapr.c | 12
1 file changed, 12 insertions(+)
diff --git a
Add a "no HPT" encoding (using value -1) to the HTAB migration
stream (in the place of HPT size) when the guest doesn't allocate HPT.
This will help the target side to match target HPT with the source HPT
and thus enable successful migration.
Suggested-by: David Gibson
Signed-of
Add a "no HPT" encoding (using value -1) to the HTAB migration
stream (in the place of HPT size) when the guest doesn't allocate HPT.
This will help the target side to match target HPT with the source HPT
and thus enable successful migration.
Suggested-by: David Gibson
Signed-of
Fix migration of radix guests by ensuring that we issue
KVM_PPC_CONFIGURE_V3_MMU for radix case post migration.
Reported-by: Nageswara R Sastry
Signed-off-by: Bharata B Rao
Reviewed-by: Suraj Jitindar Singh
---
hw/ppc/spapr.c | 12
1 file changed, 12 insertions(+)
diff --git a
with TCG and TCG reboot is being fixed.
Changes in v6:
--
- Ensure any allocated HPT is free by the target when the source
doesn't send HPT.
v5: https://lists.gnu.org/archive/html/qemu-devel/2017-06/msg01637.html
Bharata B Rao (2):
spapr: Add a "no HPT" encoding to H
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