Further research shown that the issue is that NPTL (Native Posix Threads) is
not supported for i386 user mode emulation.
That causes the described issue in binaries compiled with NPTL (most modern
ones).
One way to fix this that worked for me is a patch from here:
http://patchwork.ozlabs.org/pat
Public bug reported:
Something is wrong with hard disk images on MIPSel host.
The host system is mips64el (Loongson cpu, Linux 2.6.39, eglibc 2.13)
Tried Qemu 0.14.1 and 0.15.0-rc2, both compiled with GCC 4.6.0.
First I was trying to install WinXP (i386-softmmu).
Starting install, create partiti
I have the same exact problem on MIPSel host as well.
Tried Qemu 0.14.1 and git from 110724.
Trying to run something from bash gives fork: Invalid argument.
strace gives clone(18874385,0,0,0,1084164376,1082144312) = -1 errno=22 (Invalid
argument)
There is no alignment switches on this CPU.
So, i
Hello! I would like to see a list of suggestions/ideas/tickets for
improving live migration (especially performance and algorithms). There is
a page https://wiki.qemu.org/ToDo/LiveMigration, but it has not been
updated for a long time. Thanks
Mon, Apr 25, 2022 at 01:41:27PM +0300, Artyom wrote:
> > Hello! I would like to see a list of suggestions/ideas/tickets for
> > improving live migration (especially performance and algorithms). There
> is
> > a page https://wiki.qemu.org/ToDo/LiveMigration, but it has not be
After examining the code in
migration/, I could not find any mention of these optimizations. Perhaps
the ideas from the paper have already been tried to implement in QEMU, but
they were abandoned?
On Tue, Apr 26, 2022 at 1:51 AM Peter Xu wrote:
> On Tue, Apr 26, 2022 at 01:39:58AM +0300, Arty
Well, that's a blast from the past.
Still have the MIPS laptop in question (Lemote Yeeloong 8101b), got it running.
Built Qemu 0.14.1, the bug is replicated as before.
Built Qemu 2.9.0, the bug is still replicated as before (but qemu is now about
100x slower for some reason).
So it would appear
Public bug reported:
QEMU 5.0.0, built with ./configure --target-list=x86_64-softmmu
--enable-debug --disable-strip --disable-docs --disable-sdl
Running on a headless host (Ryzen 3600), Arch Linux, 64bit latest.
Guest is also Arch Linux, 64bit.
Started with qemu-system-x86_64 -vnc 0.0.0.0:0 -ena
Great.
Can confirm, that patch fixes it.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1882817
Title:
Segfault in audio_pcm_sw_write with audio over VNC
Status in QEMU:
New
Bug description:
Q
Public bug reported:
TL;DR: When QEMU is launched with VNC as the output and viewed with a
client that defaults to zlib VNC encoding, the resulting output tends to
accumulate artifacts.
Reproduction:
Launch QEMU (tried with versions 4.2.0 and 4.1.0 on Linux 64bit) with -vnc
0.0.0.0:0
Connect to
-1024,7 +1058,7 @@ static int scsi_disk_emulate_command(SCSIDiskReq *r)
> }
> break;
> case GET_CONFIGURATION:
> -buflen = scsi_get_configuration(s, r, outbuf);
> +buflen = scsi_get_configuration(s, outbuf);
> if (buflen < 0) {
> goto illegal_request;
> }
> --
> 1.7.6
>
>
>
>
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/search/label/qemu
[ %g1 ], %g1
0x400080dc: btst 1, %g1
0x400080e0: bne 0x400081a4
0x400080e4: btst 2, %g1
Artyom
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/search/label/qemu
On 1/25/12, Paolo Bonzini wrote:
> On 01/25/2012 05:34 PM, Artyom Tarasenko wrote:
>> This patch produces the following error when booting Solaris/SPARC:
>>
>> WARNING: /iommu@0,1000/sbus@0,10001000/espdma@5,840/esp@5,880
>> (esp0):
>> data tr
the same amount of
time as cpu_sparc_exec. I guess both operations would be trivial in
the x86_64 assembler. What would be the best strategy to make TCG take
the advantage of running on a x86_64 host?
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/search/label/qemu
2012/2/14 Lluís Vilanova :
> Artyom Tarasenko writes:
> [...]
>> QEMU 1.0.50 monitor - type 'help' for more information
>> (qemu) profile
>> unknown command: 'profile'
>> (qemu) info profile
>> async time 38505498320 (38.505)
>> qe
2012/2/14 Laurent Desnogues :
> 2012/2/14 Lluís Vilanova :
>> Artyom Tarasenko writes:
> [...]
>>> Here it looks like "compute_all_sub" and "compute_all_sub_xcc" are
>>> good candidates for optimizing: together they take the same amount of
>>
On Wed, Feb 15, 2012 at 3:34 PM, Anthony Liguori wrote:
> Please respond to this note with an '+1', or an Ack, to vote for this icon.
+1
On Sat, Apr 13, 2013 at 7:03 PM, Rob Landley wrote:
> On 03/26/2013 02:34:50 AM, Artyom Tarasenko wrote:
>>
>> On Tue, Mar 26, 2013 at 1:52 AM, Rob Landley wrote:
>> > Can the virtio things (serial, network, block, virtfs) be used on
>> > arbitrary
>>
On Sun, Apr 14, 2013 at 11:59 AM, Mark Cave-Ayland
wrote:
> On 14/04/13 10:38, Artyom Tarasenko wrote:
>
>>> Do you have an example kernel .config and qemu command line showing how
>>> to
>>> use virtio for those? (Or a working sparc64 image you can point me to?)
init= m48t59_class_init,
> -};
> -
> static void m48t59_register_types(void)
> {
> -type_register_static(&m48t59_info);
> -type_register_static(&m48t59_isa_info);
> +TypeInfo m48txx_type_info = {
> +.parent = TYPE_SYS_BUS_DEVICE,
> +.instance_size = sizeof(M48t59SysBusState),
> +.class_size = sizeof(M48txxSysBusDeviceClass),
> +.class_init = m48t59_class_init,
> +};
> +TypeInfo m48txx_isa_type_info = {
> +.parent = TYPE_ISA_DEVICE,
> +.instance_size = sizeof(M48t59ISAState),
> +.class_size = sizeof(M48txxISADeviceClass),
> +.class_init = m48t59_isa_class_init,
> +};
> +int i;
> +
> +for (i = 0; i < ARRAY_SIZE(m48txx_info); i++) {
> +if (m48txx_info[i].sysbus_name) {
> +m48txx_type_info.name = m48txx_info[i].sysbus_name;
> +m48txx_type_info.class_data = &m48txx_info[i];
> +type_register(&m48txx_type_info);
> +}
> +
> +if (m48txx_info[i].isa_name) {
> +m48txx_isa_type_info.name = m48txx_info[i].isa_name;
> +m48txx_isa_type_info.class_data = &m48txx_info[i];
> +type_register(&m48txx_isa_type_info);
> +}
> +}
> }
>
> type_init(m48t59_register_types)
> --
> 1.7.10.4
>
>
--
Regards,
Artyom Tarasenko
linux/sparc and solaris/sparc under qemu blog:
http://tyom.blogspot.com/search/label/qemu
On Sat, Apr 20, 2013 at 11:34 AM, Blue Swirl wrote:
> On Sun, Apr 14, 2013 at 9:41 PM, Artyom Tarasenko wrote:
>> On Sun, Apr 14, 2013 at 10:05 AM, Hervé Poussineau
>> wrote:
>>> As m48t59 devices can only be created with m48t59_init() or
>>> m48t59_init_isa()
/ sparc64:
http://tyom.blogspot.de/2013/03/debiansparc64-wheezy-under-qemu-how-to.html
Without the patches the install process hangs at random places between 6% and
60%.
With this series the installation succeeds.
Please note that the patch 3/3 requires updating OpenBIOS.
Artyom Tarasenko (3
According to UltraSPARC™-IIi User’s Manual, PBM has 64 IRQ lines.
Signed-off-by: Artyom Tarasenko
---
hw/pci-host/apb.c |2 +-
hw/sparc64/sun4u.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index b4981d7..3bc0d10 100644
- clear interrupts only on writing to the interrupt clear registers
- don't overwrite a currently active interrupt request
- use the correct addresses for the interrupt clear registers
(section 19.3.3.3 of the UltraSPARC™-IIi User’s Manual)
Signed-off-by: Artyom Tarasenko
---
hw/pci
Every PCI Slot in PBM has 4 directly mapped IRQ lines.
Use the IRQ routing schema 0bssnn (Bus, Slot, interrupt Number)
described in Section 19.3.3 of UltraSPARC™-IIi User's Manual.
Please note that this patch requires the OpenBIOS counterpart patch.
Signed-off-by: Artyom Tarasenko
---
h
On Sat, Apr 20, 2013 at 12:39 PM, Blue Swirl wrote:
> On Sat, Apr 20, 2013 at 9:56 AM, Artyom Tarasenko wrote:
>> On Sat, Apr 20, 2013 at 11:34 AM, Blue Swirl wrote:
>>> On Sun, Apr 14, 2013 at 9:41 PM, Artyom Tarasenko
>>> wrote:
>>>> On Sun, Apr
.
Artyom Tarasenko (2):
m48t59: use mmio for the m48t08 model of the m48t59_isa card
sparc64: Use the correct type of the Mostek NVRAM chip
hw/sparc64/sun4u.c |5 -
hw/timer/m48t59.c | 38 +++---
2 files changed, 39 insertions(+), 4 deletions(-)
PrEP and SPARC machines use slightly different variations of
a Mostek NVRAM chip. Since the SPARC variant is much closer
to a m48t08 type, the model can be used to differentiate between
the PIO and MMIO accesses.
Signed-off-by: Artyom Tarasenko
---
hw/timer/m48t59.c | 38
The sun4u machines use an ISA Mostek chip which has MMIO, uses 1968
as a base year and no IRQ line. So, use the m48t08.
Please note that this patch has its OpenBIOS counterpart.
Together they fix recognising NVRAM in the sun4u machine.
Signed-off-by: Artyom Tarasenko
---
hw/sparc64/sun4u.c
On Sat, Apr 27, 2013 at 1:39 PM, Blue Swirl wrote:
> On Sat, Apr 27, 2013 at 7:12 AM, Artyom Tarasenko wrote:
>> The sun4u machines use a slightly different modification of the ISA Mostek
>> chip.
>> It has MMIO, 1968 as a base year and no IRQ line. Since it matches our
&g
Hi Andreas,
On Sat, Apr 27, 2013 at 5:16 PM, Andreas Färber wrote:
> Am 27.04.2013 09:12, schrieb Artyom Tarasenko:
>> PrEP and SPARC machines use slightly different variations of
>
> PReP :)
Ops. :)
>> a Mostek NVRAM chip. Since the SPARC variant is much closer
>>
On Wed, Apr 17, 2013 at 4:15 AM, Rob Landley wrote:
> On 04/14/2013 04:38:23 AM, Artyom Tarasenko wrote:
>>
>> On Sat, Apr 13, 2013 at 7:03 PM, Rob Landley wrote:
>> > On 03/26/2013 02:34:50 AM, Artyom Tarasenko wrote:
>> >>
>> >> On Tue, Mar 26,
On Tuesday, August 12, 2014, Richard Henderson wrote:
> On 08/08/2014 10:48 AM, Artyom Tarasenko wrote:
>> Implement Short Floating-Point Store Instructions as described
>> in the chapter 13.5.2 of UltraSPARC-IIi User's Manual.
>>
>> Particularly this instr
Implement Short Floating-Point Store Instructions as described
in the chapter 13.5.2 of UltraSPARC-IIi User's Manual.
Particularly this instructions are used by NetBSD 4.0.1+ /sparc64
Signed-off-by: Artyom Tarasenko
Tested-by: Mark Cave-Ayland
---
With this patch applied on top of c
On Mon, Aug 25, 2014 at 7:58 PM, Mark Cave-Ayland
wrote:
> Both OpenBSD and FreeBSD SPARC64 attempt to read the interrupt map from the
> hardware and will fail if the correct ino isn't present.
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Artyom Tarasenko
> ---
> h
D_ENABLE;
> +
[nit-picking]
Shouldn't it be other way around: set the register to POR state (0)
here and set in OpenBIOS the desired values?
Currently OpenBIOS is the only firmware, so it doesn't matter, but who knows...
[/nit-picking]
Artyom
> if (s->nr_res
marked 'inline' was to
> suppress unused-function warnings with gcc, we remove the 'inline'
> as no longer necessary.
I thought address_mask was inline because it's in the hot path.
Wouldn't the removal hit performance?
Artyom
> Signed-off-by: Peter Maydell
&g
exist?
Feedback is appreciated. In particular it would be nice to know if
there are guests which can boot under OHW, but not under OFW.
Artyom
--
Regards,
Artyom Tarasenko
SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/qemu
Implement Short Floating-Point Store Instructions as described
in the chapter 13.5.2 of UltraSPARC-IIi User's Manual.
Particularly this instructions are used by NetBSD 4.0.1+ /sparc64
Signed-off-by: Artyom Tarasenko
---
With this patch applied on top of cmd646 patches it's possible
On Tue, Dec 27, 2011 at 5:21 AM, Khansa Butt wrote:
> hi
> any one of you know about MIPS64el cross compiler? I would appreciate
> your response..
>
Have you looked at Aboriginal?
http://landley.net/aboriginal/downloads/binaries/
--
Regards,
Artyom Tarasenko
solaris/sparc und
t sign)
> ret = env->dtlb[reg].tag;
> break;
> }
> + case 0x48: /* Interrupt dispatch, RO */
> + break;
> + case 0x49: /* Interrupt data receive */
> + ret = env->ivec_status;
> + break;
> + case 0x7f: /* Incoming interrupt vector, RO */
> + {
> + int reg = (addr >> 4) & 0x3;
> + if (reg < 3) {
> + ret = env->ivec_data[reg];
> + }
> + break;
> + }
> case 0x46: /* D-cache data */
> case 0x47: /* D-cache tag access */
> case 0x4b: /* E-cache error enable */
> @@ -1540,11 +1553,6 @@ uint64_t helper_ld_asi(target_ulong addr, int
> asi, int size, int sign)
> case 0x7e: /* E-cache tag */
> break;
> case 0x5b: /* D-MMU data pointer */
> - case 0x48: /* Interrupt dispatch, RO */
> - case 0x49: /* Interrupt data receive */
> - case 0x7f: /* Incoming interrupt vector, RO */
> - /* XXX */
> - break;
> case 0x54: /* I-MMU data in, WO */
> case 0x57: /* I-MMU demap, WO */
> case 0x5c: /* D-MMU data in, WO */
> @@ -1954,7 +1962,7 @@ void helper_st_asi(target_ulong addr,
> target_ulong val, int asi, int size)
> demap_tlb(env->dtlb, addr, "dmmu", env);
> return;
> case 0x49: /* Interrupt data receive */
> - /* XXX */
> + env->ivec_status = val & 0x20;
> return;
> case 0x46: /* D-cache data */
> case 0x47: /* D-cache tag access */
> --
> 1.7.9
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/search/label/qemu
Since Mark and Avi are keeping silence,
Tested-by: Artyom Tarasenko
On Sun, Mar 18, 2012 at 12:57 PM, Blue Swirl wrote:
> Mask incoming page address early so that resolved addresses
> are page aligned. Remove further address masking.
>
> Signed-off-by: Blue Swirl
> ---
down comes from the extra move
> instructions for helper calls. The ARM target uses way too
> many helpers, but that's another discussion :-)
>
Have you tried compiling without -fstack-protector-all as suggested by Lluís?
I observe a similar slowdown on a sparc target, and there compiling
without stack protection definitely helps.
Artyom
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/search/label/qemu
On 3/27/12, Blue Swirl wrote:
> On Tue, Mar 27, 2012 at 18:19, Artyom Tarasenko wrote:
>> On Sun, Mar 11, 2012 at 12:02 PM, Blue Swirl wrote:
>>> Generate correct trap for external interrupts. Map PCI and ISA IRQs to
>>> RIC/UltraSPARC-IIi interrupt vectors.
>&g
ebian-4.08r1-initrd/etc/ld.so.cache /etc/ld.so.cache
ls: cannot access ../../debian-4.08r1-initrd/etc/ld.so.cache: No such
file or directory
-rw-r--r--. 1 root root 195479 2011-03-17 13:48 /etc/ld.so.cache
Isn't this wrong?
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
On Thu, May 26, 2011 at 8:45 PM, Blue Swirl wrote:
> On Tue, May 24, 2011 at 10:42 PM, Artyom Tarasenko
> wrote:
>> Should it be possible to use dynamically linked binaries under
>> sparc*-linux-user?
>> Under qemu-system-sparc the Debian 4.08r1 initrd works fine, but:
&
On Sat, Jun 4, 2011 at 10:30 AM, Blue Swirl wrote:
> On Sun, May 29, 2011 at 2:32 AM, Artyom Tarasenko wrote:
>> On Thu, May 26, 2011 at 8:45 PM, Blue Swirl wrote:
>>> On Tue, May 24, 2011 at 10:42 PM, Artyom Tarasenko
>>> wrote:
>>>> Should it be poss
clear interrupt request if the interrupt priority < CPU pil
clear hardware interrupt request if interrupts are disabled
Signed-off-by: Artyom Tarasenko
---
hw/sun4u.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index d7dcaf0..7f95
Hi,
On Thu, Jul 28, 2011 at 12:31 PM, wrote:
> Hi,
>
> At Mon, 25 Jul 2011 19:22:38 +0200,
> Artyom Tarasenko wrote:
>
>> clear interrupt request if the interrupt priority < CPU pil
>> clear hardware interrupt request if interrupts are disabled
>
> Not direc
On Thu, Jul 28, 2011 at 2:03 PM, wrote:
> At Thu, 28 Jul 2011 13:51:08 +0200,
> Artyom Tarasenko wrote:
>> On Thu, Jul 28, 2011 at 12:31 PM, wrote:
>> > Hi,
>> >
>> > At Mon, 25 Jul 2011 19:22:38 +0200,
>> > Artyom Tarasenko wrote:
>> >
On Thu, Jul 28, 2011 at 2:10 PM, Tsuneo Saito wrote:
> 2011/7/28 :
>>
>> At Thu, 28 Jul 2011 13:51:08 +0200,
>> Artyom Tarasenko wrote:
>> > On Thu, Jul 28, 2011 at 12:31 PM, wrote:
>> > > Hi,
>> > >
>> > > At Mon, 25 Jul 2011 1
On Thu, Jul 28, 2011 at 3:40 PM, wrote:
> At Thu, 28 Jul 2011 14:50:57 +0200,
> Artyom Tarasenko wrote:
>> On Thu, Jul 28, 2011 at 2:03 PM, wrote:
>> > At Thu, 28 Jul 2011 13:51:08 +0200,
>> > Artyom Tarasenko wrote:
>> >> On Thu, Jul
On Sat, Jul 30, 2011 at 11:09 AM, Blue Swirl wrote:
> On Mon, Jul 25, 2011 at 8:22 PM, Artyom Tarasenko wrote:
>> clear interrupt request if the interrupt priority < CPU pil
>> clear hardware interrupt request if interrupts are disabled
>>
>> Signed-off-by: A
On Sat, Jul 30, 2011 at 3:25 PM, Blue Swirl wrote:
> On Sat, Jul 30, 2011 at 3:31 PM, Artyom Tarasenko wrote:
>> On Sat, Jul 30, 2011 at 11:09 AM, Blue Swirl wrote:
>>> On Mon, Jul 25, 2011 at 8:22 PM, Artyom Tarasenko
>>> wrote:
>>>> clear interrupt
On Sat, Jul 30, 2011 at 10:32 PM, Blue Swirl wrote:
> On Sat, Jul 30, 2011 at 11:19 PM, Artyom Tarasenko
> wrote:
>> On Sat, Jul 30, 2011 at 3:25 PM, Blue Swirl wrote:
>>> On Sat, Jul 30, 2011 at 3:31 PM, Artyom Tarasenko
>>> wrote:
>>>> On Sat, J
-3: 02483d00 0018 0028 000232bd
^^ not zero
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
On Fri, Aug 5, 2011 at 10:32 PM, Blue Swirl wrote:
> On Fri, Aug 5, 2011 at 4:36 PM, Artyom Tarasenko wrote:
>> Host x86_64, guest sparc64. Found a case where a branch instruction
>> (brz,pn %o0) unexpectedly jumps to an unexpected address. I.e.
>> branch shouldn't be
On Sat, Aug 6, 2011 at 2:09 PM, Blue Swirl wrote:
> On Fri, Aug 5, 2011 at 10:21 PM, Artyom Tarasenko wrote:
>> On Fri, Aug 5, 2011 at 10:32 PM, Blue Swirl wrote:
>>> On Fri, Aug 5, 2011 at 4:36 PM, Artyom Tarasenko
>>> wrote:
>>>> Host x86_64, gue
Check whether dc->npc is dynamic before using its value for branch.
Signed-off-by: Artyom Tarasenko
---
Particaluary the patch fixes handling of the constructions like
0x13e26c0: brz,pn %o0, 0x13e26e4
0x13e26c4: brlez,pn %o1, 0x13e26e4
present in NetBSD-5.1
target-sparc/translat
Since it's a pure bug fix, do you think can it be applied to 0.15 as well?
On Sat, Aug 6, 2011 at 10:14 PM, Blue Swirl wrote:
> Thanks, applied.
>
> On Sat, Aug 6, 2011 at 3:01 PM, Artyom Tarasenko wrote:
>> Check whether dc->npc is dynamic before using its value for bran
here fsys is directory
>
> anyone have idea how to modify this kind of file system?
Have a look at http://libguestfs.org/guestmount.1.html
Alternatively you can convert qcow2 to a raw image, modify it and
convert it back. But this is definitely less convenient than
guestmount.
--
Regard
a: add isa_bus_from_device() method
> fdc: Parametrize ISA base, IRQ and DMA
> prep: add pc87312 Super I/O emulation
> prep: use pc87312 Super I/O chip instead of collection of random ISA
> devices
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/search/label/qemu
On Fri, Jun 1, 2012 at 9:38 PM, Hervé Poussineau wrote:
> Hi,
>
> Artyom Tarasenko a écrit :
>
>> On 3/17/12, Hervé Poussineau wrote:
>>>
>>> First two patches repair some functionality broken since 2009!
>>> Debian install root floppy can now be
ve other
license written directly in the source code. (This is btw, why you
still have to fix the license violation [1,2] happened in 2010).
Moreover, there are explicit places in QEMU source tree [3] which say
BSD-like is the only acceptable license.
Artyom
1. http://lists.gnu.org/archive/html/qem
On Sat, Jun 16, 2012 at 8:31 PM, Andreas Färber wrote:
> Am 16.06.2012 20:07, schrieb Artyom Tarasenko:
>> On 6/12/12, Markus Armbruster wrote:
>>> Paolo Bonzini writes:
>>>
>>>> Il 11/06/2012 03:57, Wen Congyang ha scritto:
>>>>&
Don't produce stray irq 5, don't overwrite ivec_data if still busy with
processing of the previous interrupt.
Signed-off-by: Artyom Tarasenko
---
hw/sun4u.c | 29 -
1 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun
The vector interrupt has higher priority than interrupt_level_n.
Also check only interrupt_level_n concurency when TL > 0, the traps of
other types may be nested.
Signed-off-by: Artyom Tarasenko
---
hw/sun4u.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a
|5 +
> hw/pc87312.c| 405
> +++
> hw/ppc_prep.c | 78 +---
> hw/prep_pci.c | 14 ++
> trace-events|8 +
> 8 files changed, 446 insertions(+), 69 deletions(
Fix BCD mask for date. The most visible effect of this patch is
Solaris 2.5.1 doesn't hang at boot if the day of month is >21.
Signed-off-by: Artyom Tarasenko
---
hw/m48t59.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/m48t59.c b/hw/m48t59.c
index
On Mon, Apr 23, 2012 at 5:18 PM, Andreas Färber wrote:
> Am 23.04.2012 16:48, schrieb Artyom Tarasenko:
>> Fix BCD mask for date. The most visible effect of this patch is
>> Solaris 2.5.1 doesn't hang at boot if the day of month is >21.
>>
>> Signed-off-by: Art
On Mon, Apr 23, 2012 at 7:34 PM, Andreas Färber wrote:
> Am 23.04.2012 18:48, schrieb Artyom Tarasenko:
>> On Mon, Apr 23, 2012 at 5:18 PM, Andreas Färber wrote:
>>> Ideally the patch would also indicate that it's about "m48t59: ".
>>
>> You mea
Just for the reference,
commit 41557447d30eeb944e42069513df13585f5e6c7f
Author: Alexander Graf
Date: Fri Sep 10 15:08:34 2010 +
PPC: Redesign interrupt trigger path
According to the Book3S spec, the interrupt context starts with an MSR
value that is rather simple. If we leave
understands the sparc64 code
> translation could have a look at this. More debugging data may be
> provided upon request.
>
> Thanks,
> Jakub
>
> ___
> HelenOS-devel mailing list
> helenos-de...@lists.modry.cz
> http:/
On Fri, Jul 1, 2011 at 11:36 AM, Jakub Jermar wrote:
> Hi Artyom,
>
> On 1.7.2011 11:15, Artyom Tarasenko wrote:
>> Hi Jakub,
>> 2011/6/30 Jakub Jermar :
>>> Hi,
>>>
>>> we have been observing a problem with HelenOS running on the latest git
>&
d to copy cpu_src* to further temps at all? IMHO
-tcg_gen_mov_tl(cpu_cc_src, cpu_src1);
-tcg_gen_mov_tl(cpu_cc_src2, cpu_src2);
-gen_trap_ifdivzero_tl(cpu_cc_src2);
-tcg_gen_divu_i64(cpu_dst, cpu_cc_src
al. Even
>>> though it has no effect on the computation, removing it will make the
>>> testcase non-reproducible.
>>
>> Could you try to replace udivx with sdivx? It looks wrong too.
>
> Yeah, `sdivx` behaves the same wrt. the testcase.
Don't need to. Will send a qemu patch tonight. Great job! Once more,
thanks a lot!
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
On Fri, Jul 1, 2011 at 5:20 PM, Laurent Desnogues
wrote:
> On Fri, Jul 1, 2011 at 5:03 PM, Artyom Tarasenko wrote:
> [...]
>>> I find it odd that udivx is using cpu_cc_src and cpu_cc_src2. Using
>>> dedicated local temps seems to fix the issue.
>>
>> Do we ne
On Fri, Jul 1, 2011 at 5:53 PM, Artyom Tarasenko wrote:
> On Fri, Jul 1, 2011 at 5:20 PM, Laurent Desnogues
> wrote:
>> On Fri, Jul 1, 2011 at 5:03 PM, Artyom Tarasenko wrote:
>> [...]
>>>> I find it odd that udivx is using cpu_cc_src and cpu_cc_src2. Using
>&
udivx and sdvix don't modify condition flags, so they shall not
overwrite cpu_cc_*
Signed-off-by: Artyom Tarasenko
---
target-sparc/translate.c | 32 ++--
1 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/target-sparc/translate.c b/target-
gt; as they are FP instructions.
Nice series!
May I ask what have you used as a test case to discover the problem?
Please use the scripts/checkpatch.pl script to check coding style,
there are some braces missing in 2/4 and 4/4 patches.
The contents
Acked-by: Artyom Tarasenko
> target-spa
n example where we would have an unassigned access fault
for an implemented ASI ?
>So you should perform some arithmetic with
> the ASI numbers to make them match non-block ASIs, for example asi &
> ~0x6. This only works in the specific block ASIs, so I'd move this
> inside
es glibc use it?
> - hardware interrupt handing (both interrupt controller and cpu side)
> also needed to modify the openbios.
Nice. A lot of work indeed.
> - nonfaulting load ASI
> glibc memcpy seems to use nonfaulting loads
You mean other than the implemented 0x82/83 and 0x8a/8b ones, or that
the current implementation is buggy?
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
setting ELF_HWCAP fixes dynamic library loading for Linux/sparc64
This patch allows loading busybox from Debian 6 initrd
Signed-off-by: Artyom Tarasenko
---
linux-user/elfload.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user
e, int rd)
> helper_check_align(addr, 0x3f);
> for (i = 0; i < 16; i++) {
> val = *(uint32_t *)&env->fpr[rd++];
> - helper_st_asi(addr, val, asi & 0x1f, 4);
> + helper_st_asi(addr, val, asi & 0x19, 4);
> addr += 4;
> }
>
> --
> 1.7.5.4
>
>
>
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
On Mon, Jul 18, 2011 at 7:32 AM, Tsuneo Saito wrote:
> UA2007 ASI_BLK_* should be added in is_translating_asi().
>
> Signed-off-by: Tsuneo Saito
The comment "Ultrasparc IIi translating asi" has to be adjusted too.
Otherwise
Acked-by: Artyom Tarasenko
The other patches - fcm
memcpy(buf, s->ti_buf, dmalen);
> - buf[0] = 0;
> + buf[0] = buf[2] >> 5;
why this byte needs to be overwritten? Doesn't ti_buf have a bus id?
> }
> DPRINTF("get_cmd: len %d target %d\n", dmalen, target);
>
> --
> 1.7.5.4
>
>
>
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
lprit (which is also why I went down the path of
> implementing the dbri device), when in reality, the selftest failure
> was preventing "boot net" from running and fixing the ledma register
> settings.
Ops. Apologises for sending you in the wrong direction.
To my defence - are you sure
in guest.
Of course everything is possible, but I think it is quite unlikely
that it hangs in the host virtio code: it's used a lot in emulation of
systems where we have much more users (x86-64 and ppc).
Artyom
On Mon, Mar 31, 2014 at 9:27 AM, wbx wrote:
> Hi Mark,
>
> I have
the kernel will
list the active threads (the magic SysRq has to be enabled to use this
feature though). Then please post the listing here and on the
sparclinux@ mailing list.
Artyom
On Tue, Apr 1, 2014 at 11:37 AM, wbx wrote:
> Hi Artyom,
>
> okay, with 1.7.0 on Maverick I get:
om
> FW interface (which OBP has no knowledge of) rather than by having QEMU
> emulate the NVRAM in exactly the same way as real hardware.
Actually QEMU does set variables in NVRAM (hw/sparc/sun4m.c:151), and
afaik uses the layout of open-sourced OBP. The problem is that earlier
versions of OBP seemed to have a different layout, or maybe just a
magic constant is missing somewhere.
Artyom
--
Regards,
Artyom Tarasenko
linux/sparc and solaris/sparc under qemu blog:
http://tyom.blogspot.com/search/label/qemu
BP every time you restart).
Point taken. Added lists of Solaris kernels known to boot and not to
boot with OpenBIOS.
Feel free to submit yours if it's not in the lists yet. ;-)
Artyom
--
Regards,
Artyom Tarasenko
linux/sparc and solaris/sparc under qemu blog:
http://tyom.blogspot.com/search/label/qemu
On Sat, Dec 28, 2013 at 6:52 PM, Mark Cave-Ayland
wrote:
> On 28/12/13 17:30, Artyom Tarasenko wrote:
>
>>> Also Artyom's blog is quite out of date with respect to OpenBIOS -
>>> OpenBIOS
>>> has been able to boot my test Solaris 8 image for over 2 years no
d-off-by : Olivier Danet
Corresponds with http://www.squirrel.com/squirrel/sun-nvram-hostid.faq
and Solaris 9 detects the hostid after this patch fine, so
Reviewed-by: Artyom Tarasenko
> ---
> include/hw/nvram/openbios_firmware_abi.h | 2 ++
> 1 file changed, 2 insertions(+)
>
&
On Tue, Dec 31, 2013 at 2:43 AM, Peter Bartoli wrote:
>
> On Dec 28, 2013, at 2:00 AM, Artyom Tarasenko wrote:
>
> Actually QEMU does set variables in NVRAM (hw/sparc/sun4m.c:151), and
> afaik uses the layout of open-sourced OBP. The problem is that earlier
> versions of OB
steps towards having
> an address-space per CPU.
This is a very interesting approach. Would it be also possible to have
multiple address-spaces per CPU?
At least SPARC emulation would profit from that, the CPUs have
separate MMUs for data and code.
Artyom
> It's not complete but good e
;t really recompile this exact version, but you can recompile a
> slightly older version, the one which is in the Debian archive:
>
> http://packages.debian.org/source/unstable/openhackware
>
> I don't know what are the difference between this one and the one in
> QEMU though.
Fwiw last year I built ppc_rom.bin from this git tree:
git://github.com/tycho/openhackware.git
Saw no differences between this one and the binary one while booting Linux.
Artyom
--
Regards,
Artyom Tarasenko
linux/sparc and solaris/sparc under qemu blog:
http://tyom.blogspot.com/search/label/qemu
On Mon, Apr 29, 2013 at 7:43 AM, Rob Landley wrote:
> On 04/27/2013 03:00:06 PM, Artyom Tarasenko wrote:
>>
>> > For a lot of the 64-bit targets, actual 64 bit userspace support is
>> > strangely lacking. For ppc64 they say to use ppc32, and I've been told
>>
nfo = {
> +.name = TYPE_M48TXX_SYS_BUS,
> +.parent = TYPE_SYS_BUS_DEVICE,
> +.instance_size = sizeof(M48txxSysBusState),
> +.abstract = true,
> +.class_init = m48txx_sysbus_class_init,
> +};
> +
> +static const TypeInfo m48txx_isa_type_info = {
> +.nam
On Fri, May 3, 2013 at 7:50 AM, Hervé Poussineau wrote:
> Artyom Tarasenko a écrit :
>
>> On Thu, May 2, 2013 at 10:09 PM, Hervé Poussineau
>> wrote:
>>>
>>> As m48t59 devices can only be created with m48t59_init() or
>>> m48t59_init_isa(),
>&
n qemu-system-sparc64 with the slowdown
factor of 96 ?
Do they both use Debian Wheezy guest? You have a remark that ppc64 has
problems with its clock. Was it taken into account when the slowdown
factors were calculated?
Artyom
--
Regards,
Artyom Tarasenko
linux/sparc and solaris/sparc under qemu blog
1 - 100 of 719 matches
Mail list logo
