e.kvy.fi/git/qemu.git
git://brigitte.kvy.fi/git/libqemu.git
and compare the prof_qemu/* branches to origin/master. Unfortunately the
changes are a bit old.
--
Antti P Miettinen
http://www.iki.fi/~ananaza/
Julien Heyman writes:
> Hi,
>
> I was wondering if anyone had some data regarding the relative performance of
> any given ARM board emulated in QEMU versus the real thing. Yes, I do know
> this depends a lot on the host PC running qemu, but some ballpark/example
> figures would help. Say, I emulat
me know how can test QEMU + ARM11MPcore combination.
In 2009 at least the following kernel options seemed relevant:
CONFIG_MACH_REALVIEW_EB=y
CONFIG_REALVIEW_EB_ARM11MP=y
CONFIG_REALVIEW_EB_ARM11MP_REVB=y
# CONFIG_REALVIEW_HIGH_PHYS_OFFSET is not set
--
Antti P Miettinen
http://www.iki.fi/~ananaza/
Alexandros Frantzis <[EMAIL PROTECTED]> writes:
> Can someone give me some pointers on how this might be implemented in
> qemu (if it doesn't already exist)?
There was recently a thread about this:
http://thread.gmane.org/gmane.comp.emulators.qemu/16604
--
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Rick Vernam <[EMAIL PROTECTED]> writes:
> any comments on the current status of moving beyond dependency on GCC 3.3.6?
Sorry for a vague ignorant question, but would the gcc-4 issues be
affected in any way if the ops were inside a big function (use labels
to find them) vs the current use of separa
Still going through the gmane archive - sorry for digging old stuff,
but.. :-)
Paul Brook <[EMAIL PROTECTED]> writes:
> IMHO the way forward long-term is to implement some sort of code
> generation in qemu. By this I mean incorporating some sort of
> compiler backend/optimizing assembler into qemu
Which way are the color components supposed to be encoded in the
framebuffer? I tried to read the "PrimeCell Color LCD Controller
(PL110) Technical Reference Manual" but to me it is not clear. And to
add to the confusion there is a control bit to choose between RGB and
BGR.
Anyway, I'm running Xor
Laurent DESNOGUES <[EMAIL PROTECTED]> writes:
> There is a company that claims to be able to accurately
> simulate an at 200 Mhz (http://www.vastsystems.com). I
> bet there are using statistical cycle counting and so
> are probably very wrong :)
Well, their simulation speed depends on the kind of
Paul Brook <[EMAIL PROTECTED]> writes:
> I've been considering a machine config file for a while, but haven't come up
> with a coherent way of representing everything yet.
M5 uses python scripts (as does VirtuTech Simics) but that might not
be a good fit for qemu.
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"Shashidhar Mysore" <[EMAIL PROTECTED]> writes:
> I intend to extract program counter streams from QEMU as a program executes.
> Can you please point me to the hooks that I may have to insert into the QEMU
> source code in order to extract the PC values?
I used to do that with qemu 0.7. I did not
Paul Brook <[EMAIL PROTECTED]> writes:
> The attached patch implements Arm system emulation.
Cool :-)
> There's nothing special about these. Just a vanilla 2.6.14 kernel configured
> with a serial console and busybox+bash from a Debian arm-linux install.
I checked out qemu from CVS, applied you
Paul Brook <[EMAIL PROTECTED]> writes:
> The attached patch implements Arm CPU suspend/halt.
Just to confirm: the busy looping is gone with the patch applied.
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Dave Feustel <[EMAIL PROTECTED]> writes:
> Is there an anonymous cvs server from which I can
> checkout the current version of qemu?
cvs -z3 -d:ext:[EMAIL PROTECTED]:/cvsroot/qemu co qemu
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Qe
I'm slowly reading through the gmane.org archive - sorry for digging
old stuff :-)
Olivier Bourgois <[EMAIL PROTECTED]> writes:
> Has anybody tinkered with porting qemu to something like a TI
> TMS320C6X DSP host.
Umm.. how about the other way around? E.g. having a TMS320C55x target?
The disassem
Dave Feustel <[EMAIL PROTECTED]> writes:
> I have an old pci TMS320C6x development board right in front
> of me as I type this. It came with windows software, but I can't
> do anything with it without a new tool chain now that I am
> running OpenBSD.
TI has a freely downloadable toolchain at
h
Fabrice Bellard <[EMAIL PROTECTED]> writes:
> Log message:
> NIC emulation for qemu arm-softmmu (Paul Brook)
After some tweaking (for some reason debootstrap did not manage to
install/configure all packages) I managed to boot debian/sid with NFS
root with this. Great work!
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Daniel Jacobowitz <[EMAIL PROTECTED]> writes:
> It appears to work fairly well.
I can confirm that. I'm currently debugging a segmentation fault in
compiling one source file of firefox. Something that the current ARM
sysemu can do is e.g.
- boot debian/sid NFS root
- compile gcc far enough to prod
Antti P Miettinen <[EMAIL PROTECTED]> writes:
> Looks like the kernel somehow ends up thinking that we are loading
> something from zero. Hmm.. the value being loaded to r1 is zero. So
> could this be related to crossing a page boundary in the middle of an
> instruction? But an
Antti P Miettinen <[EMAIL PROTECTED]> writes:
> __asm__ __volatile__ ("ldmia %0,{%1,%2}"
> : "=r" (base) : "0" (base), "r" (dummy));
Hmm.. thats probably wrong.. is this closer:
__asm__ __volatile__ ("ldmia
Antti P Miettinen <[EMAIL PROTECTED]> writes:
> but anyway - how would the ldm register update be made atomic? Or
> should the restart be able to continue in the middle? How are the
> atomicity issues handled in qemu?
I wonder how the ARM implementations handle it..
The below is a
Daniel Jacobowitz <[EMAIL PROTECTED]> writes:
> You don't need anything near this complicated: if the register being
> set is the base register, copy it into T2 instead of overwriting the
> base register. Then at the end, if the base register was loaded, copy
> T2 into the base register. That's a
Antti P Miettinen <[EMAIL PROTECTED]> writes:
> Something like this?
Hmm.. I suppose the branch should be the last op to generate if PC is
loaded by the ldm. So the possible gen_bx should be after the
writeback? But what about the S bit? Or is this all highly academic?
Does ldm ever l
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