On Wed, Jul 09, 2025 at 03:38:49AM +, Duan, Zhenzhong wrote:
> >> +enum {
> >> +VIOMMU_CAP_STAGE1 = BIT_ULL(0), /* stage1 page table
> >supported */
> >> +};
> >
> >Thanks for this work. I am happy to see that we can share the
> >common code that allocates a NESTING_PARENT in the core usin
>-Original Message-
>From: Nicolin Chen
>Subject: Re: [PATCH v3 02/20] hw/pci: Introduce
>pci_device_get_viommu_cap()
>
>On Tue, Jul 08, 2025 at 07:05:43AM -0400, Zhenzhong Duan wrote:
>> diff --git a/include/hw/iommu.h b/include/hw/iommu.h
>> new file mode 100644
>> index 00..e
>-Original Message-
>From: Nicolin Chen
>Subject: Re: [PATCH v3 02/20] hw/pci: Introduce
>pci_device_get_viommu_cap()
>
>On Wed, Jul 09, 2025 at 03:38:49AM +, Duan, Zhenzhong wrote:
>> >> +enum {
>> >> +VIOMMU_CAP_STAGE1 = BIT_ULL(0), /* stage1 page table
>> >supported */
>> >>
There is some enhance about LoongArch mmu tcg emulation, add new
header file cpu-mmu.h and function loongarch_check_pte(). Function
loongarch_check_pte() can work on both TLB entry and pte entry.
This patchset mainly is code cleanup and enhancement, its main
purpose is to work for hardware page ta
The fchmodat2 syscall is new from Linux 6.6; it is like the
existing fchmodat syscall except that it takes a flags parameter.
If we have the host fchmodat2 syscall, we implement it as a
direct passthrough call; if we do not, then we can fall back
to using the libc fchmodat() function. The fallback
On Thu, Jul 03, 2025 at 03:59:33PM +0100, Roy Hopkins wrote:
Here is v9 of the set of patches to add support for IGVM files to QEMU. This is
based on commit c77283dd5d79149f4e7e9edd00f65416c648ee59 of qemu.
I successfully tested this series with the IGVM file generated by
COCONUT SVSM [1] in th
On 7/7/25 21:30, Volker Rümelin wrote:
Introduce the hold_DREQ() and release_DREQ() functions to ease
the review of the next patch.
Signed-off-by: Volker Rümelin
---
hw/audio/sb16.c | 27 +--
1 file changed, 21 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mat
Hi Shameer,
On 7/8/25 10:54 AM, Shameerali Kolothum Thodi wrote:
> Hi Eric,
>
>> -Original Message-
>> From: Eric Auger
>> Sent: Tuesday, July 8, 2025 8:41 AM
>> To: Shameerali Kolothum Thodi
>> ; qemu-...@nongnu.org;
>> qemu-devel@nongnu.org
>> Cc: peter.mayd...@linaro.org; j...@nvidia.c
We plan to reuse build_x86_acpi_pci_hotplug() implementation
for ARM so let's move the code to generic pcihp.
Associated static aml_pci_pdsm() helper is also moved along.
build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug().
No code change intended.
Also fix the reference to acpi_
For the legacy smmuv3 test case, generated IORT has a single SMMUv3 node,
a Root Complex(RC) node and 1 ITS node.
RC node features 4 ID mappings, of which 2 points to SMMU node and the
remaining ones points to ITS.
pcie.0 -> {SMMU0} -> {ITS}
{RC} pcie.1 -> {SMMU0} -> {ITS}
pcie.2
Introduce a new structure VTDHostIOMMUDevice which replaces
HostIOMMUDevice to be stored in hash table.
It includes a reference to HostIOMMUDevice and IntelIOMMUState,
also includes BDF information which will be used in future
patches.
Signed-off-by: Zhenzhong Duan
Reviewed-by: Eric Auger
---
On 7/3/25 1:36 PM, Dr. David Alan Gilbert wrote:
* Pierrick Bouvier (pierrick.bouv...@linaro.org) wrote:
Hi,
I recently needed to slow down time within a virtual machine, due to a
timeout being hit because my QEMU binary which was not fast enough (gcov
debug build if you're curious about the us
Add all FEAT_MEC registers.
To work properly, FEAT_MEC also depends on FEAT_SCTLR2 and FEAT_TCR2,
which are not implemented in this commit. The bits in SCTLR2 and TCR2
control which translation regimes use MECIDs, and determine which MECID
is selected.
FEAT_MEC also requires two new cache managem
Since we're linking the network booting code into the main s390-ccw.img
firmware binary nowadays, we can support the "loadparm" parameter now
quite easily for pxelinux.cfg config files that contain multiple entries,
and also add support for a simple boot menu here.
Thomas Huth (5):
pc-bios/s390-
Hi Eric,
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH v2 09/19] intel_iommu: Introduce two helpers
>vtd_as_from/to_iommu_pasid_locked
>
>Hi Zhenzhong,
>
>On 7/7/25 5:12 AM, Duan, Zhenzhong wrote:
>> Hi Eric,
>>
>>> -Original Message-
>>> From: Duan, Zhenzhong
>>> Sub
On Tue, Jul 08, 2025 at 04:25:25PM +0100, Daniel P. Berrangé wrote:
> On Thu, Jul 03, 2025 at 04:31:59PM +0100, Roy Hopkins wrote:
> > When an SEV guest is started, the reset vector and state are
> > extracted from metadata that is contained in the firmware volume.
> >
> > In preparation for using
On 7/8/25 10:19 AM, Philippe Mathieu-Daudé wrote:
Reviewed-by: Pierrick Bouvier
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/tswap.h | 13 +
include/qemu/target-info.h | 8
cpu-target.c | 7 ---
hw/core/cpu-system.c | 2 +-
h
On 7/8/25 22:36, John Snow wrote:
centos_stream_9 3.9.23 21.3.1 53.0.0 3.4.3 BaseOS, CRB
Ok, so the lowest version of Sphinx (3.4.3) is currently used for CentOS
Stream 9. It's supported for roughly 2 more years, until 12.0.
opensuse_leap_15_6 3.6.15 20.0.2 44.1.1 2.
Hi Bernhard,
Thanks for your patch!
There was an identical patch last week on the list:
https://lore.kernel.org/qemu-rust/20250703-rust_bindings_allow_unnecessary_transmutes-v1-1-692ca210d...@linaro.org/
--
Manos Pitsidianakis
Emulation and Virtualization Engineer at Linaro Ltd
Philippe Mathieu-Daudé writes:
> Hi Steve,
>
> On 8/7/25 19:24, Steve Sistare wrote:
>> Add a unit test for qom-list-getv.
>> Signed-off-by: Steve Sistare
>> ---
>> tests/qtest/qom-test.c | 64
>> ++
>> 1 file changed, 64 insertions(+)
>> diff
Hi
On Tue, Jul 8, 2025 at 9:07 PM Andrew Keesler wrote:
>
> Thanks to 72d277a7, 1ed2cb32, and others, EDID (Extended Display
> Identification Data) is propagated by QEMU such that a virtual display
> presents legitimate metadata (e.g., name, serial number, preferred
> resolutions, etc.) to its co
On Wed, Jul 9, 2025 at 12:53 AM Philippe Mathieu-Daudé
wrote:
>
> Check endianness at runtime to remove the target-specific
> TARGET_BIG_ENDIAN definition. Use cpu_to_[be,le]XX() from
> "qemu/bswap.h" instead of tswapXX() from "exec/tswap.h".
>
> Suggested-by: Richard Henderson
> Signed-off-by: P
On 24/06/2025 20:51, Maciej S. Szmigiero wrote:
External email: Use caution opening links or attachments
From: "Maciej S. Szmigiero"
This property allows configuring whether to start the config load only
after all iterables were loaded.
Nit: maybe, to be more accurate, mention that it is
From: Kane-Chen-AS
Introduce a QEMU device model for ASPEED's One-Time Programmable (OTP)
memory.
This model simulates a word-addressable OTP region used for secure
fuse storage. The OTP memory can operate with an internal memory
buffer.
The OTP model provides a memory-like interface through a
Since v6:
- Added R-b tags
- Fixed typos
- Dropped "Introduce target_base_arch()" because unused so far
- Dropped unrelated patches
Philippe Mathieu-Daudé (8):
target/qmp: Use target_cpu_type()
qemu/target-info: Factor target_arch() out
qemu/target-info: Add %target_arch field to TargetInfo
Use a local SysBusDevice handle. Also use the newly introduced
sysbus_mmio_map_name which brings better readability about the region
being mapped. GED device has regions which exist depending on some
external properties and it becomes difficult to guess the index of
a region. Better refer to a regi
From: Kane-Chen-AS
This patch adds a new machine parameter `otpmem` which creates a QOM
property alias on the aspeed_sbc device for the OTP drive.
Example usage:
./qemu-system-arm \
-machine ast2600-evb,otpmem=otp-drive \
-blockdev driver=file,filename=otpmem.img,node-name=otp \
-
On Mon, Jul 7, 2025 at 10:31 PM Volker Rümelin wrote:
>
> Change the block structure according to the QEMU Coding Style
> documentation.
>
> Signed-off-by: Volker Rümelin
> ---
> hw/audio/sb16.c | 57 +
> 1 file changed, 20 insertions(+), 37 deleti
Use qom-list-getv to speed up the qom-tree command.
Signed-off-by: Steve Sistare
---
python/qemu/utils/qom.py| 43 +++--
python/qemu/utils/qom_common.py | 53 +
2 files changed, 78 insertions(+), 18 deletions(-)
diff --
FYI, the discussion about whether vs insn fault or illegal insn fault
should be raised can be found from [1].
[1] https://lists.riscv.org/g/tech-privileged/message/2469
On Tue, Jul 8, 2025 at 2:07 PM Xu Lu wrote:
>
> When supervisor CSRs are accessed from VU-mode, a virtual instruction
> excepti
We intend to reuse build_append_pci_bus_devices and build_append_pcihp_slots
on ARM. So let's move them to hw/acpi/pcihp.c as well as all static
helpers they use.
No functional change intended.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonath
Hi All,
Changes from v6:
https://lore.kernel.org/qemu-devel/20250703084643.85740-1-shameerali.kolothum.th...@huawei.com/
1. Fixed the warning case for DT support, reported by Eric(patch #8).
2. Picked up R-by's and T-by's. Thanks!
Please take a look and let me know. I think this is in a good sha
As previously mentioned in our RFC, we at 9elements were working
on a new video subsystem for QEMU.
This subsystem includes a USB Video Class (UVC) frontend that exposes
a virtual camera device to the guest OS, backed by host-side
video sources like v4l2, GStreamer and libcamera.
The patch series
When vIOMMU is configured x-flts=on in scalable mode, stage-1 page table
is passed to host to construct nested page table. We need to check
compatibility of some critical IOMMU capabilities between vIOMMU and
host IOMMU to ensure guest stage-1 page table could be used by host.
For instance, vIOMMU
Now that all infrastructures of supporting passthrough device running
with stage-1 translation are there, enable it now.
Signed-off-by: Zhenzhong Duan
---
hw/i386/intel_iommu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 0a86bd47b2..0
Define the qom-list-getv command, which fetches all the properties and
values for a list of paths. This is faster than qom-tree-get when
fetching a subset of the QOM tree. See qom.json for details.
Signed-off-by: Steve Sistare
---
qapi/qom.json | 50 +++
The MECEn bit in SCR_EL3 enables access to the EL2 MECID registers from
EL2, so add it to the SCR mask list to use it later on.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
---
target/arm/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu
Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
ARM and acpi-index support. Also rename it into build_pci_bridge_edsm.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
v3->v4:
- renamed into build_pci_bridge_edsm() (Jonathan, Igor)
v2 -> v3:
- move to pci-bridge.c
From: Thomas Huth
We're going to support a menu for the pxelinux.cfg code, and to be able
to reuse some functionality from menu.c, we should align the maximum
amount of possible entries with the MAX_BOOT_ENTRIES constant that is
used there. Thus replace MAX_PXELINUX_ENTRIES with MAX_BOOT_ENTRIES.
From: Thomas Huth
Since we're linking the network booting code into the main firmware
binary nowadays, we can support the "loadparm" parameter now quite
easily for pxelinux.cfg config files that contain multiple entries.
Signed-off-by: Thomas Huth
---
pc-bios/s390-ccw/netmain.c | 33 ++
This follow-up extends the video subsystem by adding
support for a GStreamer backend.
There are some rules to follow when passing a GStreamer
pipeline to QEMU:
- pipeline must start with a source element (for example, v4l2src)
- pipeline must NOT end with a sink element. QEMU will dynamically
This patch extends the GStreamer backend by implementing
the libcamera (pseudo) backend.
The Libcamera backend builds on top of GStreamer and uses
libcamerasrc as source element.
Example usage:
qemu-system-x86_64 \
-device qemu-xhci \
-videodev libcamera,id=cam0,\
camera-name="\\\_S
Hi Nicolin,
> -Original Message-
> From: Nicolin Chen
> Sent: Tuesday, July 8, 2025 8:58 AM
> To: Shameerali Kolothum Thodi
> Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org;
> eric.au...@redhat.com; peter.mayd...@linaro.org; j...@nvidia.com;
> ddut...@redhat.com; berra...@redhat.com; ima
This property will be set by the machine code on the object
creation. It will be used by acpi pcihp hotplug code.
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
hw/acpi/generic_event_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/acpi
On 7/8/25 10:19 AM, Philippe Mathieu-Daudé wrote:
Now that various VirtIO files don't use target specific
API anymore, we can move them to the system_ss[] source
set to build them once.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Manos Pitsidianakis
---
MST prefers to defer this one to
Some sysbus devices have conditional mmio regions. This
happens for instance with the hw/acpi/ged device. In that case
it becomes difficult to predict which index a specific MMIO
region corresponds to when one needs to mmio map the region.
Introduce a new helper that takes the name of the region in
On Thu, Jul 03, 2025 at 04:03:10PM +0100, Roy Hopkins wrote:
> In preparation for supporting the processing of IGVM files to configure
> guests, this adds a set of functions to ConfidentialGuestSupport
> allowing configuration of secure virtual machines that can be
> implemented for each supported
"qemu/typedefs.h" is already included by "qemu/osdep.h".
Signed-off-by: Philippe Mathieu-Daudé
---
hw/vfio/vfio-migration-internal.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/vfio/vfio-migration-internal.h
b/hw/vfio/vfio-migration-internal.h
index a8b456b239d..00e2badd889 100644
---
Rustc v1.88 ships with a new lint `unnecessary_transmutes` which triggers the
following error when compiling code generated by bindgen:
error: unnecessary transmute
--> rust/qemu-api/libqemu_api.rlib.p/structured/bindings.inc.rs:792:18
|
792 | unsafe { ::std::mem::transmute(
v2: Split as 1 patch per MAINTAINERS section.
Philippe Mathieu-Daudé (3):
hw/intc/loongarch_extioi: Remove unnecessary 'qemu/typedefs.h' include
hw/vfio/vfio-migration: Remove unnecessary 'qemu/typedefs.h' include
system/os-win32: Remove unnecessary 'qemu/typedefs.h' include
hw/vfio/vfio-m
On 12/5/25 15:47, Steve Sistare wrote:
Define the qom-tree-get QAPI command, which fetches an entire tree of
properties and values with a single QAPI call. This is much faster
than using qom-list plus qom-get for every node and property of the
tree. See qom.json for details.
Signed-off-by: Ste
On 7/7/25 19:09, Philippe Mathieu-Daudé wrote:
"qemu/typedefs.h" is already included by "qemu/osdep.h".
Signed-off-by: Philippe Mathieu-Daudé
---
hw/vfio/vfio-migration-internal.h | 1 -
include/system/os-win32.h | 1 -
hw/intc/loongarch_extioi_kvm.c| 1 -
3 files changed, 3 de
Now that the existance of a device tree compiler is enusred, it is possible to
always generate the DTBs from sources. This avoids checked in DTBs to become
inconsistent with their sources.
Signed-off-by: Bernhard Beschow
---
MAINTAINERS | 2 +-
pc-bios/dtb/bamboo.dtb
The GICD_TYPER2 register is new for GICv4.1. As an ID register, we
migrate it so that on the destination the kernel can check that the
destination supports the same configuration that the source system
had. This avoids confusing behaviour if the user tries to migrate a
VM from a GICv3 system to a
Hi, recently there was some discussion and debate over what versions
of which things in the Python ecosystem we need to support with
regards to our build platform promise. I don't address those issues in
this mail at all. O:-)
In researching that problem, I created a CLI script to automatically
po
Ping
It would be nice to have all CSRs for 'info registers' for the next release.
We have one week before the freeze :D
Thanks,
Daniel
On 6/23/25 2:21 PM, Daniel Henrique Barboza wrote:
Hi,
The output of HMP 'info registers', implemented by the cpu_dump_state
callback, returns way less CSRs
The next patch relies on dtc for boards with a bundled DTB. These boards
depend on libfdt already. Make sure that there is a dtc iff libfdt is used
such that the DTBs can be generated.
Co-developed-by: Paolo Bonzini
Signed-off-by: Bernhard Beschow
---
meson.build
This series removes the bundled device tree blobs from the repository which are
redundant to the bundled device tree sources. To make this work, the device tree
compiler 'dtc' is now required whenever libfdt is used. Furthermore, dtc can now
be built from the bundled libfdt if needed.
v2:
* Allow
On 8/7/25 10:58, Philippe Mathieu-Daudé wrote:
Commit f5fd677ae7c ("win32/socket: introduce qemu_socket_select()
helper") included the "qemu/typedefs.h" header for the Error type,
but files including "system/os-win32.h" should already include
"qemu/osdep.h", and thus "qemu/typedefs.h".
Signed-of
On 7/7/25 21:30, Volker Rümelin wrote:
Change the block structure according to the QEMU Coding Style
documentation.
Signed-off-by: Volker Rümelin
---
hw/audio/sb16.c | 57 +
1 file changed, 20 insertions(+), 37 deletions(-)
Reviewed-by: Phili
On Tue, Jul 08, 2025 at 08:57:37AM +, Shameerali Kolothum Thodi wrote:
> > Thank you for the effort and the work here.
> >
> > A separate topic: do you have any preparation for the vIOMMU uAPI
> > patches (iommufd backends) in QEMU?
> >
> > I think it should be the next step after this series
> -Original Message-
> From: Eric Auger
> Sent: Tuesday, July 8, 2025 10:47 AM
> To: Shameerali Kolothum Thodi
> ; qemu-...@nongnu.org;
> qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; j...@nvidia.com; nicol...@nvidia.com;
> ddut...@redhat.com; berra...@redhat.com; imamm...@redhat
(Forgot to Cc Manos)
On 7/7/25 19:20, Philippe Mathieu-Daudé wrote:
Now than various VirtIO files don't use target specific
API anymore, we can move them to the system_ss[] source
set to build them once.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/virtio/virtio-config-io.c | 1 -
hw/block
On 08/07/2025 15.13, Jared Rossi wrote:
On 7/8/25 8:56 AM, Thomas Huth wrote:
From: Thomas Huth
Since we're linking the network booting code into the main firmware
binary nowadays, we can support the "loadparm" parameter now quite
easily for pxelinux.cfg config files that contain multiple en
From: Yi Liu
When either 'Set Root Table Pointer' or 'Translation Enable' bit is changed,
all pasid bindings on host side become stale and need to be updated.
Introduce a helper function vtd_replay_pasid_bindings_all() to go through all
pasid entries in all passthrough devices to update host sid
From: Thomas Huth
Show a simple boot menu for pxelinux.cfg, too, if the user requested it.
Signed-off-by: Thomas Huth
---
pc-bios/s390-ccw/netmain.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/pc-bios/s390-ccw/netmain.c b/pc-bios/s390-ccw/netmain.c
index 4f7
Add FEAT_SCTLR2, which introduces the SCTLR2_EL1, SCTLR2_EL2, and
SCTLR2_EL3 registers. These registers are extensions of the SCTLR_ELx
ones.
Because the bits in these registers depend on other CPU features, and
only FEAT_MEC is supported at the moment, this commit only implements
the EMEC bits in
PCI device supports two request types, Requests-without-PASID and
Requests-with-PASID. Requests-without-PASID doesn't include a PASID TLP
prefix, IOMMU fetches rid_pasid from context entry and use it as IOMMU's
pasid to index pasid table.
So we need to translate between PCI's pasid and IOMMU's pas
Add PCI device related code in the TYPE_HOTPLUG_HANDLER
implementation.
For a PCI device hotplug/hotunplug event, the code routes to
acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
unplug_cb).
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Camer
We don't generally like DPRINTF debug macros, preferring tracepoints.
In this case the macro is used in only three places (reset, realize,
and in the unlikely event the host kernel doesn't have GICv3 register
access support). These don't seem worth converting to tracepoints,
so simply delete the ma
On 8/7/25 19:39, Richard Henderson wrote:
On 7/8/25 11:19, Philippe Mathieu-Daudé wrote:
-/**
- * target_big_endian:
- * Returns true if the (default) endianness of the target is big endian,
- * false otherwise. Common code should normally never need to know
about the
- * endianness of the targ
These boards ship with a bundled DTB, and dtc will be required for generating
these from device tree sources. Prepare for that by adding an FDT dependency.
Signed-off-by: Bernhard Beschow
---
hw/microblaze/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/microbl
Use the conventional "- If " phrasing, optionally
with ", ".
Signed-off-by: Markus Armbruster
---
qapi/misc-i386.json | 7 +++
qapi/qom.json | 4 ++--
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/qapi/misc-i386.json b/qapi/misc-i386.json
index b53ed39288..24a2e143f6 1
The disassembled DSDT table is given below.
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20210604 (64-bit version)
* Copyright (c) 2000 - 2021 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of ../tests/data/acpi/aarch64/virt/DSDT.acp
From: Gustavo Romero
Soon we will introduce new tests related to ACPI PCI hotplug and
acpi-index that will use a new reference blob:
tests/data/acpi/aarch64/virt/DSDT.acpipcihp
tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex
Signed-off-by: Gustavo Romero
Signed-off-by: Eric Auger
Reviewed-by
On Thu, Jul 03, 2025 at 03:59:33PM +0100, Roy Hopkins wrote:
> Here is v9 of the set of patches to add support for IGVM files to QEMU. This
> is
> based on commit c77283dd5d79149f4e7e9edd00f65416c648ee59 of qemu.
>
> Once again, this is mostly a rebase of the previous patch series. However,
> tha
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/arm/arm-qmp-cmds.c | 3 ++-
target/loongarch/loongarch-qmp-cmds.c | 3 ++-
target/mips/system/mips-qmp-cmds.c| 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/arm-qmp-
Since commit da944885469 ("target/s390x: make helper.c
sysemu-only") target/s390x/helper.c is only built for
system mode, so s390_cpu_halt() and s390_cpu_unhalt()
are never called from user mode.
Fixes: da944885469 ("target/s390x: make helper.c sysemu-only")
Signed-off-by: Philippe Mathieu-Daudé
On Thu, Jul 03, 2025 at 04:58:11PM +0300, Manos Pitsidianakis wrote:
> Date: Thu, 03 Jul 2025 16:58:11 +0300
> From: Manos Pitsidianakis
> Subject: [PATCH 1/3] rust/memory: replace size arg with Bits enum
> X-Mailer: b4 0.14.2
>
> We have the ability to make memory accesses use a typesafe access
Hi Jonathan,
On 7/3/25 4:52 PM, Jonathan Cameron wrote:
> On Thu, 3 Jul 2025 14:35:19 +0200
> Eric Auger wrote:
>
>> Use a specific DSDT.viot reference blob instead of relying on
>> the default DSDT blob. The context has not changed.
I meant s/context/content
> So this is the same as the default
From: Kane-Chen-AS
The has_otpmem attribute is enabled in the SBC subclasses for AST2600
to control the presence of OTP support per SoC type.
Signed-off-by: Kane-Chen-AS
Reviewed-by: C??dric Le Goater
---
hw/arm/aspeed_ast2600.c | 2 +-
hw/misc/aspeed_sbc.c| 2 ++
2 files changed, 3 inser
Now that various VirtIO files don't use target specific
API anymore, we can move them to the system_ss[] source
set to build them once.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Manos Pitsidianakis
---
MST prefers to defer this one to 10.2.
hw/virtio/virtio-config-io.c | 1 -
hw/bloc
Thanks to 72d277a7, 1ed2cb32, and others, EDID (Extended Display
Identification Data) is propagated by QEMU such that a virtual display
presents legitimate metadata (e.g., name, serial number, preferred
resolutions, etc.) to its connected guest.
This change adds the ability to specify the EDID nam
Hi Peter,
On 7/8/25 1:52 PM, Peter Maydell wrote:
> The GICD_TYPER2 register is new for GICv4.1. As an ID register, we
> migrate it so that on the destination the kernel can check that the
> destination supports the same configuration that the source system
> had. This avoids confusing behaviour
On 7/8/25 10:19 AM, Philippe Mathieu-Daudé wrote:
target_endian_mode() returns the default endianness (QAPI type)
of a target.
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/target-info-impl.h | 2 ++
include/qemu/target-info-qapi.h | 8
target-info-stub.c | 1
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/target-info-impl.h | 4 +++-
target-info-stub.c | 1 +
target-info.c | 9 +++--
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/include/qemu/target-info-impl.h
On Tue, Jul 08, 2025 at 09:28:27AM +0200, Markus Armbruster wrote:
> Use imperative mood "Do ..." instead.
>
> Signed-off-by: Markus Armbruster
> ---
> qapi/control.json | 9 +
> qapi/misc-i386.json | 11 +--
> qapi/qom.json | 10 --
> 3 files changed, 14 inserti
On 8/7/25 13:50, Steven Sistare wrote:
On 7/8/2025 3:14 AM, Philippe Mathieu-Daudé wrote:
On 12/5/25 15:47, Steve Sistare wrote:
Define the qom-tree-get QAPI command, which fetches an entire tree of
properties and values with a single QAPI call. This is much faster
than using qom-list plus qom
Reviewed-by: Pierrick Bouvier
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/tswap.h | 13 +
include/qemu/target-info.h | 8
cpu-target.c | 7 ---
hw/core/cpu-system.c | 2 +-
hw/display/vga.c | 2 +-
hw/virtio/virtio.c
On 7/8/25 11:19, Philippe Mathieu-Daudé wrote:
-/**
- * target_big_endian:
- * Returns true if the (default) endianness of the target is big endian,
- * false otherwise. Common code should normally never need to know about the
- * endianness of the target, so please do *not* use this function unl
This commit introduces a new video subsystem to QEMU. It provides
the foundation for emulated video devices with support for multiple
host backends.
The first supported backend is video4linux (v4l2), allowing video
devices such as /dev/video0 to be exposed to guest operating systems
via emulated U
We have the ability to make memory accesses use a typesafe access width
type in Rust, which the C API currently lacks as it does not use a
newtype wrapper for specifying the amount of bytes a memory access has;
it uses a plain 32-bit integer value instead.
I find this both verbose and (ok, that'
target_endian_mode() returns the default endianness (QAPI type)
of a target.
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/target-info-impl.h | 2 ++
include/qemu/target-info-qapi.h | 8
target-info-stub.c | 1 +
target-info.c | 5 +
4 files c
Coverity reported:
CID 1611805: Uninitialized variables
in vfio_user_dma_map(). This can occur in the happy path when
->async_ops was not set; as this doesn't typically happen, it wasn't
caught during testing.
Align both map and unmap implementations to initialize ret the same way
to res
From: Kane-Chen-AS
This patch introduces a 'drive' property to the Aspeed OTP device,
allowing it to be backed by a block device. Users can now preload
OTP data via QEMU CLI using a block backend.
Example usage:
./qemu-system-arm \
-blockdev driver=file,filename=otpmem.img,node-name=otp \
On 7/8/25 10:19 AM, Philippe Mathieu-Daudé wrote:
Restrict "exec/tswap.h" to the tswap*() methods,
move the load/store helpers with the other ones
declared in "qemu/bswap.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/tswap.h | 70 --
inclu
Markus Armbruster (2):
qapi: Clean up "This command will do ..." command descriptions
qapi: Clean up a few Errors: sections
qapi/control.json | 9 +
qapi/misc-i386.json | 18 --
qapi/qom.json | 14 ++
3 files changed, 19 insertions(+), 22 deletions
Hi Richard,
Thanks a lot for the reviews!
On 7/4/25 19:56, Richard Henderson wrote:
On 7/4/25 09:14, Gustavo Romero wrote:
Advertise FEAT_MEC in AA64MMFR3 ID register for the Arm64 cpu max as a
first step to fully support FEAT_MEC.
The FEAT_MEC is an extension to FEAT_RME that implements mult
Simplify a bit the big "s390x-internal.h" header by extracting
system-specific declarations to "s390x-system.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/s390x-internal.h | 222 +-
target/s390x/s390x-system.h | 215
When supervisor CSRs are accessed from VU-mode, a virtual instruction
exception should be raised instead of an illegal instruction.
Fixes: c1fbcecb3a (target/riscv: Fix csr number based privilege checking)
Signed-off-by: Xu Lu
---
target/riscv/csr.c | 2 +-
1 file changed, 1 insertion(+), 1 dele
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