[PATCH 09/10] gitlab: Enable CI for wasm build

2025-04-07 Thread Kohei Tokunaga
Add GitLab CI job that builds QEMU using emscripten. The build runs in the added Dockerfile that contains dependencies (glib, libffi, pixman, zlib) compiled by emscripten. Signed-off-by: Kohei Tokunaga --- .gitlab-ci.d/buildtest-template.yml | 27 .gitlab-ci.d/buildtest.yml

Re: [PATCH 06/13] hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC

2025-04-07 Thread Cédric Le Goater
On 3/13/25 06:40, Steven Lee wrote: The AST2700 SSP (Secondary Service Processor) is a Cortex-M4 coprocessor. This patch adds support for A1 SSP with the following updates: - Defined IRQ maps for AST27x0 A1 SSP SoC - Implemented initialization functions The IRQ mapping is similar to AST2700 CA3

Re: [PATCH v2 1/2] qapi: synchronize jobs and block-jobs documentation

2025-04-07 Thread Eric Blake
On Fri, Apr 04, 2025 at 10:31:53PM +0300, Vladimir Sementsov-Ogievskiy wrote: > Actualize documentation and synchronize it for commands which actually > call the same functions internally. > > Signed-off-by: Vladimir Sementsov-Ogievskiy > --- > qapi/block-core.json | 59 +

Re: [PATCH 00/16] Add Multi-Core Debug (MCD) API support

2025-04-07 Thread Markus Armbruster
Mario Fleischmann writes: > This patch series introduces support for the Multi-Core Debug (MCD) API, a > commonly used debug interface by emulators. The MCD API, defined through a > header file, consists of 54 functions for implementing debug and trace. > However, since it is a header-file-only i

[PATCH v2 4/5] target/hexagon: s/pkt_has_store/pkt_has_scalar_store

2025-04-07 Thread Brian Cain
From: Brian Cain To remove any confusion with HVX or other potential store instructions, we'll qualify this context var with "scalar". Signed-off-by: Brian Cain --- target/hexagon/idef-parser/README.rst | 2 +- target/hexagon/insn.h | 4 ++-- target/hexagon/macros.h

[PATCH v2 1/5] target/hexagon: handle .new values

2025-04-07 Thread Brian Cain
From: Brian Cain Signed-off-by: Brian Cain --- target/hexagon/hex_common.py | 22 +- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index 758e5fd12d..6803908718 100755 --- a/target/hexagon/hex_common

[PATCH v2 3/5] target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof

2025-04-07 Thread Brian Cain
From: Brian Cain Signed-off-by: Brian Cain --- target/hexagon/hex_common.py | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index 6803908718..a2dcb0aa2e 100755 --- a/target/hexagon/hex_common.py +++ b/target/

[PATCH v2 5/5] target/hexagon: Remove unreachable

2025-04-07 Thread Brian Cain
From: Brian Cain We should raise an exception in the event that we encounter a packet that can't be correctly decoded, not fault. Signed-off-by: Brian Cain --- target/hexagon/decode.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/hexagon/decode.c b/target/hexa

Re: [PATCH v6] hw/misc/vmfwupdate: Introduce hypervisor fw-cfg interface support

2025-04-07 Thread Dionna Amalie Glaze
On Wed, Mar 26, 2025 at 2:53 PM Gerd Hoffman wrote: > > Hi, > > > > >2) The security posture of the system may be different between 2 > > > > validly > > > > signed images. Think of Daniel's example of verbose kernel output. > > > > Maybe I > > > > consider verbose kernel output already in

[PATCH 1/2] rust/hw/char/pl011: Extract extract DR read logic into separate function

2025-04-07 Thread Rakesh Jeyasingh
- Split `read()` DR case into `read_data_register()` Signed-off-by: Rakesh Jeyasingh --- rust/hw/char/pl011/src/device.rs | 39 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs ind

Re: [PATCH v3 0/5] misc hexagon patches

2025-04-07 Thread Matheus Tavares Bernardino
On Mon, 7 Apr 2025 12:27:00 -0700 Brian Cain wrote: > > Brian Cain (5): > target/hexagon: handle .new values > target/hexagon: Fix badva reference, delete CAUSE > target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof > target/hexagon: s/pkt_has_store/pkt_has_scalar_store > t

[PATCH v3 1/5] target/hexagon: handle .new values

2025-04-07 Thread Brian Cain
Signed-off-by: Brian Cain --- target/hexagon/hex_common.py | 22 +- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index 758e5fd12d..6803908718 100755 --- a/target/hexagon/hex_common.py +++ b/target/he

Re: [PATCH v2 03/12] target/riscv: Add vext_check_input_eew to check mismatched input EEWs encoding constraint

2025-04-07 Thread Max Chou
On 2025/4/5 5:09 PM, Daniel Henrique Barboza wrote: On 3/29/25 11:44 AM, Max Chou wrote: According to the v spec, a vector register cannot be used to provide source operands with more than one EEW for a single instruction. Signed-off-by: Max Chou ---   target/riscv/insn_trans/trans_rvv.c.in

Re: [PATCH for-10.1 v2 31/37] vfio: Rename vfio_get_dirty_bitmap()

2025-04-07 Thread Cédric Le Goater
On 3/27/25 10:39, John Levon wrote: On Wed, Mar 26, 2025 at 08:51:16AM +0100, Cédric Le Goater wrote: vfio_container_query_dirty_bitmap() is consistent the VFIO container routine naming scheme and is now free to use. "consistent with" ? "consistent" was intended. I rephrased to : "Rename t

Re: [PATCH for-10.1 v2 31/37] vfio: Rename vfio_get_dirty_bitmap()

2025-04-07 Thread Cédric Le Goater
On 4/2/25 15:36, Avihai Horon wrote: On 26/03/2025 9:51, Cédric Le Goater wrote: External email: Use caution opening links or attachments vfio_container_query_dirty_bitmap() is consistent the VFIO container routine naming scheme and is now free to use. Signed-off-by: Cédric Le Goater Revi

Re: [PATCH for-10.1 v2 33/37] vfio: Rename RAM discard related services

2025-04-07 Thread Cédric Le Goater
On 4/2/25 15:55, Avihai Horon wrote: On 26/03/2025 9:51, Cédric Le Goater wrote: External email: Use caution opening links or attachments Rename some routines to better reflect the namespace they belong to. Signed-off-by: Cédric Le Goater Reviewed-by: Avihai Horon Since lore didn't r

Re: [PATCH v2 04/12] target/riscv: rvv: Apply vext_check_input_eew to vector register gather instructions

2025-04-07 Thread Max Chou
On 2025/4/5 5:14 PM, Daniel Henrique Barboza wrote: On 3/29/25 11:44 AM, Max Chou wrote: Handle the overlap of source registers with different EEWs. The vs1 EEW of vrgatherei16.vv is 16. Co-authored-by: Anton Blanchard Co-authored-by: Max Chou Since you're marked as Author you don't need

Re: [PATCH v2 05/12] target/riscv: rvv: Apply vext_check_input_eew to OPIVI/OPIVX/OPFVF(vext_check_ss) instructions

2025-04-07 Thread Max Chou
On 2025/4/5 5:17 PM, Daniel Henrique Barboza wrote: On 3/29/25 11:44 AM, Max Chou wrote: Handle the overlap of source registers with different EEWs. Co-authored-by: Anton Blanchard Co-authored-by: Max Chou Signed-off-by: Max Chou ---   target/riscv/insn_trans/trans_rvv.c.inc | 4 +++-   1 f

Re: [PATCH for-10.1 v2 35/37] vfio: Rename vfio-common.h to vfio-device.h

2025-04-07 Thread Cédric Le Goater
On 3/27/25 10:54, John Levon wrote: On Wed, Mar 26, 2025 at 08:51:20AM +0100, Cédric Le Goater wrote: "hw/vfio/vfio-common.h" has been emptied of most of its declarations by the previous changes and the only declarations left are related to VFIODevice. Rename it to "hw/vfio/vfio-device.h" and m

Re: [PATCH-for-10.1 v3 5/9] qtest/bios-tables-test: Add test for -M virt,its=off

2025-04-07 Thread Eric Auger
On 4/4/25 5:00 AM, Gustavo Romero wrote: > Hi Phil, > > On 4/3/25 17:40, Philippe Mathieu-Daudé wrote: >> Add the use case reported as issue #2886 [*]. The test >> passes while it shouldn't. We are going to fix that in >> the following commits. > > I think this organization is not ideal. I like

[PATCH 1/2] vfio/spapr: Enhance error handling in vfio_spapr_create_window()

2025-04-07 Thread Amit Machhiwal
Introduce an Error ** parameter to vfio_spapr_create_window() to enable structured error reporting. This allows the function to propagate detailed errors back to callers. Suggested-by: Cédric Le Goater Signed-off-by: Amit Machhiwal --- hw/vfio/spapr.c | 23 --- 1 file change

[PATCH v2 2/2] vfio/spapr: Fix L2 crash with PCI device passthrough with L2 guest memory > 128G

2025-04-07 Thread Amit Machhiwal
An L2 KVM guest fails to boot inside a pSeries LPAR when booted with a memory more than 128 GB and PCI device passthrough. The L2 guest also crashes when it is booted with a memory greater than 128 GB and a PCI device is hotplugged later. The issue arises from a conditional check for `levels > 1`

Re: [PATCH for-10.1 v2 03/37] vfio: Introduce a new header file for external migration services

2025-04-07 Thread Cédric Le Goater
On 3/31/25 14:07, Avihai Horon wrote: On 26/03/2025 9:50, Cédric Le Goater wrote: External email: Use caution opening links or attachments The migration core subsystem makes use of the VFIO migration API to collect statistics on the number of bytes transferred. These services are declared in

Re: [PATCH] migration: add FEATURE_SEEKABLE to QIOChannelBlock

2025-04-07 Thread Marco Cavenati
Hello, On Monday, April 07, 2025 08:47 CEST, Prasad Pandit wrote: > * If seeking is managed internally by pread(2)/pwrite(2) and co. > functions, then that is independent of the > 'QIO_CHANNEL_FEATURE_SEEKABLE' flag; This flag is QEMU specific, it is > not available outside of QEMU/io/ system. p

[PATCH v2 1/2] target/riscv: Add BOSC's Xiangshan Kunminghu CPU

2025-04-07 Thread Huang Borong
Add a CPU entry for the Xiangshan Kunminghu CPU, an open-source, high-performance RISC-V processor. More details can be found at: https://github.com/OpenXiangShan/XiangShan Note: The ISA extensions supported by the Xiangshan Kunminghu CPU are categorized based on four RISC-V specifications: Volume

Re: [PATCH 1/2] vfio/spapr: Enhance error handling in vfio_spapr_create_window()

2025-04-07 Thread Amit Machhiwal
Please ignore this patchset as I missed to add version information in it. I'll resend these patches shortly. Sorry for the noise. Thanks, Amit On 2025/04/07 07:53 PM, Amit Machhiwal wrote: > Introduce an Error ** parameter to vfio_spapr_create_window() to enable > structured error reporting. This

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