On Mon, Mar 24, 2025 at 04:05:09PM +0800, saz97 wrote:
> This patch series refactors QEMU's FUSE export module to leverage coroutines
> for read/write operations,
> addressing concurrency limitations and aligning with QEMU's asynchronous I/O
> model. The changes
> demonstrate measurable performan
On 24/03/2025 14:33, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
VFIO uses migration_file_set_error() in a couple of places where an
'Error **' parameter is not provided. In MemoryListener handlers :
vfio_listener_region_add
vfio_listener_log_global
On 3/5/25 13:38, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
docs/devel/build-environment.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/devel/build-environment.rst b/docs/devel/build-environment.rst
index f133ef2e012..661f6ea8504 100644
--- a
On Mon, Mar 24, 2025 at 05:31:30PM +0100, Alexander Graf wrote:
>
> > > > > What does all this mean for the hypervisor interface ?
> > > > That means we'll go scratch the region list idea and depend on igvm
> > > > instead.
> > > > Which means we are back to the single firmware image.
> > > So i
On 3/24/25 03:21, Alex Bennée wrote:
+#ifdef TARGET_BIG_ENDIAN
+MemOp end = MO_BE;
+#else
+MemOp end = MO_LE;
+#endif
+#endif
That's what MO_TE is for.
+/*
+ * Helpers copied from helpers.h just for handling target_ulong values
+ * from gdbstub's GByteArray based on what t
On 24/3/25 07:05, Thomas Huth wrote:
On 23/03/2025 16.30, Philippe Mathieu-Daudé wrote:
Fixes: 41868f846d2 ("s390x/cpumodel: "host" and "qemu" as CPU
subclasses")
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
On 3/21/25 11:15, Philippe Mathieu-Daudé wrote:
Use TCGCPUOps::guest_default_memory_order to set TCGContext::guest_mo.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/translate-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg
On Mon, Mar 24, 2025 at 06:53:59PM +0100, Gerd Hoffman wrote:
> On Mon, Mar 24, 2025 at 05:31:30PM +0100, Alexander Graf wrote:
> >
> > > > > > What does all this mean for the hypervisor interface ?
>
> > > > > That means we'll go scratch the region list idea and depend on igvm
> > > > > instead.
On 24/3/25 19:59, Pierrick Bouvier wrote:
On 3/24/25 11:46, Philippe Mathieu-Daudé wrote:
Since v1 (Thomas review comments)
- Move s390_set_qemu_cpu_model/s390_cpu_list to "cpu_models.h"
- Correct 'target/s390x: Register CPUClass:list_cpus' subject
'cpu_list' might be defined per target, and fo
On 3/24/25 03:21, Alex Bennée wrote:
The current helper.h functions rely on hard coded assumptions about
target endianess to use the tswap macros. We also end up double
swapping a bunch of values if the target can run in multiple endianess
modes. Avoid this by getting the target to pass the endia
Some targets define cpu_list to a method listing their
CPUs on stdout. In order to make list_cpus() generic,
introduce the CPUClass::list_cpus() callback.
When no callback is registered, list_cpus() defaults
to the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Hut
On 3/24/25 11:46, Philippe Mathieu-Daudé wrote:
Both s390_cpu_list() and s390_set_qemu_cpu_model() are
defined in cpu_models.c, move their declarations in the
related "cpu_models.h" header. Use full path to header
in s390-virtio-ccw.c file.
Suggested-by: Thomas Huth
Signed-off-by: Philippe Math
On 3/24/25 11:46, Philippe Mathieu-Daudé wrote:
Since v1 (Thomas review comments)
- Move s390_set_qemu_cpu_model/s390_cpu_list to "cpu_models.h"
- Correct 'target/s390x: Register CPUClass:list_cpus' subject
'cpu_list' might be defined per target, and force code to be
built per-target. We can avo
Register s390_cpu_list() as CPUClass:list_cpus callback
and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.h | 3 ---
target/s390x/cpu.c | 1 +
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index
Since we removed all definitions of cpu_list, the #ifdef
check is always true. Remove it, inlining cpu_list().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
---
cpu-target.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(
Some targets define cpu_list to a method listing their
CPUs on stdout. In order to make list_cpus() generic,
introduce the CPUClass::list_cpus() callback.
When no callback is registered, list_cpus() defaults
to the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Hut
Register sparc_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
target/sparc/cpu.h | 3 ---
target/sparc/cpu.c | 3 ++-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git
Register s390_cpu_list() as CPUClass:list_cpus callback
and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 8449bfee5a9..2876f2c4eb3 100644
--- a/target/
Since we removed all definitions of cpu_list, the #ifdef
check is always true. Remove it, inlining cpu_list().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
cpu-target.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/cpu-target.c b/
Register x86_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
target/i386/cpu.h | 3 ---
target/i386/cpu.c | 3 ++-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/ta
Both s390_cpu_list() and s390_set_qemu_cpu_model() are
defined in cpu_models.c, move their declarations in the
related "cpu_models.h" header. Use full path to header
in s390-virtio-ccw.c file.
Suggested-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.h | 4 ---
> -Original Message-
> From: Brian Cain
> Sent: Saturday, March 1, 2025 11:21 AM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsimp
On 3/22/25 13:55, Richard Henderson wrote:
On 3/21/25 17:20, Pierrick Bouvier wrote:
On 3/21/25 17:01, Pierrick Bouvier wrote:
On 3/21/25 15:19, Richard Henderson wrote:
On 3/21/25 13:11, Pierrick Bouvier wrote:
On 3/21/25 12:27, Richard Henderson wrote:
On 3/21/25 11:09, Pierrick Bouvier wr
On 3/24/25 10:56 AM, Eric Auger wrote:
On 3/21/25 1:59 AM, Donald Dutile wrote:
On 3/19/25 2:21 PM, Eric Auger wrote:
Hi Don,
On 3/19/25 5:21 PM, Donald Dutile wrote:
On 3/19/25 5:26 AM, Shameerali Kolothum Thodi wrote:
Hi Don,
Hey!
-Original Message-
From: Donald Dutil
On 3/24/25 14:31, Pierrick Bouvier wrote:
On 3/23/25 12:48, Richard Henderson wrote:
On 3/20/25 15:29, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
hw/arm/armv7m.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv
Hi,
I had a few queries here.
On 3/24/25 7:29 PM, Sahil Siddiq wrote:
Implement the insertion of available buffers in the descriptor area of
packed shadow virtqueues. It takes into account descriptor chains, but
does not consider indirect descriptors.
Enable the packed SVQ to forward the descr
On Thu, Mar 20, 2025 at 08:21:25PM +0800, Haoqian He wrote:
2025年3月19日 23:11，Stefano Garzarella 写道：
On Fri, Mar 14, 2025 at 06:15:33AM -0400, Haoqian He wrote:
The backend maybe crash when vhost_dev_stop and GET_VRING_BASE
would fail, we can return failure to indicate the connection
with the
On 3/21/25 1:54 AM, Donald Dutile wrote:
>
>
> On 3/19/25 1:04 PM, Eric Auger wrote:
>>
>>
>>
>> On 3/18/25 10:22 PM, Donald Dutile wrote:
>>>
>>>
>>> On 3/18/25 3:13 PM, Nicolin Chen wrote:
On Tue, Mar 18, 2025 at 07:31:36PM +0100, Eric Auger wrote:
> On 3/17/25 9:19 PM, Nicolin Chen w
QE tested this patch with virtio-net regression tests, everything works fine.
Tested-by: Lei Yang
On Sat, Mar 22, 2025 at 2:48 PM Akihiko Odaki wrote:
>
> virtio-net uses the max_tx_vq field of struct virtio_net_rss_config to
> determine the number of queue pairs and emits an error message sayi
On 3/21/25 1:59 AM, Donald Dutile wrote:
>
>
> On 3/19/25 2:21 PM, Eric Auger wrote:
>> Hi Don,
>>
>>
>> On 3/19/25 5:21 PM, Donald Dutile wrote:
>>>
>>>
>>> On 3/19/25 5:26 AM, Shameerali Kolothum Thodi wrote:
Hi Don,
>>> Hey!
>>>
> -Original Message-
> From: Donald Du
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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On Fri, Mar 21, 2025 at 03:09:16PM +0800, zoudongjie wrote:
> From: Zhu Yangyang
>
> The bdrv_drained_begin() function is a blocking function. In scenarios where
> network storage
> is used and network links fail, it may block for a long time.
> Therefore, we add a timeout parameter to control t
Register ppc_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
target/ppc/cpu.h | 4
target/ppc/cpu_init.c | 3 ++-
2 files changed, 2 insertions(+), 5 deletions(-)
diff -
On 3/24/25 03:21, Alex Bennée wrote:
The aim of this work is to get rid of the endian aware helpers in
gdbstub/helpers.h which due to their use of tswap() mean target
gdbstubs need to be built multiple times. While this series doesn't
actually build each stub once it introduces a new helper -
gdb
On 3/24/25 03:21, Alex Bennée wrote:
It's not used outside of the gdbstub code.
Reviewed-by: Pierrick Bouvier
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
---
target/ppc/cpu.h | 1 -
target/ppc/gdbstub.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff -
On 3/24/25 03:21, Alex Bennée wrote:
This is a pretty simple conversion given a single set of registers and
an existing helper to probe endianess.
Signed-off-by: Alex Bennée
---
v2
- use mb_cpu_is_big_endian
- use explicit MO_32 size
- handle differing size of env->ear between user/sy
> -Original Message-
> From: Brian Cain
> Sent: Saturday, March 1, 2025 11:21 AM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsimp
On Mon, Mar 24, 2025 at 10:06 PM Marc-André Lureau
wrote:
>
> Hi
>
> On Mon, Mar 24, 2025 at 5:20 PM Qiang Yu wrote:
> >
> > On Mon, Mar 24, 2025 at 6:04 PM Marc-André Lureau
> > wrote:
> > >
> > > Hi
> > >
> > > On Mon, Mar 24, 2025 at 12:19 PM wrote:
> > > >
> > > > From: Qiang Yu
> > > >
>
On 24/3/25 20:02, Richard Henderson wrote:
On 3/24/25 11:58, Philippe Mathieu-Daudé wrote:
Register s390_cpu_list() as CPUClass:list_cpus callback
and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.h | 3 ---
target/s390x/cpu.c | 1 +
2 files cha
On 3/24/25 03:21, Alex Bennée wrote:
We can handle larger sized memops now, expand the range of the assert.
Fixes: 4b473e0c60 (tcg: Expand MO_SIZE to 3 bits)
Signed-off-by: Alex Bennée
---
v2
- instead of 128 use 1 << MO_SIZE for future proofing
---
include/exec/memop.h | 4 ++--
1 file
Since v1 (Thomas review comments)
- Move s390_set_qemu_cpu_model/s390_cpu_list to "cpu_models.h"
- Correct 'target/s390x: Register CPUClass:list_cpus' subject
'cpu_list' might be defined per target, and force code to be
built per-target. We can avoid that by introducing a CPUClass
callback.
This
Both s390_cpu_list() and s390_set_qemu_cpu_model() are
defined in cpu_models.c, move their declarations in the
related "cpu_models.h" header. Use full path to header
in s390-virtio-ccw.c file.
Suggested-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu.h | 4 ---
On 3/24/25 03:21, Alex Bennée wrote:
When things go wrong we want to assert on the register that failed to
be able to figure out what went wrong.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
---
gdbstub/gdbstub.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On 3/24/25 03:21, Alex Bennée wrote:
Reviewed-by: Pierrick Bouvier
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
---
include/gdbstub/commands.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/gdbstub/commands.h b/include/gdbstub/commands.h
index
On 3/24/25 03:21, Alex Bennée wrote:
Mainly as an aid to myself getting confused too many bswaps deep into
the code.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Alex Bennée
---
target/ppc/cpu.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/ppc/cpu.h b/tar
> -Original Message-
> From: Brian Cain
> Sent: Saturday, March 1, 2025 11:21 AM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsimp
On 3/24/25 13:04, Richard Henderson wrote:
On 3/24/25 12:29, Pierrick Bouvier wrote:
On 3/24/25 10:39, Richard Henderson wrote:
On 3/24/25 03:21, Alex Bennée wrote:
+ #ifdef TARGET_BIG_ENDIAN
+ MemOp end = MO_BE;
+ #else
+ MemOp end = MO_LE;
+ #endif
+#endif
That's what MO_TE
Hi Michael,
Gentile ping.
Regards,
Mauro
Em Fri, 7 Mar 2025 20:14:29 +0100
Mauro Carvalho Chehab escreveu:
> Hi Michael,
>
> I'm sending v8 to avoid a merge conflict with v7 due to this
> changeset:
>
>611f3bdb20f7 ("hw/acpi/ghes: Make static")
>
> As ghes_record_cper_errors() was wri
> -Original Message-
> From: Anton Johansson
> Sent: Wednesday, March 12, 2025 2:46 PM
> To: qemu-devel@nongnu.org
> Cc: a...@rev.ng; ltaylorsimp...@gmail.com; brian.c...@oss.qualcomm.com;
> phi...@linaro.org
> Subject: [PATCH 2/2] target/hexagon: Drop `ident` postprocess step
>
> The
Currently, the QEMU-emulated AMD IOMMU device use PCI vendor id 0x1022
(AMD) with device id zero (undefined). Eventhough this does not cause any
functional issue for AMD IOMMU driver since it normally uses information
in the ACPI IVRS table to probe and initialize the device per
recommendation in t
Markus,
Thanks for your reviewing and guidance.
Regards
Bibo Mao
On 2025/3/24 下午2:05, Markus Armbruster wrote:
Bibo Mao writes:
In function virt_cpu_plug(), Object cpuslot::cpu is set at last
only when there is no any error, otherwise it is problematic that
cpuslot::cpu is set in advance ho
On 3/24/2025 8:53 PM, ltaylorsimp...@gmail.com wrote:
-Original Message-
From: Anton Johansson
Sent: Wednesday, March 12, 2025 2:46 PM
To: qemu-devel@nongnu.org
Cc: a...@rev.ng; ltaylorsimp...@gmail.com; brian.c...@oss.qualcomm.com;
phi...@linaro.org
Subject: [PATCH 2/2] target/hexag
According to PAPR:
R1–7.3.30–3. When the platform receives an ibm,os-term RTAS call, or
on a system reset without an ibm,nmi-interlock RTAS call, if the
platform has a dump structure registered through the
ibm,configure-kernel-dump call, the platform must process each
registere
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index eb029b65552..4a2cac1252d 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -19,7 +19,6 @@
#ifndef CPU_ALL_H
#defi
On 3/24/25 10:29, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
On 24/3/25 11:21, Alex Bennée wrote:
We've not yet deprecated but we should steer users away from these
helpers if they want to be in a single/heterogeneous binary.
Why not deprecate?
I guess philosophically do we expect
On 3/24/25 03:21, Alex Bennée wrote:
The current helper.h functions rely on hard coded assumptions about
target endianess to use the tswap macros. We also end up double
swapping a bunch of values if the target can run in multiple endianess
modes. Avoid this by getting the target to pass the endia
On 3/24/25 10:29, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
On 24/3/25 11:21, Alex Bennée wrote:
We've not yet deprecated but we should steer users away from these
helpers if they want to be in a single/heterogeneous binary.
Why not deprecate?
I guess philosophically do we expect
On 3/24/25 03:21, Alex Bennée wrote:
The current helper.h functions rely on hard coded assumptions about
target endianess to use the tswap macros. We also end up double
swapping a bunch of values if the target can run in multiple endianess
modes. Avoid this by getting the target to pass the endia
On 3/24/25 12:29, Pierrick Bouvier wrote:
On 3/24/25 10:39, Richard Henderson wrote:
On 3/24/25 03:21, Alex Bennée wrote:
+ #ifdef TARGET_BIG_ENDIAN
+ MemOp end = MO_BE;
+ #else
+ MemOp end = MO_LE;
+ #endif
+#endif
That's what MO_TE is for.
+/*
+ * Helpers copied from helper
On 3/24/25 03:21, Alex Bennée wrote:
For some of the helpers we need a temporary variable to copy from
although we could add some helpers to return pointers into env in
those cases if we wanted to.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Alex Bennée
---
v2
- use new wrappers
- expl
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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On 3/23/25 12:58, Richard Henderson wrote:
On 3/20/25 15:29, Pierrick Bouvier wrote:
Those files will be compiled once per base architecture ("arm" in this
case), instead of being compiled for every variant/bitness of
architecture.
We make sure to not include target cpu definitions (exec/cpu-de
Cc'ing Stefan and Yonggang
On 5/3/25 22:38, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
docs/devel/build-environment.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/devel/build-environment.rst b/docs/devel/build-environment.rst
index f133ef2e0
On 3/23/25 10:37, Richard Henderson wrote:
The comment about not being able to define a field with
zero bits is out of date since 94597b6146f3
("decodetree: Allow !function with no input bits").
This fixes the missing load of imm in the disassembler.
Cc: qemu-sta...@nongnu.org
Fixes: 9d8caa67a2
On 3/23/25 10:37, Richard Henderson wrote:
This define isn't really used.
Signed-off-by: Richard Henderson
---
target/avr/cpu.h| 2 --
target/avr/helper.c | 3 +--
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 06f5ae4d1b..84a8f5c
Hi,
Any other concerns for this series?
Thanks
Suravee
On 3/4/2025 9:17 PM, Suravee Suthikulpanit wrote:
Currently, amd-iommu device does not support migration. This series addresses
an issue due hidden AMDVI-PCI device enumeration. Then introduces migratable
VMStateDescription, which saves ne
I noticed that analyze_packet is marking the implicit pred reads after
marking all the writes. However, the semantics of the instrucion and
packet are to do all the reads, then do the operation, then do all the
writes.
Here is the old code
static void analyze_packet(DisasContext *ctx)
{
Packe
24.03.2025 23:46, Cédric Le Goater wrote:
Is there anything in there worth to pick up for stable series?
you are fast !
I was just about to send final announcements for a bunch of next
stable releases, and noticed another pull request has been merged.. :)
- "aspeed: Fix maximum number of
On 3/23/25 10:37, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
target/avr/cpu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index e4011004b4..538fcbc215 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -
On 3/23/25 10:37, Richard Henderson wrote:
Match the prototype of cpu_memory_rw_debug().
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h | 2 +-
target/sparc/cpu.h| 2 +-
target/sparc/mmu_helper.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
On Mon, Mar 24, 2025 at 9:45 PM Marc-André Lureau
wrote:
>
> Hi
>
> On Mon, Mar 24, 2025 at 5:27 PM Qiang Yu wrote:
> >
> > On Mon, Mar 24, 2025 at 6:09 PM Marc-André Lureau
> > wrote:
> > >
> > > Hi
> > >
> > > On Mon, Mar 24, 2025 at 12:19 PM wrote:
> > > >
> > > > From: Qiang Yu
> > > >
> >
The following macros:
- qemu_put_betl()
- qemu_get_betl()
- qemu_put_betls()
- qemu_get_betls()
- qemu_put_sbetl()
- qemu_get_sbetl()
- qemu_put_sbetls()
- qemu_get_sbetls()
are used twice. Expand tl -> 32/64 and remove them.
Philippe Mathieu-Daudé (3):
target/mips: Inline qemu_get_bet
On Mon, Mar 24, 2025 at 03:56:12PM +0100, Eric Auger wrote:
>
>
> On 3/21/25 1:59 AM, Donald Dutile wrote:
> >
> >
> > On 3/19/25 2:21 PM, Eric Auger wrote:
> >> Hi Don,
> >>
> >>
> >> On 3/19/25 5:21 PM, Donald Dutile wrote:
> >>>
> >>>
> >>> On 3/19/25 5:26 AM, Shameerali Kolothum Thodi wrote:
On 24.03.25 16:48, Gerd Hoffman wrote:
On Mon, Mar 24, 2025 at 04:42:28PM +0530, Ani Sinha wrote:
On Mon, Mar 24, 2025 at 1:13 PM Gerd Hoffman wrote:
Hi,
Going ship the distro kernel as igvm image would work too. Will
simplify the measurement pre-calculation. Also there is no need to
On 24/3/25 10:30, Thomas Huth wrote:
On 23/03/2025 23.40, Philippe Mathieu-Daudé wrote:
Register sparc_cpu_list() as CPUClass:list_cpus callback
and remove the cpu_list definition.
Copy-n-paste error in both, subject and patch description: This should
be about s390x, not sparc.
Oh oops.
d
On 24/3/25 11:21, Alex Bennée wrote:
We can handle larger sized memops now, expand the range of the assert.
Fixes: 4b473e0c60 (tcg: Expand MO_SIZE to 3 bits)
Signed-off-by: Alex Bennée
---
v2
- instead of 128 use 1 << MO_SIZE for future proofing
---
include/exec/memop.h | 4 ++--
1 file
On 24/03/2025 17:25, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
On 3/24/25 16:14, Avihai Horon wrote:
On 24/03/2025 14:33, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
VFIO uses migration_file_set_error() in a coup
Hi
On Mon, Mar 24, 2025 at 5:27 PM Qiang Yu wrote:
>
> On Mon, Mar 24, 2025 at 6:09 PM Marc-André Lureau
> wrote:
> >
> > Hi
> >
> > On Mon, Mar 24, 2025 at 12:19 PM wrote:
> > >
> > > From: Qiang Yu
> > >
> > > It's used already, just check it explicitly.
> > >
> > > Signed-off-by: Qiang Yu
On Mon, Mar 24, 2025 at 5:35 PM Qiang Yu wrote:
>
> On Mon, Mar 24, 2025 at 5:30 PM Marc-André Lureau
> wrote:
> >
> > Hi
> >
> > On Mon, Mar 24, 2025 at 12:20 PM wrote:
> > >
> > > From: Qiang Yu
> > >
> > > Signed-off-by: Qiang Yu
> > > ---
> > > meson.build| 2 +-
> > > ui/spice-d
On Mon, Mar 24, 2025 at 01:34:50PM +0100, Thomas Huth wrote:
> From: Thomas Huth
>
> A bunch of tests are using "-netdev user" but fail to check
> for the availability of SLIRP in the binary, so these tests
> fail if QEMU has been configured with "--disable-slirp"
> (most of the tests are disable
On Thu, Mar 20, 2025 at 08:21:30PM +0800, Haoqian He wrote:
2025年3月19日 23:20，Stefano Garzarella 写道：
On Fri, Mar 14, 2025 at 06:15:34AM -0400, Haoqian He wrote:
Live migration should be terminated if the backend crashes before
the migration completes.
Since the vhost device will be stopped
On 3/24/25 16:14, Avihai Horon wrote:
On 24/03/2025 14:33, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
VFIO uses migration_file_set_error() in a couple of places where an
'Error **' parameter is not provided. In MemoryListener handlers :
vfio_listener_
On 3/24/25 2:55 PM, Shameerali Kolothum Thodi wrote:
> Hi Eric,
>
>> -Original Message-
>> From: qemu-devel-
>> bounces+shameerali.kolothum.thodi=huawei@nongnu.org > devel-bounces+shameerali.kolothum.thodi=huawei@nongnu.org> On
>> Behalf Of Eric Auger
>> Sent: Monday, March 24, 2
On 3/21/25 08:59, Philippe Mathieu-Daudé wrote:
Multi-threaded TCG only concerns system emulation.
That's not really true. User emulation simply has no option to
run in a single-threaded context.
I really don't think we should allow RV128 in user-mode at all.
Certainly not until there's a ker
On Mon, Mar 24, 2025 at 02:13:20PM +0100, Eric Auger wrote:
> >> If VM has an emulated device and a passthrough device:
> >> attach the emulated device to PCIE.0 <=> vSMMU bypass (or accel=off?)
> >> attach the passthrough device to pxb-pcie <=> vSMMU0 (accel=on)
> > This can be other way around
On Mon, Mar 24, 2025 at 08:19:27AM +, Shameerali Kolothum Thodi wrote:
> > If VM has an emulated device and a passthrough device:
> > attach the emulated device to PCIE.0 <=> vSMMU bypass (or accel=off?)
> > attach the passthrough device to pxb-pcie <=> vSMMU0 (accel=on)
>
> This can be othe
> -Original Message-
> From: ltaylorsimp...@gmail.com
> Sent: Wednesday, March 19, 2025 4:28 PM
> To: 'Brian Cain' ; qemu-devel@nongnu.org
> Cc: richard.hender...@linaro.org; phi...@linaro.org; Matheus Bernardino
> (QUIC) ; a...@rev.ng; a...@rev.ng; Marco
> Liebel (QUIC) ; alex.ben...@li
From: Hyman Huang
For direct use in the upcoming commit, wrap the vdagent
registry logic as vdagent_register_to_qemu_clipboard.
Meanwhile, add a trace event for vdagent_recv_caps.
Signed-off-by: Hyman Huang
---
ui/trace-events | 1 +
ui/vdagent.c| 23 ---
2 files chan
> -Original Message-
> From: Nicolin Chen
> Sent: Monday, March 24, 2025 4:02 PM
> To: Eric Auger
> Cc: Shameerali Kolothum Thodi
> ; Donald Dutile
> ; qemu-...@nongnu.org; qemu-devel@nongnu.org;
> peter.mayd...@linaro.org; j...@nvidia.com; berra...@redhat.com;
> nath...@nvidia.com; mo
Philippe Mathieu-Daudé writes:
> The following macros:
>
> - qemu_put_betl()
> - qemu_get_betl()
> - qemu_put_betls()
> - qemu_get_betls()
> - qemu_put_sbetl()
> - qemu_get_sbetl()
> - qemu_put_sbetls()
> - qemu_get_sbetls()
>
> are not used in the whole code base, remove them.
>
> Signed
On 3/20/25 10:46, John Levon wrote:
On Tue, Mar 18, 2025 at 10:54:07AM +0100, Cédric Le Goater wrote:
File "common.c" has been emptied of most of its definitions by the
previous changes and the only definitions left are related to dirty
tracking. Rename it to "dirty-tracking.c" and introduce it
On Fri, Mar 21, 2025 at 09:22:59AM +0100, Gerd Hoffman wrote:
> On Thu, Mar 20, 2025 at 09:34:26AM +0100, Jörg Rödel wrote:
> > On Tue, Mar 18, 2025 at 12:11:02PM +0100, Gerd Hoffman wrote:
> > > Open questions:
> > >
> > > - Does the idea to use igvm parameters for the kernel hashes makes
> > >
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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CC qemu-stable - this needs cherry-picking into all active stable
branches once accepted.
On Mon, Mar 24, 2025 at 09:12:53AM +, Daniel P. Berrangé wrote:
> On Sun, Mar 23, 2025 at 10:35:54PM +0100, Daan De Meyer wrote:
> > We have to make sure the array of bytes read from the path= file
> > is
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
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Description: PGP signature
Hi Shameer,
On 3/24/25 9:19 AM, Shameerali Kolothum Thodi wrote:
>
>> -Original Message-
>> From: Nicolin Chen
>> Sent: Thursday, March 20, 2025 5:03 PM
>> To: Shameerali Kolothum Thodi
>> Cc: Donald Dutile ; qemu-...@nongnu.org; qemu-
>> de...@nongnu.org; eric.au...@redhat.com; peter.ma
On Mon, Mar 24, 2025 at 6:04 PM Marc-André Lureau
wrote:
>
> Hi
>
> On Mon, Mar 24, 2025 at 12:19 PM wrote:
> >
> > From: Qiang Yu
> >
> > mesa/radeonsi is going to support explicit midifier which
> > may export a multi-plane texture. For example, texture with
> > DCC enabled (a compressed forma
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