Philippe Mathieu-Daudé writes:
> Cc'ing Markus.
>
> On 6/3/25 02:56, Richard Henderson wrote:
>> On 3/5/25 07:39, Philippe Mathieu-Daudé wrote:
>>> +void legacy_binary_info_init(const char *argv0)
>>> +{
>
>
>>> + for (size_t i = 0; i < ARRAY_SIZE(legacy_binary_infos); i++) {
>>> + if (
On 3/20/25 12:52, Pierrick Bouvier wrote:
On 3/19/25 11:22, Alex Bennée wrote:
The aim of this work is to get rid of the endian aware helpers in
gdbstub/helpers.h which due to their use of tswap() mean target
gdbstubs need to be built multiple times. While this series doesn't
actually build each
On Sun, Mar 16, 2025 at 09:52:31PM -0400, Manish Mishra wrote:
> We allocate extra metadata SKBs in case of a zerocopy send. This metadata
> memory is accounted for in the OPTMEM limit. If there is any error while
> sending zerocopy packets or if zerocopy is skipped, these metadata SKBs are
> queue
Am 10. März 2025 11:36:34 UTC schrieb Ilya Chichkov :
>Add PCF8563 a real-time clock with calendar and I2C interface.
>This commit adds support for interfacing with it and implements
>functionality of setting timer, alarm, reading and writing time.
>
>Signed-off-by: Ilya Chichkov
>---
>v1->v2
>
From: YannickV
A dummy DDR controller for ZYNQ has been added. While all registers are present,
not all are functional. Read and write access is validated, and the user mode
can be set. This provides a basic DDR controller initialization, preventing
system hangs due to endless polling or similar
On 20/3/25 14:32, Peter Maydell wrote:
From: Paolo Bonzini
Add a new assertion that is similar to "const { assert!(...) }" but can be used
outside functions and with older versions of Rust. A similar macro is found in
Linux, whereas the "static_assertions" crate has a const_assert macro that
p
The links to riscv iommu specification document are incorrect. This patch
updates all the said link to point to correct location.
Cc: qemu-ri...@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2808
Signed-off-by: hemanshu.khilari.foss
---
docs/specs/riscv-iommu.rst | 6 +++---
Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg",
"trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-off-by: Jamin Lin
---
hw/misc/aspeed_hace.c | 8
hw/misc/trace-events | 6 ++
2 files changed, 14 insertions(+)
diff --git a/hw/misc/aspeed_hac
virtio-net uses the max_tx_vq field of struct virtio_net_rss_config to
determine the number of queue pairs and emits an error message saying
"Can't get queue_pairs". However, the field tells only about tx.
Examine unclassified_queue and indirection_table to determine the number
of queues required
On 2025/3/21 下午4:08, Markus Armbruster wrote:
bibo mao writes:
On 2025/3/21 下午3:21, Markus Armbruster wrote:
bibo mao writes:
+Igor
On 2025/3/21 下午2:47, Markus Armbruster wrote:
Bibo Mao writes:
In function virt_cpu_unplug(), it will send cpu unplug message to
interrupt controller
On 3/21/25 08:59, Philippe Mathieu-Daudé wrote:
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
have each target set the 'mttcg_supported' field in the TCGCPUOps
structure.
Since so far we only emulate one target architecture at a time,
tcg_init_machine() gets whether MTTCG is
The maximum padding size is either 64 or 128 bytes and should always be smaller
than "req_len". If "padding_size" exceeds "req_len", then
"req_len - padding_size" underflows due to "uint32_t" data type, leading to a
large incorrect value (e.g., `0xFFXX`). This causes an out-of-bounds memory
acc
Hi!
I'm the author of Vitastor SDS (https://vitastor.io/). My project is an
opensource SDS with an architecture similar to Ceph, but simpler and faster -
in the terms of latency, it's ~10x faster, it easily reaches 0.1ms T1Q1 latency
with NVMe disks.
I have a custom block driver for qemu (bloc
On 20/3/25 21:16, Pierrick Bouvier wrote:
On 3/20/25 12:52, Pierrick Bouvier wrote:
On 3/19/25 11:22, Alex Bennée wrote:
The aim of this work is to get rid of the endian aware helpers in
gdbstub/helpers.h which due to their use of tswap() mean target
gdbstubs need to be built multiple times. Wh
On 3/21/25 17:20, Pierrick Bouvier wrote:
On 3/21/25 17:01, Pierrick Bouvier wrote:
On 3/21/25 15:19, Richard Henderson wrote:
On 3/21/25 13:11, Pierrick Bouvier wrote:
On 3/21/25 12:27, Richard Henderson wrote:
On 3/21/25 11:09, Pierrick Bouvier wrote:
Mmm, ok I guess. Yesterday I would ha
On 21/3/25 17:10, Heinrich Schuchardt wrote:
On 21.03.25 17:08, Philippe Mathieu-Daudé wrote:
Hi Heinrich,
On 21/3/25 09:12, Heinrich Schuchardt wrote:
Currently resetting leads to resynchronizing the Goldfish RTC with the
system clock of the host. In real hardware an RTC reset would not chang
bibo mao writes:
> +Igor
>
>
> On 2025/3/21 下午2:47, Markus Armbruster wrote:
>> Bibo Mao writes:
>>
>>> In function virt_cpu_unplug(), it will send cpu unplug message to
>>> interrupt controller extioi and ipi irqchip. If there is problem in
>>> this function, system should continue to run and
On 3/21/25 10:47, Jamin Lin wrote:
Hi Cedric,
Subject: [PATCH v1 02/22] hw/misc/aspeed_hace: Fix buffer overflow in
has_padding function
The maximum padding size is either 64 or 128 bytes and should always be
smaller than "req_len". If "padding_size" exceeds "req_len", then "req_len -
padding_
On 3/20/25 10:52, Duan, Zhenzhong wrote:
-Original Message-
From: Cédric Le Goater
Subject: [PATCH for-10.1 24/32] vfio: Introduce new files for dirty tracking
definitions and declarations
File "common.c" has been emptied of most of its definitions by the
previous changes and the onl
Added "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI", "HACE_HASH_KEY_BUFF_HI"
registers to store upper 32 bits.
Updated "write_regs" to handle 64-bit source and digest addresses.
Signed-off-by: Jamin Lin
---
tests/qtest/aspeed-hace-utils.h | 3 +++
tests/qtest/aspeed-hace-utils.c | 2 ++
2 files c
On Fri, Mar 21, 2025 at 1:43 PM Heinrich Schuchardt
wrote:
>
> Currently resetting leads to resynchronizing the Goldfish RTC with the
> system clock of the host. In real hardware an RTC reset would not change
> the wall time. Other RTCs like pl031 do not show this behavior.
>
> Move the synchroniz
Make live migration more robust. Commit 4c0cfc72b31a ("pflash_cfi01:
write flash contents to bdrv on incoming migration") elaborates in
detail on the motivation.
Cc: Peter Krempa
Reviewed-by: Peter Krempa
Signed-off-by: Gerd Hoffmann
Message-ID: <20250319141159.1461621-2-kra...@redhat.com>
---
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