Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
system/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/system/meson.build b/system/meson.build
index c83d80fa248..9d0b0122e54 100644
--- a/system/meson.build
+++ b/system/meson.build
@@ -2,7 +2,6 @
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
include/tcg/tcg-op.h | 1 +
target/ppc/helper_regs.h | 2 ++
hw/ppc/spapr_nested.c | 1 +
hw/sh4/sh7750.c| 1 +
page-vary-target.c | 2 +-
target/riscv/bitmanip_helper.c | 2 +-
Needed so compilation units including it can be common.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
include/exec/ram_addr.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h
index 3d8df4edf15..7c011fadd
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
system/memory.c| 17 +
system/meson.build | 2 +-
2 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/system/memory.c b/system/memory.c
index 4c829793a0a..eddd21a6cdb 100644
--- a/system/memory.c
We are trying to unify all qemu-system-FOO to a single binary.
In order to do that we need to remove QAPI target specific code.
Introduce the TYPE_DUMP_SKEYS_INTERFACE type which provide the
qmp_dump_skeys() callback, have it implemented on the CCW machine.
Machines not supporting this interface r
On 6/3/25 08:26, Thomas Huth wrote:
On 05/03/2025 17.59, Pierrick Bouvier wrote:
On 3/5/25 07:39, Philippe Mathieu-Daudé wrote:
Introduce an API to get information specific to a binary
from the binary name (argv[0]).
Initialize it from qemu_init() on system emulation.
What we want here is m
On 3/11/25 02:50, Saanjh Sengupta wrote:
Hi,
I have a couple of questions:
1.
When I use the libstoptrigger.so: in that case the QEMU 's emulation
stops after executing the defined number of instructions. Post this,
the whole QEMU terminates. And while using the libips.so I am
On Mon, Mar 10, 2025 at 03:12:05PM -0400, Peter Xu wrote:
> On Sun, Mar 09, 2025 at 09:15:00PM -0400, Manish Mishra wrote:
> > We allocate extra metadata SKBs in case of a zerocopy send. This metadata
> > memory is accounted for in the OPTMEM limit. If there is any error while
> > sending zerocopy
On 3/10/25 11:35 AM, Rorie Reyes wrote:
Register an event notifier handler to process AP configuration
change events by queuing the event and generating a CRW to let
the guest know its AP configuration has changed
Signed-off-by: Rorie Reyes
LGTM:
Reviewed-by: Anthony Krowiak
---
hw/v
Peter Xu writes:
> On Fri, Mar 07, 2025 at 04:06:17PM -0300, Fabiano Rosas wrote:
>> > I never tried vsock, would it be used in any use case?
>> >
>>
>> I don't know, I'm going by what's in the code.
>>
>> > It seems to be introduced by accident in 72a8192e225cea, but I'm not sure.
>> > Maybe t
On 2025/03/10 21:05, Dmitry Osipenko wrote:
From: Alex Bennée
This attempts to tidy up the VirtIO GPU documentation to make the list
of requirements clearer. There are still a lot of moving parts and the
distros have some catching up to do before this is all handled
automatically.
Signed-off-b
On 3/9/25 12:09 AM, Philippe Mathieu-Daudé wrote:
> These files depend on the VFIO symbol in their Kconfig
> definition. They don't rely on target specific definitions,
> move them to system_ss[] to build them once.
>
> Signed-off-by: Philippe Mathieu-Daudé
> Reviewed-by: Pierrick Bouvier
> R
From: Pierrick Bouvier
Allows SYNDBG definitions to be available for common compilation units.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
Message-ID: <20250307215623.524987-5-pierrick.bouv...@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/hyperv/hyp
From: Bernhard Beschow
The implementation just allows Linux to determine date and time.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Fabiano Rosas
Message-ID: <20250223114708.1780-19-shen...@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS
On Tue, Mar 11, 2025 at 03:57:35PM -0400, Peter Xu wrote:
> On Tue, Mar 11, 2025 at 03:33:23PM +, Daniel P. Berrangé wrote:
> > On Tue, Mar 11, 2025 at 11:20:50AM -0400, Peter Xu wrote:
> > > On Tue, Mar 11, 2025 at 08:13:16AM +, Daniel P. Berrangé wrote:
> > > > On Mon, Mar 10, 2025 at 04:
On Tue, Mar 11, 2025 at 02:10:29PM +, Shameer Kolothum wrote:
> Allow cold-plug smmuv3-accel to virt If the machine wide smmuv3
> is not specified.
>
> No FDT support is added for now.
>
> Signed-off-by: Shameer Kolothum
> ---
> hw/arm/virt.c | 12
> hw/core/sysbus-fdt.
> -Original Message-
> From: Brian Cain
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsi
> -Original Message-
> From: Brian Cain
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsi
> -Original Message-
> From: Brian Cain
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsi
On Tue Mar 11, 2025 at 11:37 PM AEST, Daniel P. Berrangé wrote:
> On Tue, Mar 11, 2025 at 11:13:26PM +1000, Nicholas Piggin wrote:
>> The NetBSD archive is currently failing part-way through downloads,
>> which results in no clean HTTP error but a short transfer and checksum
>> error. This is treat
On Sun, 9 Mar 2025 at 19:01, Philippe Mathieu-Daudé wrote:
> On 28/2/25 18:48, Peter Maydell wrote:
> > --- a/hw/net/smc91c111.c
> > +++ b/hw/net/smc91c111.c
> > @@ -22,6 +22,13 @@
> >
> > /* Number of 2k memory pages available. */
> > #define NUM_PACKETS 4
> > +/*
> > + * Maximum size of a d
To support AST2700 A1, some registers of the INTC(CPU Die) support one input
pin to multiple output pins. Renamed "num_ints" to "num_inpins" in the INTC
controller code for better clarity and consistency in naming conventions.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
include/h
On 3/11/2025 8:54 PM, Alejandro Jimenez wrote:
The size mask currently encompasses reserved bits [11:9]. Extract only the
corrects bits encoding size (i.e. [8:0]).
Cc: qemu-sta...@nongnu.org
Fixes: d29a09ca6842 ("hw/i386: Introduce AMD IOMMU")
Signed-off-by: Alejandro Jimenez
---
hw/i386/a
Currently the fetch code does not fail gracefully when retry limit is
exceeded, it just falls through the loop with no file, which ends up
hitting other errors.
In preparation for adding more cases where a download gets retried,
add an explicit check for retry limit exceeded.
Signed-off-by: Nicho
When POWER10 CPU was made as default, we missed keeping POWER9 as
default for older pseries releases (pre-10.0) at that time.
This caused breakge in default cpu evaluation for older pseries
machines and hence this fix.
Fixes: 51113013f3 ("ppc/spapr: change pseries machine default to POWER10 CPU")
Define acpi_tables / acpi_tables_len stubs, then replace the
compile-time CONFIG_ACPI check in fw_cfg.c by a runtime one.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Ani Sinha
Message-Id: <20250307223949.54040-4-phi...@linaro.org>
---
hw/acpi/acpi-stub.c | 3 +++
hw/i386/fw_cfg.c| 8
Those functions are used by system/physmem.c, and are called only if
xen is enabled (which happens only if CONFIG_XEN is not set).
So we can crash in case those are called.
Acked-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/xen/xen_stubs.c | 56 +
Only system/physmem.c and system/memory.c use those functions, so we can
move then to internal header.
Signed-off-by: Pierrick Bouvier
---
include/exec/memory-internal.h | 19 +++
include/exec/memory.h | 18 --
2 files changed, 19 insertions(+), 18 deleti
On 3/9/25 00:09, Philippe Mathieu-Daudé wrote:
In order to be able to check whether a QOM type has been
registered, introduce the type_is_registered() helper.
Signed-off-by: Philippe Mathieu-Daudé
FWIW,
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/qom/object.h | 8
> -Original Message-
> From: Brian Cain
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsi
This method adds the options/preamble to each definition block. Notably,
:since: and :ifcond: are added, as are any "special features" such as
:deprecated: and :unstable:.
If conditionals, if attached to special features, are currently
unhandled in this patch and will be addressed at a future date
To support AST2700 A1, some registers of the INTC(CPU Die) support one input
pin to multiple output pins. Renamed "num_ints" to "num_inpins" in the INTC
controller code for better clarity and consistency in naming conventions.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
include/h
On 12/03/2025 06.17, Nicholas Piggin wrote:
Currently the fetch code does not fail gracefully when retry limit is
exceeded, it just falls through the loop with no file, which ends up
hitting other errors.
In preparation for adding more cases where a download gets retried,
add an explicit check f
On 12/03/2025 06.17, Nicholas Piggin wrote:
If the server provides a Content-Length header, use that to verify the
size of the downloaded file. This catches cases where the connection
terminates early, and gives the opportunity to retry. Without this, the
checksum will likely mismatch and fail wi
On 12/03/2025 06.17, Nicholas Piggin wrote:
Assets are uniquely identified by human-readable-ish url, so make an
AssetError exception class that prints url with error message.
A property 'transient' is used to capture whether the client may retry
or try again later, or if it is a serious and lik
Add cpu hotplug testcase support for LoongArch system, it passes to
run with command "make check-qtest-loongarch64" as following:
qemu:qtest+qtest-loongarch64 / qtest-loongarch64/cpu-plug-test OK 0.38s 1
subtests passed
Signed-off-by: Bibo Mao
---
v1 ... v2:
1. Call test function add_loongar
Hi,
Thank you for the clarification. Regarding the last time
"Stoptrigger might be a better fit for what you want to do, and instead of
exiting, you want to resume emulation after N insn. The function
qemu_clock_advance_virtual_time() can only be used to move the time forward,
and you can not
On 12/03/2025 04.44, Bibo Mao wrote:
Add cpu hotplug testcase support for LoongArch system, it passes to
run with command "make check-qtest-loongarch64" as following:
qemu:qtest+qtest-loongarch64 / qtest-loongarch64/cpu-plug-test OK 0.38s 1
subtests passed
Signed-off-by: Bibo Mao
---
v1 ...
Add index entry for LoongArch system and do some small modification
with LoongArch document with rst syntax.
Signed-off-by: Bibo Mao
---
docs/system/loongarch/virt.rst | 31 ++-
docs/system/target-loongarch.rst | 19 +++
docs/system/targets.rst
On Tue, Feb 18, 2025 at 7:43 AM Stefan Hajnoczi wrote:
>
> On Mon, Feb 17, 2025 at 05:40:04PM +0100, Albert Esteve wrote:
> > Add SHMEM_MAP/UNMAP requests to vhost-user to
> > handle VIRTIO Shared Memory mappings.
> >
> > This request allows backends to dynamically map
> > fds into a VIRTIO Shared
On Tue, Mar 11, 2025 at 02:27:14PM +0100, Laurent Vivier wrote:
> Add a chapter to explain how to use passt(1) instead of '-net user'.
> passt(1) can be connected to QEMU using UNIX socket or vhost-user.
> With vhost-user, migration of the VM is allowed and internal state of
> passt(1) is transfere
Assets are uniquely identified by human-readable-ish url, so make an
AssetError exception class that prints url with error message.
A property 'transient' is used to capture whether the client may retry
or try again later, or if it is a serious and likely permanent error.
This is used to retain th
Continuing discussion from
https://lore.kernel.org/qemu-devel/20250311131327.903329-1-npig...@gmail.com/
I added a basic short-download detection, cleaned up download retry
failure, and added an AssetError class that can help us be a bit
smarter about what to do with failures. That's extended to
From: John Snow
Add the ability to resolve cross-references using the `any`
cross-reference syntax. Adding QAPI-specific cross-reference roles will
be added in a forthcoming commit, and will share the same find_obj()
helper.
(There's less code needed for the generic cross-reference resolver, so
On 3/10/25 09:28, Pierrick Bouvier wrote:
Hi Zoltan,
On 3/10/25 06:23, BALATON Zoltan wrote:
On Sun, 9 Mar 2025, Pierrick Bouvier wrote:
The main goal of this series is to be able to call any memory ld/st function
from code that is *not* target dependent.
Why is that needed?
this series b
Fields of SysBusDevice must only be accessed with the BQL taken. Add
a wrapper that verifies that.
Signed-off-by: Paolo Bonzini
---
rust/hw/timer/hpet/src/hpet.rs | 4 +---
rust/qemu-api/src/sysbus.rs| 12
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/rust/hw
From: "Maciej S. Szmigiero"
Add a hw_compat entry for recently added x-migration-multifd-transfer VFIO
property.
Reviewed-by: Cédric Le Goater
Signed-off-by: Maciej S. Szmigiero
Link:
https://lore.kernel.org/qemu-devel/92c354f0457c152d1f267cc258c6967fff551cb1.1741124640.git.maciej.szmigi...@o
On 3/10/25 21:08, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
system/memory.c| 17 +
system/meson.build | 2 +-
2 files changed, 6 insertions(+), 13 deletions(-)
Reviewed-by: Richard Henderson
r~
On Tue, Mar 04, 2025 at 12:24:49AM -0500, Xiaoyao Li wrote:
> Date: Tue, 4 Mar 2025 00:24:49 -0500
> From: Xiaoyao Li
> Subject: [PATCH 1/2] i386/cpu: Move adjustment of CPUID_EXT_PDCM before
> feature_dependencies[] check
> X-Mailer: git-send-email 2.34.1
>
> There is one entry relates to CPUID
On 3/9/25 21:58, Pierrick Bouvier wrote:
They are now accessible through exec/memory.h instead, and we make sure
all variants are available for common or target dependent code.
...
diff --git a/include/exec/memory_ldst.h.inc b/include/exec/memory_ldst.h.inc
index 92ad74e9560..74519a88de0 100644
> -Original Message-
> From: Brian Cain
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsi
On Tue, 11 Mar 2025, Philippe Mathieu-Daudé wrote:
All instances of TYPE_IMX_USDHC set vendor=SDHCI_VENDOR_IMX.
No need to special-case it.
Typo in subject. It's actually SDHCI_VENDOR_IMX which is removed by this
patch.
Regards,
BALATON Zoltan
Signed-off-by: Philippe Mathieu-Daudé
Reviewe
On Mon, 10 Mar 2025, Philippe Mathieu-Daudé wrote:
Add MemoryRegionOps as a class property. For now it is only
used by TYPE_IMX_USDHC.
Otherwise the default remains in little endian.
I still don't see why you need to do this via the class and not just set
it init or realize as it's done alread
In preparation to make @dump-skeys command generic,
extract s390_qmp_dump_skeys() out of qmp_dump_skeys().
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/s390x/storage-keys.h | 1 +
hw/s390x/s390-skeys.c | 7 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/i
On Tue, Mar 11, 2025 at 02:10:34PM +, Shameer Kolothum wrote:
> @@ -30,6 +32,185 @@ static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState
> *s, SMMUPciBus *sbus,
> return accel_dev;
> }
>
> +static bool
> +smmuv3_accel_dev_attach_viommu(SMMUv3AccelDevice *accel_dev,
> +
On Tue, Mar 11, 2025 at 08:08:02PM +, Daniel P. Berrangé wrote:
> On Tue, Mar 11, 2025 at 03:57:35PM -0400, Peter Xu wrote:
> > On Tue, Mar 11, 2025 at 03:33:23PM +, Daniel P. Berrangé wrote:
> > > On Tue, Mar 11, 2025 at 11:20:50AM -0400, Peter Xu wrote:
> > > > On Tue, Mar 11, 2025 at 08:
From: "Maciej S. Szmigiero"
A new function multifd_queue_device_state() is provided for device to queue
its state for transmission via a multifd channel.
Reviewed-by: Peter Xu
Signed-off-by: Maciej S. Szmigiero
Link:
https://lore.kernel.org/qemu-devel/ebd55768d3e5fecb5eb3f197bad9c0c07e5bc084.
Hi Alejandro,
On 3/11/2025 8:54 PM, Alejandro Jimenez wrote:
The DTE validation method verifies that all bits in reserved DTE fields are
unset. Update them according to the latest definition available in AMD I/O
Virtualization Technology (IOMMU) Specification - Section 2.2.2.1 Device
Table Entry
On Wed Mar 12, 2025 at 12:11 AM AEST, Daniel P. Berrangé wrote:
> On Tue, Mar 11, 2025 at 02:55:25PM +0100, Thomas Huth wrote:
>> On 11/03/2025 14.37, Daniel P. Berrangé wrote:
>> > On Tue, Mar 11, 2025 at 11:13:26PM +1000, Nicholas Piggin wrote:
>> > > The NetBSD archive is currently failing part-
From: Tomita Moeko
The actual IO BAR4 write quirk in vfio_probe_igd_bar4_quirk was removed
in previous change, leaving the function not matching its name, so move
it into the newly introduced vfio_config_quirk_setup. There is no
functional change in this commit.
For now, to align with current le
From: Tomita Moeko
The IO BAR4 of IGD devices contains a pair of 32-bit address/data
registers, MMIO_Index (0x0) and MMIO_Data (0x4), which provide access
to the MMIO BAR0 (GTTMMADR) from IO space. These registers are probably
only used by the VBIOS, and are not documented by intel. The observed
From: Philippe Mathieu-Daudé
Prefer runtime helpers to get target page size.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20250305153929.43687-3-phi...@linaro.org>
Link:
https://lore.kernel.org/qemu-devel/20250311085743.21724-5-phi...@linaro.org
Signed-off
From: Tomita Moeko
Both x-igd-opregion option and legacy mode require identical steps to
set up OpRegion for IGD devices. Consolidate these steps into a single
vfio_pci_igd_setup_opregion function.
The function call in pci.c is wrapped with ifdef temporarily to prevent
build error for non-x86 ar
From: Tomita Moeko
Both enable OpRegion option (x-igd-opregion) and legacy mode require
setting up OpRegion copy for IGD devices. As the config quirk no longer
depends on legacy mode, we can now handle x-igd-opregion option there
instead of in vfio_realize.
Signed-off-by: Tomita Moeko
Reviewed-
From: Tomita Moeko
So far, IGD-specific quirks all require enabling legacy mode, which is
toggled by assigning IGD to 00:02.0. However, some quirks, like the BDSM
and GGC register quirks, should be applied to all supported IGD devices.
A new config option, x-igd-legacy-mode=[on|off|auto], is intr
On 3/10/25 13:17, BALATON Zoltan wrote:
On Mon, 10 Mar 2025, Pierrick Bouvier wrote:
On 3/10/25 09:53, Richard Henderson wrote:
On 3/10/25 09:43, Pierrick Bouvier wrote:
On 3/10/25 09:37, Richard Henderson wrote:
On 3/10/25 09:14, Pierrick Bouvier wrote:
On 3/10/25 09:08, Richard Henderson w
On 3/9/25 21:58, Pierrick Bouvier wrote:
Will allow to make system/memory.c common later.
Signed-off-by: Pierrick Bouvier
---
include/exec/memory.h | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 7c20f36a312
From: Tomita Moeko
Though GTT Stolen Memory (GSM) is right below Data Stolen Memory (DSM)
in host address space, direct access to GSM is prohibited, and it is
not mapped to guest address space. Both host and guest accesses GSM
indirectly through the second half of MMIO BAR0 (GTTMMADR).
Guest fir
On 3/10/25 10:47 AM, Vasily Gorbik wrote:
On Mon, Mar 10, 2025 at 10:20:05AM -0400, Rorie Reyes wrote:
On 2/5/25 3:38 AM, Cédric Le Goater wrote:
Are the kernel changes planned for 6.14 ?
FYI, QEMU 10.0 hard freeze is scheduled for 2025-03-18 which is
approximately when 6.14-rc7 will be r
On Mon, 10 Mar 2025 at 13:15, Philippe Mathieu-Daudé wrote:
>
> On 10/3/25 11:29, Peter Maydell wrote:
> > We want to capture potential Rust backtraces on panics in our test
> > logs, which isn't Rust's default behaviour. Set RUST_BACKTRACE=1 in
> > the add_test_setup environments, so that all ou
Hi Zhao,
On 3/10/25 12:47 AM, Zhao Liu wrote:
> (+EwanHai for zhaoxin case...)
>
> ...
>
[snip]
>> +
>> +/*
>> + * Performance-monitoring supported from K7 and later.
>> + */
>> +if (family < 6) {
>> +return;
>> +}
>
> I understand we can get family by object_prope
From: Philippe Mathieu-Daudé
These files depend on the VFIO symbol in their Kconfig
definition. They don't rely on target specific definitions,
move them to system_ss[] to build them once.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Revie
On Mon, Mar 10, 2025 at 10:20:05AM -0400, Rorie Reyes wrote:
> On 2/5/25 3:38 AM, Cédric Le Goater wrote:
>
> >
> > Are the kernel changes planned for 6.14 ?
> >
> >
> >
> > FYI, QEMU 10.0 hard freeze is scheduled for 2025-03-18 which is
> > approximately when 6.14-rc7 will be released.
> >
> >
From: Philippe Mathieu-Daudé
Some files don't rely on any target-specific knowledge
and can be compiled once:
- helpers.c
- container-base.c
- migration.c (removing unnecessary "exec/ram_addr.h")
- migration-multifd.c
- cpr.c
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bou
On 3/11/25 18:48, Joao Martins wrote:
The intent behind the x-device-dirty-page-tracking option is twofold:
1) development/testing in the presence of VFs with VF dirty page tracking
2) deliberately choosing platform dirty tracker over the VF one.
Item 2) scenario is useful when VF dirty tracke
On Tue, 11 Mar 2025 16:28:10 +,
Cornelia Huck wrote:
>
> - I'm open to changing the source of the definitions from the sysregs
> file to the JSON definitions published by Arm; however, I first wanted
> to get the code using it right -- we can switch out the code generating
> the
Hi Zhao,
On 3/9/25 11:14 PM, Zhao Liu wrote:
> On Sun, Mar 02, 2025 at 02:00:15PM -0800, Dongli Zhang wrote:
>> Date: Sun, 2 Mar 2025 14:00:15 -0800
>> From: Dongli Zhang
>> Subject: [PATCH v2 07/10] target/i386/kvm: query kvm.enable_pmu parameter
>> X-Mailer: git-send-email 2.43.5
>>
>> There i
Factor out duplicated code to a single helper. More users to come.
Signed-off-by: Greg Kurz
---
hw/9pfs/9p-local.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/hw/9pfs/9p-local.c b/hw/9pfs/9p-local.c
index 928523afcc6c..c4366c867988 100644
--- a/hw/
On Mon, Mar 10, 2025 at 11:24:15AM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, Mar 07, 2025 at 04:06:17PM -0300, Fabiano Rosas wrote:
> >> > I never tried vsock, would it be used in any use case?
> >> >
> >>
> >> I don't know, I'm going by what's in the code.
> >>
> >> > It see
From: John Snow
This method annotates the start of a new module, crediting the source
location to the first line of the module file.
Signed-off-by: John Snow
Message-ID: <20250311034303.75779-41-js...@redhat.com>
Acked-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
docs/sphinx/qa
From: Philippe Mathieu-Daudé
Always include necessary headers explicitly, to avoid
when refactoring unrelated ones:
hw/vfio/common.c:1176:45: error: implicit declaration of function
‘tcg_enabled’;
1176 | tcg_enabled() ?
DIRTY_CLIENTS_ALL :
From: Philippe Mathieu-Daudé
display.c doesn't rely on target specific definitions,
move it to system_ss[] to build it once.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Reviewed-by: Cédric Le Goater
Reviewed-by: Eric Auger
Message-Id: <
> -Original Message-
> From: Brian Cain
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsi
From: Vasilis Liaskovitis
The ATI BAR4 quirk is targeting an ioport BAR. Older devices may
have a BAR4 which is not an ioport, causing a segfault here. Test
the BAR type to skip these devices.
Similar to
"8f419c5b: vfio/pci-quirks: Exclude non-ioport BAR from NVIDIA quirk"
Untested, as I don't
On Mon, 10 Mar 2025, Pierrick Bouvier wrote:
On 3/10/25 09:28, Pierrick Bouvier wrote:
Hi Zoltan,
On 3/10/25 06:23, BALATON Zoltan wrote:
On Sun, 9 Mar 2025, Pierrick Bouvier wrote:
The main goal of this series is to be able to call any memory ld/st
function
from code that is *not* target de
Am 11.03.2025 um 14:26 hat Stefan Hajnoczi geschrieben:
> v4:
> - Squash fixup commit properly this time >_< [Peter]
> v3:
> - Use vq_aio_context[VIRTIO_SCSI_VQ_NUM_FIXED] as the AioContext for the Block
> Backend [Kevin]
> v2:
> - Only expose cmd vqs via iothread-vq-mapping [Kevin, Peter]
>
> I
/pull-vfio-20250311
for you to fetch changes up to 4d9607481560e6c8e1508a0aafe94f86a0503c8c:
vfio/pci: Drop debug commentary from x-device-dirty-page-tracking (2025-03-11
19:04:58 +0100)
vfio queue:
* Fixed endianness of VFIO de
From: Tomita Moeko
IGD devices require device-specific quirk to be applied to their PCI
config space. Currently, it is put in the BAR4 quirk that does nothing
to BAR4 itself. Add a placeholder for PCI config space quirks to hold
that quirk later.
Signed-off-by: Tomita Moeko
Reviewed-by: Alex Wi
From: Joao Martins
The intent behind the x-device-dirty-page-tracking option is twofold:
1) development/testing in the presence of VFs with VF dirty page tracking
2) deliberately choosing platform dirty tracker over the VF one.
Item 2) scenario is useful when VF dirty tracker is not as fast as
From: Tomita Moeko
A new option will soon be introduced to decouple the LPC bridge/Host
bridge ID quirk from legacy mode. To prepare for this, move the LPC
bridge initialization into a separate function.
Signed-off-by: Tomita Moeko
Reviewed-by: Alex Williamson
Tested-by: Alex Williamson
Revie
From: Philippe Mathieu-Daudé
Removing unused "exec/ram_addr.h" header allow to compile
iommufd.c once for all targets.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Reviewed-by: Cédric Le Goater
Reviewed-by: Eric Auger
Message-Id: <202503
From: "Maciej S. Szmigiero"
Wire data commonly use BE byte order (including in the existing migration
protocol), use it also for for VFIO device state packets.
This will allow VFIO multifd device state transfer between hosts with
different endianness.
Although currently there is no such use case
On 3/4/25 21:07, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
trace/control-target.c | 2 --
trace/meson.build | 4 +---
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/trace/control-target.c b/trace/control-target.c
index d58e84f6dd8..57ceac21084 100644
---
On Mon, 10 Mar 2025 at 01:28, Philippe Mathieu-Daudé wrote:
>
> Hi,
>
> This series add support for (async) FIFO on the transmit path
> of the PL011 UART.
This hasn't made the last pre-softfreeze arm pullreq, but
I think we can reasonably call "don't do blocking I/O"
enough of a bugfix for it to
From: Philippe Mathieu-Daudé
is already included by "system/kvm.h" in the next line.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Reviewed-by: Cédric Le Goater
Reviewed-by: Eric Auger
Message-Id: <20250307180337.14811-3-phi...@linaro.or
On Mon, 10 Mar 2025 at 17:34, Philippe Mathieu-Daudé wrote:
>
> On 10/3/25 14:18, Peter Maydell wrote:
> > On Mon, 10 Mar 2025 at 13:15, Philippe Mathieu-Daudé
> > wrote:
> >>
> >> On 10/3/25 11:29, Peter Maydell wrote:
> >>> We want to capture potential Rust backtraces on panics in our test
> >
Provide a system reset vector and handle it similar to hmp_system_reset
We don't use a QMP related shutdown reason because the mcdserver is
implemented independent of the used communication protocol.
(In fact, another communication protocol implementation for MCD already
exists and can be found at
From: Tomita Moeko
The KVMGT/GVT-g vGPU also exposes OpRegion. But unlike IGD passthrough,
it only needs the OpRegion quirk. A previous change moved x-igd-opregion
handling to config quirk breaks KVMGT functionality as it brings extra
checks and applied other quirks. Here we check if the device i
Specify which layer (core/cluster/socket) caches found at in the CPU
topology. Updating cache topology to device tree (spec v0.4).
Example:
Here, 2 sockets (packages), and 2 clusters, 4 cores and 2 threads
created, in aggregate 2*2*4*2 logical cores. In the smp-cache object,
cores will have l1d an
From: Tomita Moeko
The LPC bridge/Host bridge IDs quirk is also not dependent on legacy
mode. Recent Windows driver no longer depends on these IDs, as well as
Linux i915 driver, while UEFI GOP seems still needs them. Make it an
option to allow users enabling and disabling it as needed.
Signed-of
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