On Mon, Mar 10, 2025 at 08:33:14AM +, Zhijian Li (Fujitsu) wrote:
> Hi Stefan,
>
> Copied to gitlab CI,
>
> On 08/03/2025 16:42, Stefan Hajnoczi wrote:
> > On Sat, Mar 8, 2025 at 2:01 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Hi,
> >>
> >> On 7/3/25 19:15, Fabiano Rosas wrote:
> >>> Fr
On 11/3/25 07:22, Nicholas Piggin wrote:
On Mon Jan 27, 2025 at 8:26 PM AEST, Philippe Mathieu-Daudé wrote:
This series is a simply a cleanup restricting TCG specific
exception-related code to TCG, by moving code to a new unit
named 'tcg-excp_helper.c'.
I pulled this in and just added some
John Snow writes:
> We have several kinds of sections, and to tell them apart, we use
> Section attribute @tag and also the section object's Python type:
>
> type@tag
> untagged Section None
> @foo: ArgSection 'foo'
> Returns: Section 'Returns'
>
John Snow writes:
> This helps simplify the new doc generator if it doesn't have to check
> for undocumented members, it can just blindly operate on a sequence of
> QAPIDoc.Section instances.
>
> NB: If there is no existing 'member' section, these undocumented stub
> members will be inserted dire
John Snow writes:
> Makes debugging far more pleasant when you can just print(section) and
> get something reasonable to display.
>
> Signed-off-by: John Snow
> ---
> scripts/qapi/parser.py | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/scripts/qapi/parser.py b/scripts/qapi/parser.
On 11/3/25 02:54, Duan, Zhenzhong wrote:
-Original Message-
From: Philippe Mathieu-Daudé
Subject: Re: [PATCH v2 15/21] hw/vfio/pci: Check CONFIG_IOMMUFD at runtime
using iommufd_builtin()
On 10/3/25 05:11, Duan, Zhenzhong wrote:
Hi Philippe,
-Original Message-
From: Philip
On 11/3/25 07:53, Markus Armbruster wrote:
create_backend()'s caller catches QAPIError, and returns non-zero exit
code on catch. The caller's caller passes the exit code to
sys.exit().
create_backend() doesn't care: it reports errors to stderr and
sys.exit()s.
Change it to raise QAPIError inst
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Missing the "why" justification we couldn't do that before.
---
include/exec/exec-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Missing the "why" justification we couldn't do that before.
---
include/exec/memory-internal.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/exec/memory-internal.h b/in
Add support for Features field lists. There is no QAPI-specific
functionality here, but this could be changed if desired (if we wanted
the feature names to link somewhere, for instance.)
This feature list doesn't have any restrictions, so it can be used to
document object-wide features or per-memb
John Snow writes:
> Sh!
>
> This patch can be dropped from the PR and I'll clean it up later. It's
> just here to help me establish a linting baseline. It isn't really
> needed for the series itself.
>
> Signed-off-by: John Snow
Okay, I'll drop this patch.
Note that I just posted "[PATCH]
John Snow writes:
> Instead of using the info object for the doc block as a whole (which
> always points to the very first line of the block), update the info
> pointer for each call to ensure_untagged_section when the existing
> section is otherwise empty. This way, Sphinx error information will
create_backend()'s caller catches QAPIError, and returns non-zero exit
code on catch. The caller's caller passes the exit code to
sys.exit().
create_backend() doesn't care: it reports errors to stderr and
sys.exit()s.
Change it to raise QAPIError instead.
Signed-off-by: Markus Armbruster
---
On Tue, Mar 11, 2025 at 12:10 AM Alistair Francis wrote:
>
> On Wed, Mar 5, 2025 at 2:54 AM Andreas Schwab wrote:
> >
> > The third argument of the riscv_hwprobe syscall contains the size of the
> > cpu mask in bytes, not bits.
> >
> > Signed-off-by: Andreas Schwab
>
> Richard sent a v2 that I h
On 11/3/25 05:08, Pierrick Bouvier wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
I didn't follow this direction because Richard had a preference
on removing unnecessary inlined functions:
https://lore.kernel.org/qemu-devel/9151205a-13d3-401e-b403-f9195cdb1...@linaro.or
display.c doesn't rely on target specific definitions,
move it to system_ss[] to build it once.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Reviewed-by: Cédric Le Goater
Reviewed-by: Eric Auger
Message-Id: <20250308230917.18907-8-phi...@l
On 11.03.25 09:57, Philippe Mathieu-Daudé wrote:
Both qemu_minrampagesize() and qemu_maxrampagesize() are
related to host memory backends, having the following call
stack:
qemu_minrampagesize()
-> find_min_backend_pagesize()
-> object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)
On 13/2/25 19:00, Stefan Hajnoczi wrote:
Commit 71544d30a6f8 ("scsi: push request restart to SCSIDevice") removed
the only user of SCSIDiskState->bh.
Signed-off-by: Stefan Hajnoczi
---
hw/scsi/scsi-disk.c | 1 -
1 file changed, 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
On 10/3/25 12:06, Peter Maydell wrote:
On Sun, 9 Mar 2025 at 19:01, Philippe Mathieu-Daudé wrote:
On 28/2/25 18:48, Peter Maydell wrote:
--- a/hw/net/smc91c111.c
+++ b/hw/net/smc91c111.c
@@ -22,6 +22,13 @@
/* Number of 2k memory pages available. */
#define NUM_PACKETS 4
+/*
+ * Maximum
The block layer can invoke the resize callback from any AioContext that
is processing requests. The virtqueue is already protected but the
events_dropped field also needs to be protected against races. Cover it
using the event virtqueue lock because it is closely associated with
accesses to the vir
From: Cédric Le Goater
The ref405ep machine is scheduled for removal in QEMU 10.0. Keep the
405 CPU implementation for a while because it is theoretically
possible to model the power management (OCC) co-processor found on the
IBM POWER [8-11] processors.
Signed-off-by: Cédric Le Goater
Reviewed
The commit to fix the OCC common area sensor mappings didn't update the
register offsets to match.
Before this change, skiboot reports:
[0.347100086,3] OCC: Chip 0 sensor data invalid
Afterward, there is no error and the sensor_groups directory appears
under /sys/firmware/opal/.
The SLW_IMA
ll-ppc-for-10.0-1-20250311
for you to fetch changes up to 0f17ae24b53eaab4bbe9cfab267c536e2f7fdbd7:
docs/system/ppc/amigang.rst: Update for NVRAM emulation (2025-03-11 22:43:32
+1000)
* amigaone enhancements, NVRAM and ker
04/02/25 15:24, Тигран Согомонян пишет:
27/12/24 18:16, Richard Henderson пишет:
On 12/27/24 02:46, Tigran Sogomonian wrote:
1 << i is casted to uint64_t while bitwise and with val.
So this value may become 0x8000 but only
31th "start" bit is required.
Use the bitfield extract() API
If nothing responds to an LPC access, the LPC host controller should
set an IRQSTAT error. Model this behaviour.
skiboot uses this error to "probe" LPC accesses, among other things to
determine if a SuperIO chip is present. After this change it recognizes
there is no SuperIO present and does not k
From: Cédric Le Goater
The ref405ep machine is the only PPC 405 machine. Drop all support by
removing the SoC and associated devices as-well as the machine.
Link: https://lore.kernel.org/qemu-devel/20250110141800.1587589-3-...@redhat.com
Signed-off-by: Cédric Le Goater
Reviewed-by: Nicholas Pig
The LPC model has only supported serirqs (ISA device IRQs), however
there are internal sources that can raise other interrupts. Update the
device to handle these interrupt sources.
Signed-off-by: Nicholas Piggin
---
hw/ppc/pnv_lpc.c | 64 +++-
1 file c
Each non-core chiplet on a chip has a "pervasive chiplet" unit and its
xscom register set. This adds support for PHB4/5.
skiboot reads the CPLT_CONF1 register in __phb4/5_get_max_link_width(),
which shows up as unimplemented xscom reads. Set a value in PCI CONF1
register's link-width field to demo
HOMER memory implements some dummy registers that return a nonsense
value to satisfy skiboot accesses caused by "SLW" init and register
save/restore programming that has never worked under QEMU:
[0.265000943,3] SLW: Failed to set HRMOR for CPU 0,RC=0x1
[0.265356988,3] Disabling deep stop s
From: Glenn Miles
Change all printf() in pnv-xive2-* qtests to g_test_message()
[npiggin: split from pool qtest]
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Nicholas Piggin
Signed-off-by: Nicholas Piggin
---
tests/qtest/pnv-xive2-flush-sync.c | 6 +++---
tests/qtes
Linux power management code accesses these registers for pstate
management. Wire up a very simple implementation.
Signed-off-by: Nicholas Piggin
---
After OCC fixes in QEMU pnv model and skiboot (since they have suffered
some bitrot), Linux will start performing PM SPR accesses. This is a
very si
skiboot has a bug that does not handle ISA FW access correctly for IDSEL
devices > 0, and the current PNOR default address and size puts 64MB in
device 0 and 64MB in device 1, which causes skiboot to hit this bug and
breaks PNOR accesses.
Move the PNOR address down to 0 for now, so a 256MB PNOR ca
From: Glenn Miles
Added new test for pool interrupts. Removed all printfs from pnv-xive2-*
qtests.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Nicholas Piggin
Signed-off-by: Nicholas Piggin
---
tests/qtest/pnv-xive2-test.c | 76
From: Chalapathi V
In PnvXferBuffer dynamically allocating and freeing is a
process overhead. Hence used an existing Fifo8 buffer with
capacity of 16 bytes.
Signed-off-by: Chalapathi V
Message-ID: <20250303141328.23991-2-chalapath...@linux.ibm.com>
Signed-off-by: Nicholas Piggin
---
hw/ssi/pn
From: Frederic Barrat
XIVE crowd sizes are encoded into a 2-bit field as follows:
0: 0b00
2: 0b01
4: 0b10
16: 0b11
A crowd size of 8 is not supported.
If an END is defined with the 'crowd' bit set, then a target can be
running on different blocks. It means that some bits from the block
V
Put HOMER memory region base and size into the class, to allow more
code-reuse between different machines in later changes.
Signed-off-by: Nicholas Piggin
---
hw/ppc/pnv_homer.c | 46 +++---
include/hw/ppc/pnv.h | 6 ++---
include/hw/ppc/pnv_homer.h
From: Philippe Mathieu-Daudé
Move helpers common to system/user emulation to tcg-excp_helper.c.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Harsh Prateek Bora
Message-ID: <20250127102620.39159-12-phi...@linaro.org>
Signed-off-by: Nicholas Piggin
---
target/ppc/excp_helper.c | 141
From: Philippe Mathieu-Daudé
We are going to move code calling ppc_ldl_code() out of
excp_helper.c where it is defined. Expose its declaration
for few commits, until eventually making it static again
once everything is moved.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Harsh Prateek Bora
From: Frederic Barrat
When a group interrupt cannot be delivered, we need to:
- increment the backlog counter for the group in the NVG table
(if the END is configured to keep a backlog).
- start a broadcast operation to set the LSMFB field on matching CPUs
which can't take the interrupt now b
LPC FW address space is a 256MB (28-bit) region to one of 16-devices
that are selected with the IDSEL register. Implement this by making
the ISA FW address space 4GB, and move the 256MB OPB alias within
that space according to IDSEL.
Signed-off-by: Nicholas Piggin
---
hw/ppc/pnv_lpc.c | 15 +
From: BALATON Zoltan
Initialise empty NVRAM with default values. This also enables IDE UDMA
mode in AmigaOS that is faster but has to be enabled in environment
due to problems with real hardware but that does not affect emulation
so we can use faster defaults here.
Signed-off-by: BALATON Zoltan
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20250127102620.39159-7-phi...@linaro.org>
Signed-off-by: Nicholas Piggin
---
target/ppc/excp_helper.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/
From: Frederic Barrat
When the hypervisor or OS pushes a new value to the CPPR, if the LSMFB
value is lower than the new CPPR value, there could be a pending group
interrupt in the backlog, so it needs to be scanned.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Nich
ping
Jason Chien 於 2025年2月27日 週四 下午3:30寫道：
> This commit renames the macros to accurately reflect the direction of
> DMA operations.
>
> EDU_DMA_TO_PCI now represents reading memory content into the EDU buffer,
> while EDU_DMA_FROM_PCI represents writing EDU buffer content to memory.
>
> The pre
From: Philippe Mathieu-Daudé
In order to move TCG specific code dependent on powerpc_excp()
in the next commit, expose its prototype in "internal.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Harsh Prateek Bora
Message-ID: <20250127102620.39159-14-phi...@linaro.org>
Signed-off-by: Nic
From: Philippe Mathieu-Daudé
Convert HPTE_DIRTY() macro as hpte_is_dirty() method.
sPAPR data structures including the hash page table are big-endian
regardless of current CPU endian mode, so use the big-endian LD/ST
API to access the hash PTEs.
Reviewed-by: Nicholas Piggin
Signed-off-by: Phil
The HOMER is a region of memory used by host and firmware and
microconrollers. It has very little logic by itself, just some BAR
registers. Users of this memory should operate on it rather than
have HOMER implement them with MMIO registers, which is not the
right model.
This change switches the im
From: Frederic Barrat
If the 'H' attribute is set on the NVP structure, the hardware
automatically saves and restores some attributes from the TIMA in the
NVP structure.
The group-specific attributes LSMFB, LGS and T have an extra flag to
individually control what is saved/restored.
Signed-off-
From: Michael Kowal
Rename to follow the convention of the other function names.
Signed-off-by: Michael Kowal
Reviewed-by: Nicholas Piggin
Signed-off-by: Nicholas Piggin
---
hw/intc/xive.c| 22 ++
include/hw/ppc/xive.h | 16
2 files changed, 18 in
From: Frederic Barrat
The NSR has a (so far unused) grouping level field. When a interrupt
is presented, that field tells the hypervisor or OS if the interrupt
is for an individual VP or for a VP-group/crowd. This patch reworks
the presentation API to allow to set/unset the level when
raising/acc
From: Philippe Mathieu-Daudé
Move exception helpers to tcg-excp_helper.c so they are
only built when TCG is selected. Preprocessor guards
are added for some helpers unused when CONFIG_USER_ONLY.
[npiggin: mention USER_ONLY change]
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <2025012710262
The hypervisor is expected to create a value for the HASHPKEY SPR for
each partition. Currently it uses zero for all partitions, use a
random number instead, which in theory might make kernel ROP protection
more secure.
Signed-of-by: Nicholas Piggin
Reviewed-by: Harsh Prateek Bora
Reviewed-by: P
From: Frederic Barrat
When processing a backlog scan for group interrupts, also take
into account crowd interrupts.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Nicholas Piggin
Signed-off-by: Nicholas Piggin
---
hw/intc/xive2.c | 82 ++
From: Shivaprasad G Bhat
Extend the existing watchpoint facility from TCG DAWR0 emulation
to DAWR1 on POWER10.
Reviewed-by: Nicholas Piggin
Reviewed-by: Harsh Prateek Bora
Signed-off-by: Shivaprasad G Bhat
Message-ID: <173708680684.1678.13237334676438770057.st...@linux.ibm.com>
Signed-off-by:
Allow virtio-scsi virtqueues to be assigned to different IOThreads. This
makes it possible to take advantage of host multi-queue block layer
scalability by assigning virtqueues that have affinity with vCPUs to
different IOThreads that have affinity with host CPUs. The same feature
was introduced fo
From: Frederic Barrat
If an END has the 'i' bit set (ignore), then it targets a group of
VPs. The size of the group depends on the VP index of the target
(first 0 found when looking at the least significant bits of the
index) so a mask is applied on the VP index of a running thread to
know if we
From: BALATON Zoltan
There's no need to do shift in a loop, doing it in one instruction
works just as well, only the result is used.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
Message-ID:
<446bf740cbb99422be2cc5a31e51a1034eddded7.1740673173.git.bala...@eik.bme.hu>
Signed-off-b
With IOThread Virtqueue Mapping there will be multiple AioContexts
processing SCSI requests. scsi_req_cancel() and other SCSI request
operations must be performed from the AioContext where the request is
running.
Introduce a virtio_scsi_defer_tmf_to_aio_context() function and the
necessary VirtIOS
From: Chalapathi V
There is a possibility that SPI controller can get into loop due to indefinite
RDR match failures. Hence put a limit to failures and stop the sequencer.
Signed-off-by: Chalapathi V
Reviewed-by: Nicholas Piggin
Message-ID: <20250303141328.23991-5-chalapath...@linux.ibm.com>
S
Hi Dongli,
> >> +/*
> >> + * If KVM_CAP_PMU_CAPABILITY is not supported, there is no way to
> >> + * disable the AMD pmu virtualization.
> >> + *
> >> + * If KVM_CAP_PMU_CAPABILITY is supported !cpu->enable_pmu
> >> + * indicates the KVM has already disabled the PMU virtual
From: Marc-André Lureau
iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmfQXbMcHG1hcmNhbmRy
ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5bmLD/49TJdk8vSnG/G53f3Z
UdUGdDiv98lAr/1wPZvmLPGfxiVLrVQK9Rarjnq9+dzmjoJC+w8THyPIvlvlKAQO
aNSe5LV2lcYFLZwJqXQdGHTEWWZX3BmXroSFY06F9znX4lrNSg/cxLaI+Lt+dbEt
BA9IIMzGYB+z
From: Marc-André Lureau
Just in case.
Signed-off-by: Marc-André Lureau
---
ui/gtk-clipboard.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/ui/gtk-clipboard.c b/ui/gtk-clipboard.c
index 8d8a636fd1..65d89ec601 100644
--- a/ui/gtk-clipboard.c
+++ b/ui/gtk-clip
From: Marc-André Lureau
Add a VMStateDescriptor for QemuClipboardInfo.
Each clipboard owner will have to save its QemuClipboardInfo and
reregister its owned clipboard after loading. (the global cbinfo has
only pointers to owners, so it can't restore the relation with its owner
if it was to handl
From: Chalapathi V
Use a local variable seq_index instead of repeatedly calling
get_seq_index() method and open-code next_sequencer_fsm().
Signed-off-by: Chalapathi V
Reviewed-by: Nicholas Piggin
Message-ID: <20250303141328.23991-3-chalapath...@linux.ibm.com>
Signed-off-by: Nicholas Piggin
--
From: Chalapathi V
Create a spi buses with distinct names on each socket so that responders
are attached to correct SPI controllers.
Change the bus name to chipX.spi. where X = 0..
QOM tree on a 2 socket machine:
(qemu) info qom-tree
/machine (powernv10-machine)
/chip[0] (power10_v2.0-pnv-chi
From: Marc-André Lureau
This allows to use a VMSTATE_INT32 field for migration purposes.
Signed-off-by: Marc-André Lureau
---
include/ui/clipboard.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/ui/clipboard.h b/include/ui/clipboard.h
index ab6acdbd8a..14b6099e73
For block drivers that don't advertise FUA support, we already call
bdrv_co_flush(), which considers BDRV_O_NO_FLUSH. However, drivers that
do support FUA still see the FUA flag with BDRV_O_NO_FLUSH and get the
associated performance penalty that cache.no-flush=on was supposed to
avoid.
Clear FUA
Commit fc4e394b28 removed the last caller of blk_op_is_blocked(). Remove
the now unused function.
Signed-off-by: Kevin Wolf
Message-ID: <20250206165331.379033-1-kw...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Kevin Wolf
---
include/system/bloc
From: Marc-André Lureau
Allows to use VMSTATE STRUCT in following migration support patch.
Signed-off-by: Marc-André Lureau
---
include/ui/clipboard.h | 26 --
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/include/ui/clipboard.h b/include/ui/clipboard.h
As a preparation for having multiple adaptive polling states per
AioContext, move the 'ns' field into a separate struct.
Signed-off-by: Kevin Wolf
Message-ID: <20250307221634.71951-4-kw...@redhat.com>
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Kevin Wolf
---
include/block/aio.h | 6 +-
u
On Tue, Mar 11, 2025 at 11:13:26PM +1000, Nicholas Piggin wrote:
> The NetBSD archive is currently failing part-way through downloads,
> which results in no clean HTTP error but a short transfer and checksum
> error. This is treated as fatal in the precache download, and it halts
> an entire set of
The following changes since commit 825b96dbcee23d134b691fc75618b59c5f53da32:
Merge tag 'migration-20250310-pull-request' of
https://gitlab.com/farosas/qemu into staging (2025-03-11 09:32:07 +0800)
are available in the Git repository at:
https://repo.or.cz/qemu/kevin.git tags/for-upstream
f
On 3/11/25 00:58, Vasilis Liaskovitis wrote:
The ATI BAR4 quirk is targeting an ioport BAR. Older devices may
have a BAR4 which is not an ioport, causing a segfault here. Test
the BAR type to skip these devices.
Similar to
"8f419c5b: vfio/pci-quirks: Exclude non-ioport BAR from NVIDIA quirk"
Un
On Tue, Mar 11, 2025 at 10:20:03AM +0100, Philippe Mathieu-Daudé wrote:
> On 11/3/25 08:34, Bernhard Beschow wrote:
> >
> >
> > Am 7. März 2025 19:18:34 UTC schrieb Bernhard Beschow :
> > >
> > >
> > > Am 4. März 2025 18:53:10 UTC schrieb Bernhard Beschow :
> > > >
> > > >
> > > > Am 23. Febr
On 3/11/25 09:57, Philippe Mathieu-Daudé wrote:
Hi Cédric,
Here are the VFIO cleanup patches ready enough for 10.0,
with Richard and Eric comments from v2 addressed.
I dropped the previously applied patches from the v2 series and
applied this v3 in vfio-next instead.
I'd prefer the rest (of
The guest does not control whether characters are sent on the UART.
Sending them before the guest happens to boot will now result in a
"guest error" log entry that is only because of timing, even if the
guest _would_ later setup the receiver correctly.
This reverts commit abf2b6a028670bd2890bb3aee
On 3/11/25 15:57, Avihai Horon wrote:
On 11/03/2025 15:04, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
On 3/7/25 14:45, Maciej S. Szmigiero wrote:
On 7.03.2025 13:03, Cédric Le Goater wrote:
On 3/7/25 11:57, Maciej S. Szmigiero wrote:
From: "Maciej S. S
We are trying to unify all qemu-system-FOO to a single binary.
In order to do that we need to remove QAPI target specific code.
Introduce the generic SysemuCPUOps::qmp_dump_skeys() callback
(only implemented on s390x). No HMP change.
Since v1 [*]:
- No QMP rename / deprecation
[*] https://lore.k
aio_dispatch_handler() adds handlers to ctx->poll_aio_handlers if
polling should be enabled. If we call adjust_polling_time() for all
polling handlers before this, new polling handlers are still left at
poll->ns = 0 and polling is only actually enabled after the next event.
Move the adjust_polling_
From: Thomas Huth
qsd-migrate is currently only working for raw, qcow2 and qed.
Other formats are failing, e.g. because they don't support migration.
Thus let's limit this test to the three usable formats now.
Suggested-by: Kevin Wolf
Signed-off-by: Thomas Huth
Message-ID: <20250224214058.2058
v4:
- Squash fixup commit properly this time >_< [Peter]
v3:
- Use vq_aio_context[VIRTIO_SCSI_VQ_NUM_FIXED] as the AioContext for the Block
Backend [Kevin]
v2:
- Only expose cmd vqs via iothread-vq-mapping [Kevin, Peter]
Implement --device virtio-scsi-pci,iothread-vq-mapping= support so that
vir
Previously the ctrl virtqueue was handled in the AioContext where SCSI
requests are processed. When IOThread Virtqueue Mapping was added things
become more complicated because SCSI requests could run in other
AioContexts.
Simplify by handling the ctrl virtqueue in the main loop where reset
operati
The block layer can invoke the resize callback from any AioContext that
is processing requests. The virtqueue is already protected but the
events_dropped field also needs to be protected against races. Cover it
using the event virtqueue lock because it is closely associated with
accesses to the vir
The code that builds an array of AioContext pointers indexed by the
virtqueue is not specific to virtio-blk. virtio-scsi will need to do the
same thing, so extract the functions.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Kevin Wolf
---
include/hw/virtio/iothread-vq-mapping.h | 45
h
The block layer can invoke the resize callback from any AioContext that
is processing requests. The virtqueue is already protected but the
events_dropped field also needs to be protected against races. Cover it
using the event virtqueue lock because it is closely associated with
accesses to the vir
This is the cleanup function that must be called after
apply_iothread_vq_mapping() succeeds. virtio-scsi will need this
function too, so extract it.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Kevin Wolf
---
hw/block/virtio-blk.c | 27 +--
1 file changed, 21 insertions(+
v3:
- Use vq_aio_context[VIRTIO_SCSI_VQ_NUM_FIXED] as the AioContext for the Block
Backend [Kevin]
v2:
- Only expose cmd vqs via iothread-vq-mapping [Kevin, Peter]
Implement --device virtio-scsi-pci,iothread-vq-mapping= support so that
virtqueues can be assigned to different IOThreads. This impr
Peter Krempa and Kevin Wolf observed that iothread-vq-mapping is
confusing to use because the control and event virtqueues have a fixed
location before the command virtqueues but need to be treated
differently.
Only expose the command virtqueues via iothread-vq-mapping so that the
command-line par
On Tue, 11 Mar 2025 12:13:06 +0100
Christian Schoenebeck wrote:
> On Monday, March 10, 2025 6:10:59 PM CET Greg Kurz wrote:
> > v9fs_getattr() currently peeks into V9fsFidOpenState to know if a fid
> > has a valid file descriptor or directory stream. Even though the fields
> > are accessible, thi
Hi All,
This patch series introduces initial support for a user-creatable
accelerated SMMUv3 device (-device arm-smmuv3-accel) in QEMU.
Why this is needed:
Currently, QEMU’s ARM SMMUv3 emulation (iommu=smmuv3) is tied to the
machine and does not support configuring the host SMMUv3 in nested
mode
From: Nicolin Chen
Add a helper to allocate a viommu object.
Signed-off-by: Nicolin Chen
Signed-off-by: Shameer Kolothum
---
backends/iommufd.c | 25 +
backends/trace-events| 1 +
include/system/iommufd.h | 4
3 files changed, 30 insertions(+)
diff --
On Tue, Mar 11, 2025 at 02:55:25PM +0100, Thomas Huth wrote:
> On 11/03/2025 14.37, Daniel P. Berrangé wrote:
> > On Tue, Mar 11, 2025 at 11:13:26PM +1000, Nicholas Piggin wrote:
> > > The NetBSD archive is currently failing part-way through downloads,
> > > which results in no clean HTTP error but
User must associate a pxb-pcie root bus to smmuv3-accel
and that is set as the primary-bus for the smmu dev.
Signed-off-by: Shameer Kolothum
---
hw/arm/smmuv3-accel.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
index c327
Allow cold-plug smmuv3-accel to virt If the machine wide smmuv3
is not specified.
No FDT support is added for now.
Signed-off-by: Shameer Kolothum
---
hw/arm/virt.c | 12
hw/core/sysbus-fdt.c | 1 +
include/hw/arm/virt.h | 1 +
3 files changed, 14 insertions(+)
diff --g
From: Philippe Mathieu-Daudé
The ePAPR magic value in $r6 doesn't need to be byte swapped.
See ePAPR-v1.1.pdf chapter 5.4.1 "Boot CPU Initial Register State"
and the following mailing-list threads:
https://lore.kernel.org/qemu-devel/cafeaca_nr4xw5dnl4nq7vnh4xrh5uwbhqcxulykqyk6_fcb...@mail.gmail.
---
hw/scsi/virtio-scsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c
index 6274fb044c..9f61eb97db 100644
--- a/hw/scsi/virtio-scsi.c
+++ b/hw/scsi/virtio-scsi.c
@@ -1268,7 +1268,7 @@ static void virtio_scsi_hotunplug(HotplugHan
Virtqueues are not thread-safe. Until now this was not a major issue
since all virtqueue processing happened in the same thread. The ctrl
queue's Task Management Function (TMF) requests sometimes need the main
loop, so a BH was used to schedule the virtqueue completion back in the
thread that has v
From: Shivaprasad G Bhat
As per the PAPR, bit 0 of byte 64 in pa-features property
indicates availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to find
whether kvm supports 2nd DAWR or not. If it's supported, allow use
On Tue, 11 Mar 2025 00:58:33 +0100
Vasilis Liaskovitis wrote:
> The ATI BAR4 quirk is targeting an ioport BAR. Older devices may
> have a BAR4 which is not an ioport, causing a segfault here. Test
> the BAR type to skip these devices.
>
> Similar to
> "8f419c5b: vfio/pci-quirks: Exclude non-iopo
Allow virtio-scsi virtqueues to be assigned to different IOThreads. This
makes it possible to take advantage of host multi-queue block layer
scalability by assigning virtqueues that have affinity with vCPUs to
different IOThreads that have affinity with host CPUs. The same feature
was introduced fo
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