On Fri, 24 Jan 2025 at 16:28, Peter Maydell wrote:
>
> This patchset implements emulation of the Arm FEAT_AFP and FEAT_RPRES
> extensions, which are floating-point related.
I plan to take into target-arm.next the following patches
from the start of this series: 3-21, 25, 26. (Paolo has
already pi
On Tue, 28 Jan 2025 11:00:34 +0100
Mauro Carvalho Chehab wrote:
> Em Thu, 23 Jan 2025 10:02:17 +
> Jonathan Cameron escreveu:
>
> > On Wed, 22 Jan 2025 16:46:19 +0100
> > Mauro Carvalho Chehab wrote:
> >
> > > Store HEST table address at GPA, placing its content at
> > > hest_addr_le va
On Mon, 20 Jan 2025 at 20:38, Bernhard Beschow wrote:
>
> Linux checks for the PLLs in the PHY to be locked, so implement a model
> emulating that.
>
> Signed-off-by: Bernhard Beschow
> diff --git a/docs/system/arm/imx8mp-evk.rst b/docs/system/arm/imx8mp-evk.rst
> index 1514bc5864..8d48580cb4 10
Hi,
On 1/20/25 17:37, Bernhard Beschow wrote:
Input GPIO values such as a present SD card may get notified before the GPIO
controller itself gets reset. Claring the input values thus loses data. Assuming
^- nit: Clearing
Cheers,
Gustavo
that input GPIO event
On Mon, 20 Jan 2025 at 20:38, Bernhard Beschow wrote:
>
> Fixes quite a few stack traces during the Linux boot process. Also provides
> the
> clocks for devices added later, e.g. enet1.
>
> Signed-off-by: Bernhard Beschow
> ---
> MAINTAINERS| 2 +
> docs/system/arm/imx8mp-
On 24/01/2025 16.28, Daniel P. Berrangé wrote:
On Fri, Jan 24, 2025 at 03:15:25PM +0100, Thomas Huth wrote:
Some tests have a very long runtime and might run into timeout
issues e.g. when QEMU has been compiled with --enable-debug.
Add a decorator for marking them more easily and document the
co
On Sat, 4 Jan 2025 at 07:10, Akihiko Odaki wrote:
>
> kvm-steal-time and sve properties are added for KVM even if the
> corresponding features are not available. Always add pmu property for
> Armv7+. Note that the property is added only for Armv7-A/R+ as QEMU
> currently emulates PMU only for such
On 1/28/25 04:35, Peter Maydell wrote:
On Sat, 25 Jan 2025 at 15:16, Richard Henderson
wrote:
On 1/24/25 08:27, Peter Maydell wrote:
@@ -2808,7 +2808,7 @@ bool is_ebf(CPUARMState *env, float_status *statusp,
float_status *oddstatusp)
*/
bool ebf = is_a64(env) && env->vfp.fpcr
On Tue, Jan 28, 2025 at 6:25 AM Paolo Bonzini wrote:
>
> The following changes since commit d6430c17d7113d3c38480dc34e59d00b0504e2f7:
>
> Merge tag 'pull-riscv-to-apply-20250119-1' of
> https://github.com/alistair23/qemu into staging (2025-01-19 08:55:46 -0500)
>
> are available in the Git repo
On 28/1/25 14:54, Philippe Mathieu-Daudé wrote:
Hi,
This series modify few bits of the migration QTest framework
to allow running the tests using the HVF framework (also
leaving the possibilty for other ones, removing the KVM/TCG
restriction).
Forgot to mention:
Based-on: <20250128111821.93767
The '-accel' CLI option is handler as sugar property as
'-machine,accel='. Replace the migration tests command
line, only using the best accelerator available (first
hardware, then software).
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/migration/framework.c | 28 ---
&qemu_cpu_list_lock is locked within the WITH_QEMU_LOCK_GUARD()
context, then unlocked. No need to manually unlock it.
Fixes: 370ed600296 ("cpu: expose qemu_cpu_list_lock for lock-guard use")
Signed-off-by: Philippe Mathieu-Daudé
---
migration/dirtyrate.c | 1 -
1 file changed, 1 deletion(-)
di
Keep accelerator knowledge limited within MigrationTestEnv,
expose a generic %has_dirty_ring value, only checking for
KVM when initializing it in migration_get_env().
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/migration/framework.c | 2 +-
tests/qtest/migration/precopy-tests.c | 6
Some tests expect MigrationTestEnv::arch to be set. Initialize
it early enough to avoid SIGSEGV, for example like the following
g_str_equal() call in migration/precopy-tests.c:
954 void migration_test_add_precopy(MigrationTestEnv *env)
955 {
...
1001 if (g_str_equal(env->arch, "x86_
There is no particular reason to restrict all the framework
to TCG or KVM, since we can check on a per-test basis which
accelerator is available (via MigrationTestEnv::has_$ACCEL).
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/migration/framework.c | 5 -
1 file changed, 5 deletions(
Hi,
This series modify few bits of the migration QTest framework
to allow running the tests using the HVF framework (also
leaving the possibilty for other ones, removing the KVM/TCG
restriction).
Philippe Mathieu-Daudé (7):
migration/dirtyrate: Do not unlock cpu_list lock twice
tests/qtest/mi
On 28/1/25 13:57, BALATON Zoltan wrote:
On Tue, 28 Jan 2025, Peter Maydell wrote:
On Tue, 28 Jan 2025 at 10:42, Gerd Hoffmann wrote:
On Sat, Jan 25, 2025 at 07:13:34PM +0100, Philippe Mathieu-Daudé wrote:
Some SysBus devices can optionally be dynamically plugged onto
the sysbus-platform-bus
From: Helge Deller
Since I contribute quite some code to hppa, I'd like to step up and
become the secondary maintainer for HPPA beside Richard.
Additionally change status of hppa machines to maintained as I will
take care of them.
Signed-off-by: Helge Deller
---
MAINTAINERS | 5 +++--
1 file c
On 1/28/25 02:45, Peter Maydell wrote:
+static const TypeInfo omap_mmc_info = {
+.name = TYPE_OMAP_MMC,
+.parent = TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(OMAPMMCState),
+.instance_init = omap_mmc_initfn,
+.class_init = omap_mmc_class_init,
+};
+
+static void omap_mmc_re
Let's do it similar as virtio-balloon-pci. With this change, we can
use virtio-mem-pci on s390x, although plugging will still fail until
properly wired up in the machine.
No need to worry about transitional/non_transitional devices, because they
don't exist for virtio-mem.
Signed-off-by: David Hi
Let's just wire it up, unlocking virtio-mem-pci support on s390x.
While at it, drop the "return;" in s390_machine_device_unplug_request(),
to make it look like the other handlers.
Reviewed-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
hw/s390x/s390-virtio-ccw.c | 20 ++--
This is based-on [1], which adds MSI-X support to virtio-balloon-pci,
but can be applied independently.
Turns out it is fairly easy to get virtio-mem-pci running on s390x. We
only have to add MSI-X support to virtio-mem-pci, and wire-up the
(un)plugging in the machine.
Tried some simple stuff (ho
On 1/28/25 02:45, Peter Maydell wrote:
Mechanically convert the remaining uses of 'struct omap_mmc_s' to
'OMAPMMCState'.
Signed-off-by: Peter Maydell
---
include/hw/arm/omap.h | 2 +-
hw/sd/omap_mmc.c | 20 ++--
2 files changed, 11 insertions(+), 11 deletions(-)
Revie
On 1/28/25 02:45, Peter Maydell wrote:
The omap_mmc device has three outbound qemu_irq lines:
* one actual interrupt line
* two which connect to the DMA controller and are signalled for
TX and RX DMA
Convert these to a sysbus IRQ and two named GPIO outputs.
Signed-off-by: Peter Maydell
On 1/28/25 08:14, del...@kernel.org wrote:
From: Helge Deller
PA-RISC CPUs have diagnose registers (%dr). Those are mostly
undocumented and control cache behaviour, memory behaviour, reset button
management and many other related internal CPU things.
The Linux kernel turns space-register hashi
Hi Luke,
On 1/27/25 12:17, Luke Craig wrote:
---
include/qemu/qemu-plugin.h | 10 ++
plugins/api.c | 5 +
2 files changed, 15 insertions(+)
diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h
index a1c478c54f..1fa656da82 100644
--- a/include/qemu/q
On 1/28/25 02:45, Peter Maydell wrote:
The coverswitch qemu_irq is never connected to anything, and the only thing
we do with it is set it in omap_mmc_reset(). Remove it.
Signed-off-by: Peter Maydell
---
hw/sd/omap_mmc.c | 2 --
1 file changed, 2 deletions(-)
Reviewed-by: Richard Henderson
On 1/28/25 02:45, Peter Maydell wrote:
Our style for other conversions of OMAP devices to qdev has been to
inline the creation and wiring into omap310_mpu_init() -- see for
instance the handling of omap-intc, omap-gpio and omap_i2c. Do
the same for omap-mmc.
Signed-off-by: Peter Maydell
---
hw
On 1/28/25 02:45, Peter Maydell wrote:
This is a very old source file, and still has some lingering
hard-coded tabs; untabify it.
Signed-off-by: Peter Maydell
---
I don't propose to try to bring the whole file up to modern
coding style, but hard-coded tabs are a particular wart.
---
hw/sd/omap
On 1/28/25 02:45, Peter Maydell wrote:
The sdcard_legacy.h header defines function prototypes for the "legacy"
SD card API, which was used by non-qdevified SD controller models.
We've now converted the only remaining non-qdev SD controller, so
we can drop the legacy API.
Entirely unused function
On 28/01/2025 19.35, Cédric Le Goater wrote:
On 1/28/25 19:20, Thomas Huth wrote:
On 28/01/2025 19.07, Cédric Le Goater wrote:
The test sequence boots from disk a mac99 machine in 64-bit mode, in
which case the CPU is a PPC 970.
The buildroot rootfs is built with config :
BR2_powerpc64=y
BR2_
On 1/28/25 19:20, Thomas Huth wrote:
On 28/01/2025 19.07, Cédric Le Goater wrote:
The test sequence boots from disk a mac99 machine in 64-bit mode, in
which case the CPU is a PPC 970.
The buildroot rootfs is built with config :
BR2_powerpc64=y
BR2_powerpc_970=y
and the kernel with the g5 deco
On 1/28/25 19:19, Richard Henderson wrote:
On 1/28/25 08:14, del...@kernel.org wrote:
From: Helge Deller
PA-RISC CPUs have diagnose registers (%dr). Those are mostly
undocumented and control cache behaviour, memory behaviour, reset button
management and many other related internal CPU things.
On 27.01.25 22:16, William Roche wrote:
On 1/14/25 15:02, David Hildenbrand wrote:
On 10.01.25 22:14, “William Roche wrote:
From: William Roche
The list of hwpoison pages used to remap the memory on reset
is based on the backend real page size. When dealing with
hugepages, we create a single
On 28/01/2025 19.07, Cédric Le Goater wrote:
The test sequence boots from disk a mac99 machine in 64-bit mode, in
which case the CPU is a PPC 970.
The buildroot rootfs is built with config :
BR2_powerpc64=y
BR2_powerpc_970=y
and the kernel with the g5 deconfig.
Signed-off-by: Cédric Le Goater
On 1/28/25 09:09, del...@kernel.org wrote:
From: Helge Deller
Since I contribute quite some code to hppa, I'd like to step up and
become the secondary maintainer for HPPA beside Richard.
Additionally change status of hppa machines to maintained as I will
take care of them.
Signed-off-by: Helge
On 28/1/25 19:20, Thomas Huth wrote:
On 28/01/2025 19.07, Cédric Le Goater wrote:
The test sequence boots from disk a mac99 machine in 64-bit mode, in
which case the CPU is a PPC 970.
The buildroot rootfs is built with config :
BR2_powerpc64=y
BR2_powerpc_970=y
and the kernel with the g5 deco
Yes, we can collect the information from the block associated to this
ram_addr. But instead of duplicating the necessary code into both i386
and ARM, I came back to adding the change into the
kvm_hwpoison_page_add() function called from both i386 and ARM specific
code.
I also needed a new possibi
On 1/28/25 02:45, Peter Maydell wrote:
Now that sd_enable() has been removed,SD::enable is set to true in
sd_instance_init() and then never changed. So we can remove it.
Note that the VMSTATE_UNUSED() size argument should be '1', not
'sizeof(bool)', as noted in the CAUTION comment in vmstate.h.
On 1/28/25 05:54, Philippe Mathieu-Daudé wrote:
Some tests expectMigrationTestEnv::arch to be set. Initialize
it early enough to avoid SIGSEGV, for example like the following
g_str_equal() call in migration/precopy-tests.c:
954 void migration_test_add_precopy(MigrationTestEnv *env)
955 {
On 1/28/25 02:45, Peter Maydell wrote:
The SDCardClass has an 'enable' method, but nothing actually invokes it.
The underlying implementation is sd_enable(), which is documented
in sdcard_legacy.h as something that should not be used and was only
present for the benefit of the now-removed nseries
On 1/28/25 05:54, Philippe Mathieu-Daudé wrote:
&qemu_cpu_list_lock is locked within the WITH_QEMU_LOCK_GUARD()
context, then unlocked. No need to manually unlock it.
Fixes: 370ed600296 ("cpu: expose qemu_cpu_list_lock for lock-guard use")
Signed-off-by: Philippe Mathieu-Daudé
---
migration/di
On 1/28/25 05:54, Philippe Mathieu-Daudé wrote:
The '-accel' CLI option is handler as sugar property as
'-machine,accel='. Replace the migration tests command
line, only using the best accelerator available (first
hardware, then software).
Is that really true? I thought -accel was split from -
On 1/28/25 05:54, Philippe Mathieu-Daudé wrote:
There is no particular reason to restrict all the framework
to TCG or KVM, since we can check on a per-test basis which
accelerator is available (viaMigrationTestEnv::has_$ACCEL).
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/migration/fr
On 1/28/25 05:54, Philippe Mathieu-Daudé wrote:
Allow tests to tune their parameters when running on HVF.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/migration/framework.h | 1 +
tests/qtest/migration/framework.c | 1 +
2 files changed, 2 insertions(+)
Reviewed-by: Richard Hender
On 1/28/25 07:04, Fabiano Rosas wrote:
Philippe Mathieu-Daudé writes:
There is no particular reason to restrict all the framework
to TCG or KVM, since we can check on a per-test basis which
accelerator is available (via MigrationTestEnv::has_$ACCEL).
The reason is:
CONFIG_KVM=n
CONFIG_TCG=n
On 1/28/25 06:21, Philippe Mathieu-Daudé wrote:
Let vCPUs wait for themselves being ready first, then other ones.
This allows the first thread to starts without the global vcpu
queue (thus &first_cpu) being populated.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/tcg-accel-ops-rr.c | 15
Richard Henderson writes:
> On 1/28/25 07:04, Fabiano Rosas wrote:
>> Philippe Mathieu-Daudé writes:
>>
>>> There is no particular reason to restrict all the framework
>>> to TCG or KVM, since we can check on a per-test basis which
>>> accelerator is available (via MigrationTestEnv::has_$ACCEL)
The macOS builds in our CI (and possibly other very recent distros)
are currently broken since the update to libnfs version 6 there.
That version apparently comes with a big API breakage. v5.0.3 was
the final release of the old API (see the libnfs commit here:
https://github.com/sahlberg/libnfs/com
VHOST_USER_BACKEND_SHARED_OBJECT_ADD and
VHOST_USER_BACKEND_SHARED_OBJECT_REMOVE state
in the spec that they return 0 for successful
operations, non-zero otherwise. However,
implementation relies on the return types
of the virtio-dmabuf library, with opposite
semantics (true if everything is correc
Make sure we grab a reference on the subsystem when a VF is realized.
Otherwise, the subsytem will be unrealized automatically when the VFs
are unregistered and unreffed.
This fixes a latent bug but was not exposed until commit 08f632848008
("pcie: Release references of virtual functions"). This w
Hardcoded 32 bytes is used for vbsrl emulation check, there is
problem when options lsx=on,lasx=off is used for vbsrl.v instruction
in TCG mode. It injects LASX exception rather LSX exception.
Here actual operand size is used.
Cc: qemu-sta...@nongnu.org
Fixes: df97f338076 ("target/loongarch: Impl
The libssh does not handle non-blocking mode in SFTP correctly. The
driver code already changes the mode to blocking for the SFTP
initialization, but for some reason changes to non-blocking mode.
This used to work accidentally until libssh in 0.11 branch merged
the patch to avoid infinite looping i
On 27/1/25 19:41, Thomas Huth wrote:
This test is for the big endian MIPS target, not for the little endian
target.
Signed-off-by: Thomas Huth
---
tests/functional/test_mips_malta.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/functional/test_mips_malta.py
b/te
Current versions of Windows call _DSM(func=7) regardless
of whether it is supported or not. It leads to NICs having bogus
'PCI Label Id = 0', where none should be set at all.
Also presence of 'PCI Label Id' triggers another Windows bug
on localized versions that leads to hangs. The later bug is fi
Signed-off-by: Igor Mammedov
Message-Id: <20250115125342.3883374-2-imamm...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
(cherry picked from commit 1ad32644fe4c9fb25086be15a66dde1d55d3410f)
Signed-off-by: Michael Tokarev
(Mjt: remove q35/DSDT.acpihmat-generic-x
This assertion always happens when we sanitize the CXL memory device.
$ echo 1 > /sys/bus/cxl/devices/mem0/security/sanitize
It is incorrect to register an MSIX number beyond the device's capability.
Increase the device's MSIX number to cover the mailbox msix number(9).
Fixes: 43efb0bfad2b ("hw/
QEMU would crash with a failed assertion if the XHCI controller
attempted to raise the interrupt on an interrupter corresponding
to a MSI vector with a higher index than the highest configured
for the device by the guest driver.
This behaviour is correct on the MSI/PCI side: per PCI 3.0 spec,
devi
Currently bitops.h defines a set of operations that work on
arbitrary-length bit arrays. However (largely because they
originally came from the Linux kernel) the bit array storage is an
array of 'unsigned long'. This is OK for the kernel and even for
parts of QEMU where we don't really care about
On RISC-V to StoreStore barrier corresponds
`fence w, w` not `fence r, r`
Cc: qemu-sta...@nongnu.org
Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
Reviewed-by: Richard Henderson
Signed-off-by: Denis Tomashev
Signed-off-by: Roman Artemev
Message-ID:
Signed-off-by: R
KVM is not happy when starting a VM with weird RAM sizes:
# qemu-system-s390x --enable-kvm --nographic -m 1234K
qemu-system-s390x: kvm_set_user_memory_region: KVM_SET_USER_MEMORY_REGION
failed, slot=0, start=0x0, size=0x244000: Invalid argument
kvm_set_phys_mem: error registering slot: I
TCG trace-events were deprecated before the v6.2 release,
and removed for v7.0.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
(cherry picked from commit b4859e8f33a7d9c793a60395f792c10190cb4f78)
Signed-off-by: Michael
The end vector calculation has a bug that results in polling fewer
than required vectors when reading at a non-zero offset in PBA memory.
Fixes: bbef882cc193 ("msi: add API to get notified about pending bit poll")
Signed-off-by: Nicholas Piggin
Message-Id: <20241212120402.1475053-1-npig...@gmail.
Make sure we grab a reference on the subsystem when a VF is realized.
Otherwise, the subsytem will be unrealized automatically when the VFs
are unregistered and unreffed.
This fixes a latent bug but was not exposed until commit 08f632848008
("pcie: Release references of virtual functions"). This w
Without descriptor libvirt cannot discover the EDK II binaries via
the qemu:///system connection.
Signed-off-by: Heinrich Schuchardt
Message-ID: <20241212090059.94167-1-heinrich.schucha...@canonical.com>
Signed-off-by: Gerd Hoffmann
(cherry picked from commit 74dc38d0c6c15fd57a5dee94125d13ac5b00
On Jan 15 02:16, Wilfred Mallawa wrote:
> On Fri, 2025-01-10 at 10:04 +0100, Klaus Jensen wrote:
> > On Jan 7 15:29, Wilfred Mallawa via wrote:
> > > This header contains the transport encoding for an SPDM message
> > > that
> > > uses the SPDM over Storage transport as defined by the DMTF
> > > D
QEMU would crash with a failed assertion if the XHCI controller
attempted to raise the interrupt on an interrupter corresponding
to a MSI vector with a higher index than the highest configured
for the device by the guest driver.
This behaviour is correct on the MSI/PCI side: per PCI 3.0 spec,
devi
Do not propagate error to the upper, directly output the error
to avoid leaks.
Fixes: 2fda101de07 ("virtio-crypto: Support asynchronous mode")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2714
Signed-off-by: Gabriel Barrantes
Reviewed-by: zhenwei pi
Message-Id:
Signed-off-by: Philip
PCI hotplug for downstream endpoints on arm fails because Linux'
PCIe hotplug driver doesn't like the QEMU provided LNKSTA:
pcieport :08:01.0: pciehp: Slot(2): Card present
pcieport :08:01.0: pciehp: Slot(2): Link Up
pcieport :08:01.0: pciehp: Slot(2): Cannot train link: status 0
In case when vcpus are explicitly enabled/disabled in a non-consecutive
order within a libvirt xml, it results in a drc index mismatch during
vcpu hotplug later because the existing logic uses vcpu id to derive the
corresponding drc index which is not correct. Use env->core_index to
derive a vcpu's
Do not propagate error to the upper, directly output the error
to avoid leaks.
Fixes: 2fda101de07 ("virtio-crypto: Support asynchronous mode")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2714
Signed-off-by: Gabriel Barrantes
Reviewed-by: zhenwei pi
Message-Id:
Signed-off-by: Philip
In extioi_setirq() we try to operate on a bit array stored as an
array of uint32_t using the set_bit() and clear_bit() functions
by casting the pointer to 'unsigned long *'.
This has two problems:
* the alignment of 'uint32_t' is less than that of 'unsigned long'
so we pass an insufficiently al
QEMU would crash with a failed assertion if the XHCI controller
attempted to raise the interrupt on an interrupter corresponding
to a MSI vector with a higher index than the highest configured
for the device by the guest driver.
This behaviour is correct on the MSI/PCI side: per PCI 3.0 spec,
devi
The end vector calculation has a bug that results in polling fewer
than required vectors when reading at a non-zero offset in PBA memory.
Fixes: bbef882cc193 ("msi: add API to get notified about pending bit poll")
Signed-off-by: Nicholas Piggin
Message-Id: <20241212120402.1475053-1-npig...@gmail.
_DSM function 7 AML should have followig change:
If ((Arg2 == 0x07))
{
-Local0 = Package (0x02)
-{
-Zero,
-""
-}
Local2 = AIDX (DerefOf
The analyze-migration script was seen failing in s390x in misterious
ways. It seems we're reaching the VMSDFieldStruct constructor without
any fields, which would indicate an empty .subsection entry, a
VMSTATE_STRUCT with no fields or a vmsd with no fields. We don't have
any of those, at least not
'Tgetattr' 9p request and its 'Rgetattr' response types are already used
by test client, however this response type is yet missing in function
rmessage_name(), so add it.
Fixes: a6821b828404 ("tests/9pfs: compare QIDs in fs_walk_none() test")
Signed-off-by: Christian Schoenebeck
Reviewed-by: Greg
We used to only have a single UART on the platform and it was located at
address 0x9000. When the number of UARTs was increased to 4, the
first UART remained at it's location, but instead of being the first one
to be registered, it became the last.
This caused QEMU to pick 0x9300 as the de
The clang sanitizer complains about the code in the EOI handling
of openpic_cpu_write_internal():
UBSAN_OPTIONS=halt_on_error=1:abort_on_error=1 ./build/clang/qemu-system-ppc -M
mac99,graphics=off -display none -kernel day15/invaders.elf
../../hw/intc/openpic.c:1034:16: runtime error: index -1 ou
In riscv_cpu_do_interrupt() we use the 'cause' value we got out of
cs->exception as a shift value. However this value can be larger
than 31, which means that "1 << cause" is undefined behaviour,
because we do the shift on an 'int' type.
This causes the undefined behaviour sanitizer to complain
on
PCI hotplug for downstream endpoints on arm fails because Linux'
PCIe hotplug driver doesn't like the QEMU provided LNKSTA:
pcieport :08:01.0: pciehp: Slot(2): Card present
pcieport :08:01.0: pciehp: Slot(2): Link Up
pcieport :08:01.0: pciehp: Slot(2): Cannot train link: status 0
Commit fa905f65c554 introduced a machine compatibility parameter to
enable an exclusive bar for msix. It failed to account for this when
cleaning up. Make sure that if an exclusive bar is enabled, we use the
proper cleanup routine.
Cc: qemu-sta...@nongnu.org
Fixes: fa905f65c554 ("hw/nvme: add mach
Fixes: 644e3c5d812 ("missing vmx features for Skylake-Server and
Cascadelake-Server")
Signed-off-by: Han Han
Reviewed-by: Chenyi Qiang
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
(cherry picked from commit 93dcc9390e5ad0696ae7e9b7b3a5b08c2d1b6de6)
Signed-off-by: Michael Tokarev
On Tue, Jan 28, 2025 at 09:02:48AM +, Alex Bennée wrote:
> Thomas Huth writes:
>
> > On 28/01/2025 01.42, Richard Henderson wrote:
> >> Time for our biennial attempt to kill ancient hosts.
> >> I've been re-working the tcg code generator a bit over the holidays.
> >> One place that screams fo
Luke Craig writes:
> ---
> include/qemu/qemu-plugin.h | 10 ++
> plugins/api.c | 5 +
> 2 files changed, 15 insertions(+)
>
> diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h
> index a1c478c54f..1fa656da82 100644
> --- a/include/qemu/qemu-plugin.h
>
Needed to build ipxe nic roms.
Reported-by: Liu Jaloo
Fixes: 22e11539e167 ("edk2: replace build scripts")
Signed-off-by: Gerd Hoffmann
Message-ID: <20241212084408.1390728-1-kra...@redhat.com>
(cherry picked from commit 0f5715e4b5706b31b3550d8e6b88871e029c7823)
Signed-off-by: Michael Tokarev
di
On Sat, Jan 25, 2025 at 07:13:34PM +0100, Philippe Mathieu-Daudé wrote:
> Some SysBus devices can optionally be dynamically plugged onto
> the sysbus-platform-bus (then virtual guests are aware of
> mmio mapping and IRQs via device tree / ACPI rules).
Do we have some sane way to have user-pluggabl
Mechanically convert the remaining uses of 'struct omap_mmc_s' to
'OMAPMMCState'.
Signed-off-by: Peter Maydell
---
include/hw/arm/omap.h | 2 +-
hw/sd/omap_mmc.c | 20 ++--
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/include/hw/arm/omap.h b/include/hw/a
Our style for other conversions of OMAP devices to qdev has been to
inline the creation and wiring into omap310_mpu_init() -- see for
instance the handling of omap-intc, omap-gpio and omap_i2c. Do
the same for omap-mmc.
Signed-off-by: Peter Maydell
---
hw/arm/omap1.c | 15 +++
hw/s
Do a minimal conversion of the omap_mmc device model to QDev.
In this commit we do the bare minimum to produce a working device:
* add the SysBusDevice parent_obj and the usual type boilerplate
* omap_mmc_init() now returns a DeviceState*
* reset is handled by sysbus reset, so the SoC reset fun
The sdcard_legacy.h header defines function prototypes for the "legacy"
SD card API, which was used by non-qdevified SD controller models.
We've now converted the only remaining non-qdev SD controller, so
we can drop the legacy API.
Entirely unused functions:
sd_init(), sd_set_cb(), sd_enable()
Convert the OMAP MMC controller to the new SDBus API:
* the controller creates an SDBus bus
* instead of sd_foo functions on the SDState object, call
sdbus_foo functions on the SDBus
* the board code creates a proper TYPE_SD_CARD object and attaches
it to the controller's SDBus, instead of
The coverswitch qemu_irq is never connected to anything, and the only thing
we do with it is set it in omap_mmc_reset(). Remove it.
Signed-off-by: Peter Maydell
---
hw/sd/omap_mmc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c
index dacbea13aad..07d474
This is a very old source file, and still has some lingering
hard-coded tabs; untabify it.
Signed-off-by: Peter Maydell
---
I don't propose to try to bring the whole file up to modern
coding style, but hard-coded tabs are a particular wart.
---
hw/sd/omap_mmc.c | 124 +++-
The SDCardClass has an 'enable' method, but nothing actually invokes it.
The underlying implementation is sd_enable(), which is documented
in sdcard_legacy.h as something that should not be used and was only
present for the benefit of the now-removed nseries boards. Unlike
all the other method poin
This series QOMifies the omap-mmc device. The main reason for
this is that this device is now the only remaining in-tree
user of the legacy SD APIs defined in sdcard_legacy.h.
The first 8 patches QOMify the device and do some minor
cleanup on it. Patches 9 to 11 then remove the unused
legacy APIs,
The omap_mmc device has three outbound qemu_irq lines:
* one actual interrupt line
* two which connect to the DMA controller and are signalled for
TX and RX DMA
Convert these to a sysbus IRQ and two named GPIO outputs.
Signed-off-by: Peter Maydell
---
hw/sd/omap_mmc.c | 20 +---
Now that sd_enable() has been removed, SD::enable is set to true in
sd_instance_init() and then never changed. So we can remove it.
Note that the VMSTATE_UNUSED() size argument should be '1', not
'sizeof(bool)', as noted in the CAUTION comment in vmstate.h.
Signed-off-by: Peter Maydell
---
hw/s
In extioi_setirq() we try to operate on a bit array stored as an
array of uint32_t using the set_bit() and clear_bit() functions
by casting the pointer to 'unsigned long *'.
This has two problems:
* the alignment of 'uint32_t' is less than that of 'unsigned long'
so we pass an insufficiently al
print_mmap() assumes that mmap() receives arguments via memory if
mmap2() is present. s390x (as opposed to s390) does not fit this
pattern: it does not have mmap2(), but mmap() still receives arguments
via memory.
Fix by sharing the detection logic between syscall.c and strace.c.
Cc: qemu-sta...@
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