The same "if" is present in all generator functions for string instructions.
Push it inside gen_repz() and gen_repz_nz() instead.
Signed-off-by: Paolo Bonzini
Link: https://lore.kernel.org/r/20241215090613.89588-5-pbonz...@redhat.com
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c
Because register reset is within a borrow_mut() call, reset
does not need anymore a mut reference to the PL011State.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 4 ++--
rust/qemu-api/src/qdev.rs| 2 +-
2 files changed, 3 insertions(+), 3 del
Signed-off-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/tests/tests.rs | 56 ++--
1 file changed, 53 insertions(+), 3 deletions(-)
diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs
index 526c3f4f8ea..5c3e75ed3d5 100644
--- a/
From: Zhao Liu
List all the necessary bindings to better identify gaps in rust/qapi.
And include the bindings wrapped by rust/qapi instead mapping the raw
bindings directly.
Inspired-by: Paolo Bonzini
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250121140457.84631-3-zhao1@inte
On Fri, 24 Jan 2025 00:45:50 +0800
Xiaoyao Li wrote:
> On 1/23/2025 8:41 PM, Igor Mammedov wrote:
> > On Tue, 5 Nov 2024 01:23:48 -0500
> > Xiaoyao Li wrote:
> >
> >> Add a new bool member, eoi_intercept_unsupported, to X86MachineState
> >> with default value false. Set true for TDX VM.
>
From: Helge Deller
The following changes since commit 0e3aff9ec34059512d597eacfcf4d1b5d4570c50:
Merge tag 'pull-10.0-gdb-plugins-doc-updates-170125-1' of
https://gitlab.com/stsquad/qemu into staging (2025-01-17 10:13:07 -0500)
are available in the Git repository at:
https://github.com/hde
From: Helge Deller
Add IP_MULTICAST_IF and share the code with IP_ADD_MEMBERSHIP /
IP_DROP_MEMBERSHIP.
Sharing the code makes sense, because the manpage of ip(7) says:
IP_MULTICAST_IF (since Linux 1.2)
Set the local device for a multicast socket. The argument
for setsockopt(2) is a
From: Helge Deller
Fixes various warnings in the testsuite while building gupnp:
gssdp-net-DEBUG: Failed to send netlink message: Operation not supported
gupnp-context-DEBUG: Mismatch between host header and host IP (example.com,
expected: 127.0.0.1)
gupnp-context-DEBUG: Mismatch between host
From: Helge Deller
This fixes the following qemu warnings when building debian gupnp package:
Unknown host QEMU_IFLA type: 61
Unknown host QEMU_IFLA type: 58
Unknown host QEMU_IFLA type: 59
Unknown host QEMU_IFLA type: 60
Unknown host QEMU_IFLA type: 32820
QEMU_IFLA type 32820 is actually N
From: Helge Deller
Fix this warning:
Unknown host IFA type: 11
While adding IFA_PROTO, convert all IFA_XXX values over to QEMU_IFA_XXX values
to avoid a build failure on Ubuntu 22.04 (kernel v5.18 which does not know
IFA_PROTO yet).
Signed-off-by: Helge Deller
Reviewed-by: Laurent Vivier
---
From: Helge Deller
Avoid using the same error message for two different code paths
as it complicates determining the one which actually triggered.
Signed-off-by: Helge Deller
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Laurent Vivier
---
linux-user/syscall.c | 4 ++--
1 file changed, 2
Do not use new_unchecked; the effect is the same, but the
code is easier to read and unsafe regions become smaller.
Likewise, NonNull::new can be used instead of assertion and
followed by as_ref() or as_mut() instead of dereferencing the
pointer.
Suggested-by: Zhao Liu
Signed-off-by: Paolo Bonzin
It only differs in a single call to gen_jcc, so use a "bool" argument
to distinguish the two cases; do not duplicate code.
Signed-off-by: Paolo Bonzini
Reviewed-by: Richard Henderson
Link: https://lore.kernel.org/r/20241215090613.89588-4-pbonz...@redhat.com
Signed-off-by: Paolo Bonzini
---
tar
From: Zhao Liu
Configuring "--enable-user --disable-system --enable-tools" causes the
build failure with the following information:
/usr/bin/ld: libhwcore.a.p/hw_core_qdev.c.o: in function `device_finalize':
/qemu/build/../hw/core/qdev.c:688: undefined reference to
`qapi_event_send_device_delet
RF must be set on traps and interrupts from a string instruction,
except if they occur after the last iteration. Ensure it is set
before giving the main loop a chance to execute.
Signed-off-by: Paolo Bonzini
Reviewed-by: Richard Henderson
Link: https://lore.kernel.org/r/20241215090613.89588-8-p
On Thu, Jan 23, 2025 at 11:47:17AM -0500, Peter Xu wrote:
> On Thu, Jan 23, 2025 at 05:33:53PM +0800, Xu Yilun wrote:
> > On Wed, Jan 22, 2025 at 11:43:01AM -0500, Peter Xu wrote:
> > > On Wed, Jan 22, 2025 at 05:41:31PM +0800, Xu Yilun wrote:
> > > > On Wed, Jan 22, 2025 at 03:30:05PM +1100, Alexe
This is a step towards making memory ops use a shared reference to the
device type; it's not yet possible due to the calls to character device
functions.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 40 ++
rust/hw/char/p
It is not type safe, but it's the best that can be done without
const_refs_static. It can also be used with BqlCell and BqlRefCell.
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/src/vmstate.rs | 33 +
1 file changed, 33 insertions(+)
diff --git a/rust/qemu-api/
This shortens a bit the constants. Do not bother using it
in the vmstate macros since most of them will go away soon.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/src/vmstate.rs | 18 +++---
rust/qemu-api/src/zeroable.rs | 31 +++
This is not needed anymore now that gen_jcc has been eliminated
(merged into the similarly-named gen_Jcc, where the uppercase letter
gives away that it is an emission function).
Signed-off-by: Paolo Bonzini
Reviewed-by: Richard Henderson
Link: https://lore.kernel.org/r/20241215090613.89588-3-pbo
From: Zhao Liu
Convert `unspecified` member of MemTxAttrs from bit field to bool, so
that bindgen could generate more ergonomic Rust binding with bool type.
As a result, MemTxAttrs needs to be expanded from 4 bytes to 8 bytes.
Therefore, move `unspecified` to after the bit fields and add reserv
From: Tao Su
According to table 1-2 in Intel Architecture Instruction Set Extensions
and Future Features (rev 056) [1], ClearwaterForest has the following new
features which have already been virtualized:
- AVX-VNNI-INT16 CPUID.(EAX=7,ECX=1):EDX[bit 10]
- SHA512 CPUID.(EAX=7,ECX=1):EAX[b
From: Tao Su
Update GraniteRapids, SierraForest and ClearwaterForest CPU models in
section "Preferred CPU models for Intel x86 hosts".
Also introduce bhi-no, gds-no and rfds-no in doc.
Suggested-by: Zhao Liu
Signed-off-by: Tao Su
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20250121
For updates to implicit registers (RCX in LOOP instructions, RSI or RDI
in string instructions, or the stack pointer) do the add directly using
the registers (with no temporary) if 32-bit or 64-bit, or use a temporary
created for the occasion if 16-bit. This is more efficient and removes
move inst
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs
index 994c2fc0593..65a1234b9ff 100644
--- a/rust/hw/char/pl011/src/device.rs
+++ b/rust/
read() can now return a simple u64.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 23 +--
rust/hw/char/pl011/src/memory_ops.rs | 18 ++
2 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/rust/hw/ch
According to the Vector Reduction Operations section in the RISC-V "V"
Vector Extension spec,
"If vl=0, no operation is performed and the destination register is not
updated."
The vd should be updated when vl is larger than 0.
Signed-off-by: Max Chou
---
target/riscv/vector_helper.c | 8 ++-
On Wed, 22 Jan 2025 16:46:21 +0100
Mauro Carvalho Chehab wrote:
> The GHES migration logic at GED should now support HEST table
> location too.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Igor Mammedov
> ---
> hw/acpi/generic_event_device.c | 29 +
> 1
Hello Peter,
On Thu, 23 Jan 2025 at 16:39, Prasad Pandit wrote:
> On Wed, 22 Jan 2025 at 21:40, Peter Xu wrote:
> > I believe many of the tests can be avoided, but still below is a list of
> > minimum tests that I think might still be good to add:
> > # /x86_64/migration/postcopy/plain
>
Philippe Mathieu-Daudé writes:
> Use the tcg_enabled() check so the compiler can elide
> the call when TCG isn't available, allowing to remove
> the tb_flush() stub.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
On Wed, 22 Jan 2025 16:46:17 +0100
Mauro Carvalho Chehab wrote:
> Now that the ghes preparation patches were merged, let's add support
> for error injection.
>
> I'm opting to fold two patch series into one here:
>
> 1.
> https://lore.kernel.org/qemu-devel/20250113130854.848688-1-mchehab+hua..
The variable is uint64_t so needs %PRIu64 instead of %d.
Fixes: 3ae7eb88c47 ("ehci: fix overflow in frame timer code")
Signed-off-by: BALATON Zoltan
Reviewed-by: Peter Maydell
---
v3: Fixed commit message to match what the patch actually does
hw/usb/hcd-ehci.c | 3 ++-
1 file changed, 2 insert
On Thu, 23 Jan 2025, Philippe Mathieu-Daudé wrote:
Hi Zoltan,
On 23/1/25 22:48, BALATON Zoltan wrote:
The variable is uint64_t so needs %ld instead of %d.
Actually the format is PRIu64.
Fixes: 3ae7eb88c47 ("ehci: fix overflow in frame timer code")
Signed-off-by: BALATON Zoltan
---
hw/u
As an added bonus, this also makes the new function return u32 instead
of u64, thus factoring some casts into a single place.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 113 +--
1 file changed, 64 insertions(+), 49 delet
The existing translation of the C macros for vmstate does not make
any attempt to type-check vmstate declarations against the struct, so
introduce a new system that computes VMStateField based on the actual
struct declaration.
Macros do not have full access to the type system, therefore a full
imp
Keep vmstate_clock!; because it uses a field of type VMStateDescription,
it cannot be converted to the VMState trait without access to the
const_refs_static feature.
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/src/vmstate.rs | 274 +++
1
The `const_zero` crate provides a nice macro to zero type-specific
constants, which doesn't need to enumerates the fields one by one.
Introduce the `const_zero` macro to QEMU (along with its documentation), and
use it to simplify the implementation of `Zeroable` trait.
Suggested-by: Paolo Bonzini
From: Tao Su
Update SierraForest CPU model to add LAM, 4 bits indicating certain bits
of IA32_SPEC_CTR are supported(intel-psfd, ipred-ctrl, rrsba-ctrl,
bhi-ctrl) and the missing features(ss, tsc-adjust, cldemote, movdiri,
movdir64b)
Also add GDS-NO and RFDS-NO to indicate the related vulnerabil
On Friday, January 24, 2025 6:12:06 AM CET Akihiko Odaki wrote:
> coreaudio had names that are not conforming to QEMU codding style.
> coreaudioVoiceOut also had some members that are prefixed with redundant
> words like "output" or "audio".
> Global names included "out" to tell they are specific t
From: Zhao Liu
Make sure MemTxAttrs is packed into 8 bytes and does not exceed 8 bytes.
Suggested-by: Philippe Mathieu-DaudÃ
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250121151322.171832-3-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
include/exec/memattrs.h | 2 ++
1
On Wed, 22 Jan 2025 16:46:24 +0100
Mauro Carvalho Chehab wrote:
> Move the check logic into a common function and simplify the
> code which checks if GHES is enabled and was properly setup.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
> hw/acpi/ghes-stub.c| 4 ++--
> hw/acpi/ghes.c
From: Denis Rastyogin
Fix possible overflow in 1 << (DF_BITS(df) - 2) when DF_BITS(df)
is 64 by using a 64-bit integer for the shift operation.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Reported-by: Dmitriy Fedin
Signed-off-by: Denis Rastyogin
---
target/mips/tcg/msa
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
signature.asc
Description: PGP signature
On Thu, Jan 23, 2025 at 7:52 PM Igor Mammedov wrote:
>
> On Thu, 23 Jan 2025 17:26:12 +0530
> Ani Sinha wrote:
>
> > commit 0788a56bd1ae3 ("i386: Make unversioned CPU models be aliases")
> > introduced 'default_cpu_version' for PCMachineClass. This created three
> > categories of CPU models:
> >
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